powerpc32: Remove clear_pages() and define clear_page() inline
clear_pages() is never used expect by clear_page, and PPC32 is the only architecture (still) having this function. Neither PPC64 nor any other architecture has it. This patch removes clear_pages() and moves clear_page() function inline (same as PPC64) as it only is a few isns Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <oss@buserror.net>
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@ -1,6 +1,8 @@
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#ifndef _ASM_POWERPC_PAGE_32_H
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#ifndef _ASM_POWERPC_PAGE_32_H
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#define _ASM_POWERPC_PAGE_32_H
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#define _ASM_POWERPC_PAGE_32_H
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#include <asm/cache.h>
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#if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0)
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#if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0)
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#if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0
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#if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0
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#error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN"
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#error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN"
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@ -36,9 +38,18 @@ typedef unsigned long long pte_basic_t;
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typedef unsigned long pte_basic_t;
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typedef unsigned long pte_basic_t;
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#endif
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#endif
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struct page;
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/*
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extern void clear_pages(void *page, int order);
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* Clear page using the dcbz instruction, which doesn't cause any
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static inline void clear_page(void *page) { clear_pages(page, 0); }
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* memory traffic (except to write out any cache lines which get
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* displaced). This only works on cacheable memory.
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*/
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static inline void clear_page(void *addr)
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{
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unsigned int i;
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for (i = 0; i < PAGE_SIZE / L1_CACHE_BYTES; i++, addr += L1_CACHE_BYTES)
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dcbz(addr);
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}
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extern void copy_page(void *to, void *from);
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extern void copy_page(void *to, void *from);
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#include <asm-generic/getorder.h>
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#include <asm-generic/getorder.h>
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@ -516,22 +516,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
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blr
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blr
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#endif /* CONFIG_BOOKE */
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#endif /* CONFIG_BOOKE */
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/*
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* Clear pages using the dcbz instruction, which doesn't cause any
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* memory traffic (except to write out any cache lines which get
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* displaced). This only works on cacheable memory.
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*
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* void clear_pages(void *page, int order) ;
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*/
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_GLOBAL(clear_pages)
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li r0,PAGE_SIZE/L1_CACHE_BYTES
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slw r0,r0,r4
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mtctr r0
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1: dcbz 0,r3
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addi r3,r3,L1_CACHE_BYTES
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bdnz 1b
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blr
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/*
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/*
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* Copy a whole page. We use the dcbz instruction on the destination
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* Copy a whole page. We use the dcbz instruction on the destination
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* to reduce memory traffic (it eliminates the unnecessary reads of
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* to reduce memory traffic (it eliminates the unnecessary reads of
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@ -10,7 +10,6 @@
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#include <asm/pgtable.h>
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#include <asm/pgtable.h>
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#include <asm/dcr.h>
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#include <asm/dcr.h>
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EXPORT_SYMBOL(clear_pages);
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EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
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EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
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EXPORT_SYMBOL(DMA_MODE_READ);
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EXPORT_SYMBOL(DMA_MODE_READ);
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EXPORT_SYMBOL(DMA_MODE_WRITE);
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EXPORT_SYMBOL(DMA_MODE_WRITE);
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