tools/power/turbostat: Abstract MSR_MODULE_C6_RES_MS support
JIRA: https://issues.redhat.com/browse/RHEL-20029 commit 9cc1c1038526a5b6c9a57397def80ba79c260ff2 Author: Zhang Rui <rui.zhang@intel.com> Date: Sun Aug 27 14:47:30 2023 +0800 tools/power/turbostat: Abstract MSR_MODULE_C6_RES_MS support Abstract MSR_MODULE_C6_RES_MS support. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Reviewed-by: Len Brown <len.brown@intel.com> Signed-off-by: David Arcari <darcari@redhat.com>
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@ -284,6 +284,7 @@ struct platform_features {
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bool has_cst_auto_convension; /* AUTOMATIC_CSTATE_CONVERSION bit in MSR_PKG_CST_CONFIG_CONTROL */
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bool has_irtl_msrs; /* MSR_PKGC3/PKGC6/PKGC7/PKGC8/PKGC9/PKGC10_IRTL */
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bool has_msr_core_c1_res; /* MSR_CORE_C1_RES */
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bool has_msr_module_c6_res_ms; /* MSR_MODULE_C6_RES_MS */
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int trl_msrs; /* MSR_TURBO_RATIO_LIMIT/LIMIT1/LIMIT2/SECONDARY, Atom TRL MSRs */
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int plr_msrs; /* MSR_CORE/GFX/RING_PERF_LIMIT_REASONS */
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int rapl_msrs; /* RAPL PKG/DRAM/CORE/GFX MSRs, AMD RAPL MSRs */
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@ -653,6 +654,7 @@ static const struct platform_features slv_features = {
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.supported_cstates = CC1 | CC6 | PC6,
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.cst_limit = CST_LIMIT_SLV,
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.has_msr_core_c1_res = 1,
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.has_msr_module_c6_res_ms = 1,
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.trl_msrs = TRL_ATOM,
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.rapl_msrs = RAPL_PKG | RAPL_CORE,
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.has_rapl_divisor = 1,
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@ -5690,9 +5692,9 @@ void process_cpuid()
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BIC_PRESENT(BIC_SMI);
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probe_bclk();
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if (has_slv_msrs(family, model)) {
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if (platform->has_msr_module_c6_res_ms)
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BIC_PRESENT(BIC_Mod_c6);
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}
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if (has_skl_msrs(family, model)) {
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BIC_PRESENT(BIC_Totl_c0);
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BIC_PRESENT(BIC_Any_c0);
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