Prefer to return `Option<&Type>`

kernel/comps/pci/src/capability/msix.rs

@@ -57,7 +57,7 @@ impl CapabilityMsixData {
         let bar_manager = dev.bar_manager();
         match bar_manager
             .bar((pba_info & 0b111) as u8)
-            .clone()
+            .cloned()
             .expect("MSIX cfg:pba BAR is none")
         {
             Bar::Memory(memory) => {
@@ -69,7 +69,7 @@ impl CapabilityMsixData {
         };
         match bar_manager
             .bar((table_info & 0b111) as u8)
-            .clone()
+            .cloned()
             .expect("MSIX cfg:table BAR is none")
         {
             Bar::Memory(memory) => {

kernel/comps/pci/src/common_device.rs

@@ -190,9 +190,9 @@ pub struct BarManager {
 }
 
 impl BarManager {
-    /// Gains access to the BAR space and returns None if that BAR is absent.
-    pub fn bar(&self, idx: u8) -> &Option<Bar> {
-        &self.bars[idx as usize]
+    /// Gains access to the BAR space and returns `None` if that BAR is absent.
+    pub fn bar(&self, idx: u8) -> Option<&Bar> {
+        self.bars[idx as usize].as_ref()
     }
 
     /// Parses the BAR space by PCI device location.

kernel/comps/virtio/src/transport/pci/capability.rs

@@ -30,8 +30,8 @@ pub struct VirtioPciCapabilityData {
 }
 
 impl VirtioPciCapabilityData {
-    pub fn memory_bar(&self) -> &Option<Arc<MemoryBar>> {
-        &self.memory_bar
+    pub fn memory_bar(&self) -> Option<&Arc<MemoryBar>> {
+        self.memory_bar.as_ref()
     }
 
     pub fn offset(&self) -> u32 {

kernel/comps/virtio/src/transport/pci/common_cfg.rs

@@ -32,7 +32,7 @@ impl VirtioPciCommonCfg {
     pub(super) fn new(cap: &VirtioPciCapabilityData) -> SafePtr<Self, IoMem> {
         debug_assert!(cap.typ() == VirtioPciCpabilityType::CommonCfg);
         SafePtr::new(
-            cap.memory_bar().as_ref().unwrap().io_mem().clone(),
+            cap.memory_bar().unwrap().io_mem().clone(),
             cap.offset() as usize,
         )
     }

kernel/comps/virtio/src/transport/pci/device.rs

@@ -133,7 +133,6 @@ impl VirtioTransport for VirtioPciModernTransport {
         let io_mem = self
             .device_cfg
             .memory_bar()
-            .as_ref()
             .unwrap()
             .io_mem()
             .slice(offset..offset + length);
@@ -302,7 +301,7 @@ impl VirtioPciModernTransport {
                             notify = Some(VirtioPciNotify {
                                 offset_multiplier: data.option_value().unwrap(),
                                 offset: data.offset(),
-                                io_memory: data.memory_bar().as_ref().unwrap().io_mem().clone(),
+                                io_memory: data.memory_bar().unwrap().io_mem().clone(),
                             });
                         }
                         VirtioPciCpabilityType::IsrCfg => {}

kernel/comps/virtio/src/transport/pci/legacy.rs

@@ -93,7 +93,7 @@ impl VirtioPciLegacyTransport {
         };
         info!("[Virtio]: Found device:{:?}", device_type);
 
-        let config_bar = common_device.bar_manager().bar(0).clone().unwrap();
+        let config_bar = common_device.bar_manager().bar(0).cloned().unwrap();
 
         let mut num_queues = 0u16;
         while num_queues < u16::MAX {

kernel/src/ipc/semaphore/system_v/sem.rs

@@ -69,8 +69,8 @@ impl PendingOp {
         self.status.store(status, Ordering::Relaxed);
     }
 
-    pub(super) fn waker(&self) -> &Option<Arc<Waker>> {
-        &self.waker
+    pub(super) fn waker(&self) -> Option<&Arc<Waker>> {
+        self.waker.as_ref()
     }
 }