From 7bf716162a5e65653c1bb89c24e4830aa22d32bd Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=E7=8E=8B=E8=8B=B1=E6=B3=B0?= <2253457010@qq.com> Date: Tue, 8 Jul 2025 18:45:14 +0800 Subject: [PATCH] Finish the arch section for LoongArch in OSTD --- ostd/src/arch/loongarch/mod.rs | 67 ++++++++++++++++++++++++++++++++++ 1 file changed, 67 insertions(+) create mode 100644 ostd/src/arch/loongarch/mod.rs diff --git a/ostd/src/arch/loongarch/mod.rs b/ostd/src/arch/loongarch/mod.rs new file mode 100644 index 000000000..e793b775d --- /dev/null +++ b/ostd/src/arch/loongarch/mod.rs @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: MPL-2.0 + +//! Platform-specific code for the LoongArch platform. + +pub mod boot; +pub(crate) mod cpu; +pub mod device; +mod io; +pub(crate) mod iommu; +pub(crate) mod irq; +pub(crate) mod mm; +pub(crate) mod pci; +pub mod qemu; +pub(crate) mod serial; +pub(crate) mod task; +pub mod timer; +pub mod trap; + +#[cfg(feature = "cvm_guest")] +pub(crate) fn init_cvm_guest() { + // Unimplemented, no-op +} + +pub(crate) unsafe fn late_init_on_bsp() { + // SAFETY: This function is called in the boot context of the BSP. + unsafe { trap::init() }; + + let io_mem_builder = io::construct_io_mem_allocator_builder(); + + // SAFETY: We're on the BSP and we're ready to boot all APs. + unsafe { crate::boot::smp::boot_all_aps() }; + + // SAFETY: + // 1. All the system device memory have been removed from the builder. + // 2. LoongArch platforms does not have port I/O. + unsafe { crate::io::init(io_mem_builder) }; + + let _ = pci::init(); +} + +pub(crate) unsafe fn init_on_ap() { + unimplemented!() +} + +pub(crate) fn interrupts_ack(irq_number: usize) { + unimplemented!() +} + +/// Returns the frequency of TSC. The unit is Hz. +pub fn tsc_freq() -> u64 { + loongArch64::time::get_timer_freq() as _ +} + +/// Reads the current value of the processor’s time-stamp counter (TSC). +pub fn read_tsc() -> u64 { + loongArch64::time::Time::read() as _ +} + +/// Reads a hardware generated 64-bit random value. +/// +/// Returns None if no random value was generated. +pub fn read_random() -> Option { + // FIXME: Implement a hardware random number generator on LoongArch platforms. + None +} + +pub(crate) fn enable_cpu_features() {}