From a6b01501acb96b9fdcc59de7517c5c5ad605f640 Mon Sep 17 00:00:00 2001 From: Ruihan Li Date: Fri, 12 Sep 2025 16:56:12 +0800 Subject: [PATCH] Load local addresses and define constants --- ostd/src/arch/loongarch/boot/boot.S | 22 +++++++++++----------- ostd/src/arch/loongarch/trap/trap.S | 8 ++++---- ostd/src/arch/riscv/boot/boot.S | 18 +++++++++--------- ostd/src/arch/riscv/trap/trap.S | 3 ++- ostd/src/arch/x86/boot/ap_boot.S | 6 ++++-- ostd/src/arch/x86/boot/bsp_boot.S | 26 ++++++++++++++++++-------- 6 files changed, 48 insertions(+), 35 deletions(-) diff --git a/ostd/src/arch/loongarch/boot/boot.S b/ostd/src/arch/loongarch/boot/boot.S index b0c37cc11..abba8fbf0 100644 --- a/ostd/src/arch/loongarch/boot/boot.S +++ b/ostd/src/arch/loongarch/boot/boot.S @@ -30,6 +30,8 @@ .equ LOONGARCH_CSR_SAVE6, 0x36 /* Save 6 */ .equ LOONGARCH_CSR_SAVE7, 0x37 /* Save 7 */ +.equ KERNEL_VMA_OFFSET, 0x9000000000000000 + .section ".boot", "awx", @progbits .globl _start _start: @@ -67,9 +69,9 @@ _start: csrwr $t0, LOONGARCH_CSR_PWCH # Set the boot page table - la $t0, boot_l4pt + la.local $t0, boot_l4pt csrwr $t0, LOONGARCH_CSR_PGDL - la $t0, boot_l4pt + la.local $t0, boot_l4pt csrwr $t0, LOONGARCH_CSR_PGDH # Initialize TLB @@ -82,17 +84,15 @@ _start: csrwr $t0, LOONGARCH_CSR_PRMD # Set the entry of TLB refill exception - la.global $t0, _handle_tlb_refill - # Convert the address to physical address -.extern KERNEL_VMA_OFFSET - la.global $t1, KERNEL_VMA_OFFSET - sub.d $t0, $t0, $t1 + la.local $t0, _handle_tlb_refill - KERNEL_VMA_OFFSET csrwr $t0, LOONGARCH_CSR_TLBRENTRY # Update SP/PC to use the virtual address - la $sp, boot_stack_top + li.d $t1, KERNEL_VMA_OFFSET + la.local $sp, boot_stack_top add.d $sp, $sp, $t1 - la.global $t0, _start_virt + la.local $t0, _start_virt - KERNEL_VMA_OFFSET + add.d $t0, $t0, $t1 jr $t0 .balign 4096 @@ -117,10 +117,10 @@ _start_virt: # Initialize r21 to the CPU-local start address. .extern __cpu_local_start - la.global $r21, __cpu_local_start + la.local $r21, __cpu_local_start # Jump to rust loongarch_boot - la.global $t0, loongarch_boot + la.local $t0, loongarch_boot jr $t0 .balign 4096 diff --git a/ostd/src/arch/loongarch/trap/trap.S b/ostd/src/arch/loongarch/trap/trap.S index 574032467..c1c36cd20 100644 --- a/ostd/src/arch/loongarch/trap/trap.S +++ b/ostd/src/arch/loongarch/trap/trap.S @@ -62,7 +62,7 @@ trap_from_user: # save sp, prmd, era, euen csrrd $t0, SAVE_SCRATCH csrwr $zero, SAVE_SCRATCH # SAVE_SCRATCH = 0 (kernel) - csrrd $t1, LOONGARCH_CSR_PRMD + csrrd $t1, LOONGARCH_CSR_PRMD csrrd $t2, LOONGARCH_CSR_ERA csrrd $t3, LOONGARCH_CSR_EUEN STORE_SP $t0, 3 # save sp @@ -74,10 +74,10 @@ trap_from_user: bnez $t1, end_trap_from_user end_trap_from_kernel: - move $a0, $sp # first arg is TrapFrame + move $a0, $sp # first arg is TrapFrame + la.local $ra, trap_return .extern trap_handler - la.local $ra, trap_return - la.global $t0, trap_handler + la.local $t0, trap_handler jr $t0 end_trap_from_user: diff --git a/ostd/src/arch/riscv/boot/boot.S b/ostd/src/arch/riscv/boot/boot.S index 26de5228f..d6bf0ae8a 100644 --- a/ostd/src/arch/riscv/boot/boot.S +++ b/ostd/src/arch/riscv/boot/boot.S @@ -12,7 +12,7 @@ PTE_SIZE = 8 PAGE_SHIFT = 12 -KERNEL_VMA = 0xffffffff00000000 +KERNEL_VMA_OFFSET = 0xffffffff00000000 .section ".boot", "awx", @progbits .globl _start @@ -23,16 +23,16 @@ _start: # Set up the page table. # boot_l4pt[511] = (PPN(boot_l3pt) << PTE_PPN_SHIFT) | PTE_V - la t1, boot_l4pt + lla t1, boot_l4pt li t0, 511 * PTE_SIZE add t1, t1, t0 - la t0, boot_l3pt + lla t0, boot_l3pt srli t0, t0, PAGE_SHIFT - PTE_PPN_SHIFT ori t0, t0, PTE_V sd t0, 0(t1) # Load the page table. - la t0, boot_l4pt + lla t0, boot_l4pt li t1, SATP_MODE_SV48 srli t0, t0, PAGE_SHIFT - SATP_PPN_SHIFT or t0, t0, t1 @@ -40,10 +40,10 @@ _start: sfence.vma # Update SP/PC to use the virtual address. - li t1, KERNEL_VMA - la sp, boot_stack_top + li t1, KERNEL_VMA_OFFSET + lla sp, boot_stack_top or sp, sp, t1 - la t0, _start_virt - KERNEL_VMA + lla t0, _start_virt - KERNEL_VMA_OFFSET or t0, t0, t1 jr t0 @@ -76,8 +76,8 @@ boot_stack_top: _start_virt: # Initialize GP to the CPU-local start address. .extern __cpu_local_start - la gp, __cpu_local_start + lla gp, __cpu_local_start # Jump into Rust code. - la t0, riscv_boot + lla t0, riscv_boot jr t0 diff --git a/ostd/src/arch/riscv/trap/trap.S b/ostd/src/arch/riscv/trap/trap.S index 575bad3c9..c1a484439 100644 --- a/ostd/src/arch/riscv/trap/trap.S +++ b/ostd/src/arch/riscv/trap/trap.S @@ -82,7 +82,8 @@ trap_from_user: beqz t1, end_trap_from_user end_trap_from_kernel: mv a0, sp # first arg is TrapFrame - la ra, trap_return # set return address + lla ra, trap_return # set return address +.extern trap_handler j trap_handler end_trap_from_user: diff --git a/ostd/src/arch/x86/boot/ap_boot.S b/ostd/src/arch/x86/boot/ap_boot.S index 194a87564..d5b3251f0 100644 --- a/ostd/src/arch/x86/boot/ap_boot.S +++ b/ostd/src/arch/x86/boot/ap_boot.S @@ -12,6 +12,8 @@ IA32_EFER_MSR = 0xC0000080 IA32_EFER_BIT_LME = 1 << 8 IA32_EFER_BIT_NXE = 1 << 11 +IA32_GS_BASE_MSR = 0xC0000101 + CR0_BIT_PE = 1 << 0 CR0_BIT_PG = 1 << 31 @@ -163,8 +165,8 @@ ap_long_mode: // Setup the GS base (the CPU-local address). mov rax, [rbx + rax - 8] // raw_info[cpu_id - 1].cpu_local mov rdx, rax - shr rdx, 32 // EDX:EAX = raw_info.cpu_local - mov ecx, 0xC0000101 // ECX = GS.base + shr rdx, 32 // EDX:EAX = raw_info.cpu_local + mov ecx, IA32_GS_BASE_MSR // ECX = GS.base wrmsr // Go to Rust code. diff --git a/ostd/src/arch/x86/boot/bsp_boot.S b/ostd/src/arch/x86/boot/bsp_boot.S index 67dfcbf6c..80406db90 100644 --- a/ostd/src/arch/x86/boot/bsp_boot.S +++ b/ostd/src/arch/x86/boot/bsp_boot.S @@ -2,6 +2,18 @@ // The boot routine executed by the bootstrap processor. +IA32_EFER_MSR = 0xC0000080 +IA32_EFER_BIT_LME = 1 << 8 + +IA32_GS_BASE_MSR = 0xC0000101 + +CR0_BIT_PG = 1 << 31 + +CR4_BIT_PAE = 1 << 5 +CR4_BIT_PGE = 1 << 7 + +KERNEL_VMA = 0xffffffff80000000 + // The boot header, initial boot setup code, temporary GDT and page tables are // in the boot section. The boot section is mapped writable since kernel may // modify the initial page table. @@ -19,8 +31,6 @@ ENTRYTYPE_LINUX_64 = 4 MULTIBOOT_ENTRY_MAGIC = 0x2BADB002 MULTIBOOT2_ENTRY_MAGIC = 0x36D76289 -KERNEL_VMA = 0xffffffff80000000 - // The Linux 32-bit Boot Protocol entry point. // Must be located at 0x8001000, ABI immutable! .code32 @@ -122,7 +132,7 @@ protected_mode: // Enable PAE and PGE. mov eax, cr4 - or eax, 0xa0 + or eax, CR4_BIT_PAE | CR4_BIT_PGE mov cr4, eax // Set the page table address. @@ -130,9 +140,9 @@ protected_mode: mov cr3, eax // Enable long mode. - mov ecx, 0xc0000080 + mov ecx, IA32_EFER_MSR rdmsr - or eax, 0x0100 + or eax, IA32_EFER_BIT_LME wrmsr // Prepare for far return. @@ -142,7 +152,7 @@ protected_mode: // Enable paging. mov eax, cr0 - or eax, 0x80000000 + or eax, CR0_BIT_PG mov cr0, eax retf @@ -325,8 +335,8 @@ long_mode: .extern __cpu_local_start lea rax, [rip + __cpu_local_start] mov rdx, rax - shr rdx, 32 // EDX:EAX = __cpu_local_start - mov ecx, 0xC0000101 // ECX = GS.base + shr rdx, 32 // EDX:EAX = __cpu_local_start + mov ecx, IA32_GS_BASE_MSR // ECX = GS.base wrmsr // Call the corresponding Rust entrypoint according to the boot entrypoint.