From eb8eb440b3f710ee6dc3125ff4062ee5b68def20 Mon Sep 17 00:00:00 2001
From: Zhang Junyang <zhangjunyang.zjy@antgroup.com>
Date: Fri, 4 Aug 2023 11:33:07 +0800
Subject: [PATCH] Initialize FxsaveArea with zero

---
 framework/jinux-frame/src/arch/x86/cpu.rs | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/framework/jinux-frame/src/arch/x86/cpu.rs b/framework/jinux-frame/src/arch/x86/cpu.rs
index 560536555..b825867d4 100644
--- a/framework/jinux-frame/src/arch/x86/cpu.rs
+++ b/framework/jinux-frame/src/arch/x86/cpu.rs
@@ -336,11 +336,7 @@ impl FpRegs {
     pub fn new() -> Self {
         // The buffer address requires 16bytes alignment.
         Self {
-            buf: unsafe {
-                // FIXME: This is an UB. The initialization could be done in a controlled manner.
-                #[allow(clippy::uninit_assumed_init)]
-                MaybeUninit::uninit().assume_init()
-            },
+            buf: FxsaveArea { data: [0; 512] },
             is_valid: false,
         }
     }