Commit Graph

516 Commits

Author SHA1 Message Date
Hsy-Intel 24d56cfde7 adjust feature enabling sequence and fix xsave size function 2025-07-22 17:15:53 +08:00
Marsman1996 b04d62ae71 Use official minicov and add unit test for coverage feature 2025-07-22 10:31:56 +08:00
YanWQ-monad 79335b272f Add coverage support
Co-authored-by: Marsman1996 <lqliuyuwei@outlook.com>
2025-07-22 10:31:56 +08:00
Zhang Junyang 6a4d8d113f Fix missing updates of page table `Entry::pte`
Co-authored-by: Xungan2 <2100012996@stu.pku.edu.cn>
2025-07-21 13:42:38 +08:00
Ruihan Li bc7515389b Create a RISC-V boot code and data section 2025-07-21 10:01:02 +08:00
Ruihan Li e475009fe7 Optimize the x86 binary size 2025-07-21 10:01:02 +08:00
jiangjianfeng 424fcda239 Use iret instead of sysret if the context is not clean 2025-07-20 22:22:20 +08:00
Qingsong Chen 6cd53fbb8a Refactor FPU context using pre_schedule_handler 2025-07-18 11:40:16 +08:00
Ruihan Li cdd7950d2e Remove some variants in `ostd::Error` 2025-07-15 23:05:30 +08:00
Ruihan Li e5c5bc7992 Clarify safety comments in `dyn_cpu_local.rs` 2025-07-11 14:10:46 +08:00
jiangjianfeng 665de6bd35 Make RISC-V code compile under new exception APIs 2025-07-09 10:49:43 +08:00
jiangjianfeng 7f3ca86467 Refactor x86 exception related code 2025-07-09 10:49:43 +08:00
Ruihan Li 801ab865b7 Make paths of `TrapFrame` unique 2025-07-05 18:19:26 +08:00
Ruihan Li 0fce977b40 Clean up `trapframe` items 2025-07-05 18:19:26 +08:00
Ruihan Li 6f2725419f Always clear the need-preempt flag 2025-07-04 19:14:31 +08:00
Wang Siyuan a13297ae4c Add fields in `/proc/*/stat` and `/proc/*/status` 2025-07-02 20:13:47 +08:00
Ruihan Li ac0d92d878 Fix minor issues of the CPU extension module 2025-07-02 07:54:40 +08:00
jiangjianfeng 49ef0e9f7a Change the documentation website of OSTD 2025-07-01 17:07:28 +08:00
jiangjianfeng 2e09957ef9 Fix documentation check errors 2025-07-01 17:07:28 +08:00
jiangjianfeng dc26e18310 Depend on int-to-c-enum instead of num crate 2025-06-30 15:48:40 +08:00
Zhang Junyang c7f489b726 Bump version to 0.15.2 2025-06-26 08:16:22 +08:00
Ruihan Li 780b35848e Remove `SameSizeAs` 2025-06-25 15:57:23 +08:00
Ruihan Li 59e7d268d7 Tidy up the `PageTableEntryTrait` comments 2025-06-25 15:57:23 +08:00
Ruihan Li 35e0918bce Don't race between enabling IRQs and halting CPU 2025-06-23 22:53:35 +08:00
Ruihan Li b96c8f9ed2 Make `ostd::trap::irq` public 2025-06-23 22:53:35 +08:00
Ruihan Li a1accf4304 Do some miscellaneous page table cleanups 2025-06-22 16:46:07 +08:00
Ruihan Li a3c5ab8cb4 Move virtio-mmio bus outside OSTD 2025-06-19 15:10:42 +08:00
Ruihan Li 238b89da46 Create `IrqChip` abstraction 2025-06-19 15:10:42 +08:00
Ruihan Li 76377f701b Restrict some module visibility 2025-06-19 15:10:42 +08:00
Philipp Schuster 7a398167cf ostd: update multiboot2 + use constant 2025-06-16 16:10:54 +08:00
Wang Siyuan d5b12532a8 Require `T: Send` for `CpuLocal<T, S>` 2025-06-16 12:09:13 +08:00
Hsy-Intel c2a49bca7c Temporary fix for TDX MMIO assert issue 2025-06-13 10:31:25 +08:00
Wang Siyuan 614ac85bd4 Bump the project version 2025-06-12 22:35:54 +08:00
Zhang Junyang e78927b449 Manage frame tracking outside the page table 2025-06-12 22:34:46 +08:00
Zhang Junyang 2c917ba383 Unify page table template parameters 2025-06-12 22:34:46 +08:00
Zhang Junyang 22ccfb1f2b Move COW out of OSTD 2025-06-12 22:34:46 +08:00
Cautreoxit 3e32a38316 Add sys_close_range 2025-06-11 19:56:12 +08:00
Zejun Zhao 492898d1d5 Fix the detection of RISC-V SSTC extension 2025-06-11 16:54:59 +08:00
Zejun Zhao bd24ed9ba7 Support RISC-V ISA extension detection 2025-06-11 16:54:59 +08:00
jiangjianfeng ead5a70444 Replace proc_macro APIs with proc_macro2 APIs in ostd_macros 2025-06-09 18:51:35 +08:00
Wang Siyuan 58e4f45bb1 Add per-CPU counters and track RSS for each `Vmar` 2025-06-03 23:24:32 +08:00
Wang Siyuan dfd3042276 Add dynamically-allocated CPU-local objects 2025-06-03 23:24:32 +08:00
Ruihan Li f24bc718fa Use `IoMem::acquire` in the virtio-mmio bus 2025-06-03 21:01:03 +08:00
Zejun Zhao 3790f616fd Rename `PageProperty::new` to `PageProperty::new_user` 2025-06-03 18:42:53 +08:00
Zejun Zhao e669d38d2d Clear User bits of non-leaf PTE in boot pagetable 2025-06-03 18:42:53 +08:00
Ruihan Li 3f8dbe6990 Add `unsafe` with trivial cleanups 2025-06-03 15:00:13 +08:00
Ruihan Li 3bc4424a5b Add `unsafe` with explained comments 2025-06-03 15:00:13 +08:00
Ruihan Li 619814e652 Add `unsafe` with caller-upheld comments 2025-06-03 15:00:13 +08:00
Ruihan Li 31dbae5330 Add `unsafe` for acquring I/O memory/port 2025-06-03 15:00:13 +08:00
Ruihan Li e1e5f9f575 Remove `transmute` in `Vm{Reader,Writer}` 2025-06-03 15:00:13 +08:00