asterinas/ostd/src
Zhe Tang 2796c8d1ad Add unit tests for the newly implemented methods related to `IoMem` 2025-09-05 10:47:43 +08:00
..
arch Move the `AVAIL1` flag from `PageFlags` to `PrivilegedPageFlags` in `PageProperty` 2025-09-05 10:47:43 +08:00
boot Unify address and size APIs for memory objects 2025-09-02 17:53:55 +08:00
bus Use `size_of`/`align_of` in the prelude 2025-09-04 09:26:56 +08:00
cpu Use `size_of`/`align_of` in the prelude 2025-09-04 09:26:56 +08:00
io Use `size_of`/`align_of` in the prelude 2025-09-04 09:26:56 +08:00
mm Add unit tests for the newly implemented methods related to `IoMem` 2025-09-05 10:47:43 +08:00
sync Use `size_of`/`align_of` in the prelude 2025-09-04 09:26:56 +08:00
task Add an explicit end of call stack for x86_64 and loongarch64 2025-08-29 17:10:48 +08:00
timer Add fields in `/proc/*/stat` and `/proc/*/status` 2025-07-02 20:13:47 +08:00
trap Use `IrqLine` abstraction for RISC-V timer interrupt 2025-08-29 10:49:48 +08:00
util Remove some variants in `ostd::Error` 2025-07-15 23:05:30 +08:00
console.rs Adjust RISC-V's implementation for recent changes 2025-04-18 13:26:16 +08:00
coverage.rs Use official minicov and add unit test for coverage feature 2025-07-22 10:31:56 +08:00
error.rs Remove some variants in `ostd::Error` 2025-07-15 23:05:30 +08:00
lib.rs Add the boot section of LoongArch in OSTD 2025-07-25 17:37:24 +08:00
logger.rs Polish the Rust doc of OSTD's logger module 2025-08-12 10:55:24 +08:00
panic.rs Fix LOONGARCH clippy warnings 2025-08-19 19:20:54 +08:00
prelude.rs Unify address and size APIs for memory objects 2025-09-02 17:53:55 +08:00
smp.rs Make paths of `TrapFrame` unique 2025-07-05 18:19:26 +08:00
user.rs Use `IrqLine` abstraction for RISC-V timer interrupt 2025-08-29 10:49:48 +08:00