/*
 * @(#)sparc.gcc	10.1 (Sleepycat) 4/12/97
 *
 * The ldstub instruction takes the location specified by its first argument
 * (a register containing a memory address) and loads its contents into its
 * second argument (a register) and atomically sets the contents the location
 * specified by its first argument to a byte of 1s.  (The value in the second
 * argument is never read, but only overwritten.)
 *
 * The membar instructions are needed to ensure that writes to the lock are
 * correctly ordered with writes that occur later in the instruction stream.
 *
 * For gcc/sparc, 0 is clear, 1 is set.
 */

#if defined(__sparcv9__)
Does the following code need membar instructions for V9 processors?
#endif

#define	TSL_SET(tsl) ({							\
	register tsl_t *__l = (tsl);					\
	register tsl_t __r;						\
	__asm__ volatile						\
	    ("ldstub [%1],%0"						\
	    : "=r"( __r) : "r" (__l));					\
	!__r;								\
})

#define	TSL_UNSET(tsl) ({						\
         register tsl_t *__l = (tsl);					\
        __asm__ volatile ("stb %%g0,[%0]" : : "r" (__l));		\
})
#define	TSL_INIT(tsl)	TSL_UNSET(tsl)
