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x86_64: Fix svml_d_tanh2_core_sse4.S code formatting 

This commit contains following formatting changes

1. Instructions proceeded by a tab.
2. Instruction less than 8 characters in length have a tab
   between it and the first operand.
3. Instruction greater than 7 characters in length have a
   space between it and the first operand.
4. Tabs after `#define`d names and their value.
5. 8 space at the beginning of line replaced by tab.
6. Indent comments with code.
7. Remove redundent .text section.
8. 1 space between line content and line comment.
9. Space after all commas.

Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
This commit is contained in:
Sunil K Pandey 2022-03-07 10:47:15 -08:00
parent 2c632117bf
commit 06c7208f27
1 changed files with 1158 additions and 1160 deletions
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72
sysdeps/x86_64/fpu/multiarch/svml_d_tanh2_core_sse4.S
View File

@ -28,7 +28,7 @@
* and to approximate tanh(.) with a polynomial on each of them.
*
* IEEE SPECIAL CONDITIONS:
* x = [+,-]0, r = [+,-]0
* x = [+, -]0, r = [+, -]0
* x = +Inf, r = +1
* x = -Inf, r = -1
* x = QNaN, r = QNaN
@ -82,8 +82,7 @@
#include <sysdep.h>
.text
.section .text.sse4,"ax",@progbits
.section .text.sse4, "ax", @progbits
ENTRY(_ZGVbN2v_tanh_sse4)
subq $72, %rsp
cfi_def_cfa_offset(80)
@ -92,11 +91,11 @@ ENTRY(_ZGVbN2v_tanh_sse4)
lea _dbP+96+__svml_dtanh_data_internal(%rip), %rsi
pshufd $221, %xmm13, %xmm8
/* if VMIN, VMAX is defined for I type */
/* if VMIN, VMAX is defined for I type */
pxor %xmm10, %xmm10
movq _iMinIdxOfsMask+__svml_dtanh_data_internal(%rip), %xmm9
/* Here huge arguments, INF and NaNs are filtered out to callout. */
/* Here huge arguments, INF and NaNs are filtered out to callout. */
pand %xmm14, %xmm8
movdqa %xmm8, %xmm11
psubd %xmm9, %xmm8
@ -111,7 +110,7 @@ ENTRY(_ZGVbN2v_tanh_sse4)
andnps %xmm8, %xmm3
orps %xmm5, %xmm3
/*
/*
* VSHRIMM( I, iIndex, = iIndex, (17 - 4) );
* VGATHER_MATRIX( L2D, p, TAB._dbP, iIndex, 0, T_ITEM_SIZE, T_ITEM_GRAN, 13, 0, 0 );
*/
@ -119,7 +118,7 @@ ENTRY(_ZGVbN2v_tanh_sse4)
movd %xmm3, %eax
pshufd $1, %xmm3, %xmm4
/* Constant loading */
/* Constant loading */
movq _iExpMask+__svml_dtanh_data_internal(%rip), %xmm15
movd %xmm4, %ecx
pcmpgtd %xmm15, %xmm11
@ -131,37 +130,37 @@ ENTRY(_ZGVbN2v_tanh_sse4)
andps %xmm13, %xmm12
movslq %ecx, %rcx
movups %xmm13, (%rsp)
movups -96(%rax,%rsi), %xmm11
movups -96(%rcx,%rsi), %xmm2
movups -80(%rax,%rsi), %xmm9
movups -48(%rax,%rsi), %xmm5
movups -96(%rax, %rsi), %xmm11
movups -96(%rcx, %rsi), %xmm2
movups -80(%rax, %rsi), %xmm9
movups -48(%rax, %rsi), %xmm5
movaps %xmm9, %xmm10
movups -32(%rax,%rsi), %xmm3
movups -32(%rax, %rsi), %xmm3
movaps %xmm5, %xmm6
movaps %xmm3, %xmm4
unpckhpd %xmm2, %xmm11
movups -80(%rcx,%rsi), %xmm13
movups -48(%rcx,%rsi), %xmm15
movups -32(%rcx,%rsi), %xmm1
movups -64(%rax,%rsi), %xmm7
movups -16(%rax,%rsi), %xmm2
movups -80(%rcx, %rsi), %xmm13
movups -48(%rcx, %rsi), %xmm15
movups -32(%rcx, %rsi), %xmm1
movups -64(%rax, %rsi), %xmm7
movups -16(%rax, %rsi), %xmm2
movaps %xmm7, %xmm8
unpcklpd %xmm13, %xmm10
unpckhpd %xmm13, %xmm9
movups -64(%rcx,%rsi), %xmm14
movups -16(%rcx,%rsi), %xmm13
movups -64(%rcx, %rsi), %xmm14
movups -16(%rcx, %rsi), %xmm13
unpcklpd %xmm15, %xmm6
unpckhpd %xmm15, %xmm5
unpcklpd %xmm1, %xmm4
unpckhpd %xmm1, %xmm3
movaps %xmm2, %xmm1
movups (%rax,%rsi), %xmm15
movups (%rax, %rsi), %xmm15
unpcklpd %xmm14, %xmm8
unpckhpd %xmm14, %xmm7
unpcklpd %xmm13, %xmm1
unpckhpd %xmm13, %xmm2
movaps %xmm15, %xmm13
movups (%rcx,%rsi), %xmm14
movups (%rcx, %rsi), %xmm14
unpcklpd %xmm14, %xmm13
addpd %xmm13, %xmm0
mulpd %xmm0, %xmm2
@ -187,11 +186,11 @@ ENTRY(_ZGVbN2v_tanh_sse4)
orps %xmm12, %xmm0
andl $3, %edx
/* Go to special inputs processing branch */
/* Go to special inputs processing branch */
jne L(SPECIAL_VALUES_BRANCH)
# LOE rbx rbp r12 r13 r14 r15 edx xmm0
/* Restore registers
/* Restore registers
* and exit the function
*/
@ -201,7 +200,7 @@ L(EXIT):
ret
cfi_def_cfa_offset(80)
/* Branch to process
/* Branch to process
* special inputs
*/
@ -222,18 +221,18 @@ L(SPECIAL_VALUES_BRANCH):
cfi_offset(14, -80)
# LOE rbx rbp r15 r12d r13d
/* Range mask
/* Range mask
* bits check
*/
L(RANGEMASK_CHECK):
btl %r12d, %r13d
/* Call scalar math function */
/* Call scalar math function */
jc L(SCALAR_MATH_CALL)
# LOE rbx rbp r15 r12d r13d
/* Special inputs
/* Special inputs
* processing loop
*/
@ -241,7 +240,7 @@ L(SPECIAL_VALUES_LOOP):
incl %r12d
cmpl $2, %r12d
/* Check bits in range mask */
/* Check bits in range mask */
jl L(RANGEMASK_CHECK)
# LOE rbx rbp r15 r12d r13d
@ -253,26 +252,26 @@ L(SPECIAL_VALUES_LOOP):
cfi_restore(14)
movups 48(%rsp), %xmm0
/* Go to exit */
/* Go to exit */
jmp L(EXIT)
cfi_offset(12, -64)
cfi_offset(13, -72)
cfi_offset(14, -80)
# LOE rbx rbp r12 r13 r14 r15 xmm0
/* Scalar math fucntion call
/* Scalar math fucntion call
* to process special input
*/
L(SCALAR_MATH_CALL):
movl %r12d, %r14d
movsd 32(%rsp,%r14,8), %xmm0
movsd 32(%rsp, %r14, 8), %xmm0
call tanh@PLT
# LOE rbx rbp r14 r15 r12d r13d xmm0
movsd %xmm0, 48(%rsp,%r14,8)
movsd %xmm0, 48(%rsp, %r14, 8)
/* Process special inputs in loop */
/* Process special inputs in loop */
jmp L(SPECIAL_VALUES_LOOP)
# LOE rbx rbp r15 r12d r13d
END(_ZGVbN2v_tanh_sse4)
@ -282,8 +281,7 @@ END(_ZGVbN2v_tanh_sse4)
#ifdef __svml_dtanh_data_internal_typedef
typedef unsigned int VUINT32;
typedef struct
{
typedef struct {
__declspec(align(16)) VUINT32 _dbP[60*16][2];
__declspec(align(16)) VUINT32 _dbSignMask[2][2];
__declspec(align(16)) VUINT32 _dbAbsMask[2][2];
@ -1268,5 +1266,5 @@ __svml_dtanh_data_internal:
.align 16
.long 0x00760000, 0x00760000, 0x00760000, 0x00760000 /* _iMaxIdxMask */
.align 16
.type __svml_dtanh_data_internal,@object
.size __svml_dtanh_data_internal,.-__svml_dtanh_data_internal
.type __svml_dtanh_data_internal, @object
.size __svml_dtanh_data_internal, .-__svml_dtanh_data_internal