mirror of git://sourceware.org/git/glibc.git
[powerpc] Use __builtin_{mffs,mtfsf}
Replace inline asm uses of the "mffs" and "mtfsf" instructions with the analogous GCC builtins. __builtin_mffs and __builtin_mtfsf are both available in GCC 5 and above. Given the minimum GCC level for GLibC is now GCC 6.2, it is safe to use these builtins without restriction. 2019-03-29 Paul A. Clarke <pc@us.ibm.com> * sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_register): Replace inline asm with builtin. * sysdeps/powerpc/powerpc64/le/fpu/sfp-machine.h (FP_INIT_ROUNDMODE): Likewise. * sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise. (_GET_SI_FPSCR): Likewise. (_SET_SI_FPSCR): Likewise.
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ChangeLog
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@ -1,3 +1,13 @@
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2019-03-29 Paul A. Clarke <pc@us.ibm.com>
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* sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_register): Replace inline
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asm with builtin.
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* sysdeps/powerpc/powerpc64/le/fpu/sfp-machine.h (FP_INIT_ROUNDMODE):
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Likewise.
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* sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise.
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(_GET_SI_FPSCR): Likewise.
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(_SET_SI_FPSCR): Likewise.
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2019-03-26 Adhemerval Zanella <adhemerval.zanella@linaro.org>
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2019-03-26 Adhemerval Zanella <adhemerval.zanella@linaro.org>
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* math/math.h (fpclassify, isfinite, isnormal, isnan): Use builtin for
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* math/math.h (fpclassify, isfinite, isnormal, isnan): Use builtin for
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@ -32,8 +32,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
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/* Equivalent to fegetenv, but returns a fenv_t instead of taking a
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/* Equivalent to fegetenv, but returns a fenv_t instead of taking a
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pointer. */
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pointer. */
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#define fegetenv_register() \
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#define fegetenv_register() __builtin_mffs()
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({ fenv_t env; asm volatile ("mffs %0" : "=f" (env)); env; })
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/* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */
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/* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */
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#define fesetenv_register(env) \
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#define fesetenv_register(env) \
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@ -45,7 +44,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
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"mtfsf 0xff,%0,1,0; " \
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"mtfsf 0xff,%0,1,0; " \
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".machine pop" : : "f" (d)); \
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".machine pop" : : "f" (d)); \
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else \
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else \
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asm volatile ("mtfsf 0xff,%0" : : "f" (d)); \
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__builtin_mtfsf (0xff, d); \
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} while(0)
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} while(0)
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/* This very handy macro:
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/* This very handy macro:
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@ -97,9 +97,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
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/* Macros for accessing the hardware control word on Power6[x]. */
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/* Macros for accessing the hardware control word on Power6[x]. */
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#define _GET_DI_FPSCR(__fpscr) \
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#define _GET_DI_FPSCR(__fpscr) \
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({union { double d; di_fpscr_t fpscr; } u; \
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({union { double d; di_fpscr_t fpscr; } u; \
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register double fr; \
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u.d = __builtin_mffs (); \
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__asm__ ("mffs %0" : "=f" (fr)); \
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u.d = fr; \
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(__fpscr) = u.fpscr; \
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(__fpscr) = u.fpscr; \
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u.fpscr; \
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u.fpscr; \
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})
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})
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@ -121,9 +119,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
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# define _GET_SI_FPSCR(__fpscr) \
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# define _GET_SI_FPSCR(__fpscr) \
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({union { double d; di_fpscr_t fpscr; } u; \
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({union { double d; di_fpscr_t fpscr; } u; \
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register double fr; \
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u.d = __builtin_mffs (); \
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__asm__ ("mffs %0" : "=f" (fr)); \
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u.d = fr; \
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(__fpscr) = (si_fpscr_t) u.fpscr; \
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(__fpscr) = (si_fpscr_t) u.fpscr; \
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(si_fpscr_t) u.fpscr; \
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(si_fpscr_t) u.fpscr; \
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})
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})
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@ -137,7 +133,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
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u.fpscr = 0xfff80000ULL << 32; \
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u.fpscr = 0xfff80000ULL << 32; \
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u.fpscr |= __fpscr & 0xffffffffULL; \
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u.fpscr |= __fpscr & 0xffffffffULL; \
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fr = u.d; \
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fr = u.d; \
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__asm__ ("mtfsf 255,%0" : : "f" (fr)); \
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__builtin_mtfsf (255, fr); \
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fr = 0.0; \
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fr = 0.0; \
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}
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}
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@ -107,8 +107,7 @@ void __sfp_handle_exceptions (int);
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#define FP_INIT_ROUNDMODE \
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#define FP_INIT_ROUNDMODE \
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do { \
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do { \
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__asm__ __volatile__ ("mffs %0" \
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_fpscr.d = __builtin_mffs (); \
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: "=f" (_fpscr.d)); \
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} while (0)
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} while (0)
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# define FP_ROUNDMODE (_fpscr.i & FP_RND_MASK)
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# define FP_ROUNDMODE (_fpscr.i & FP_RND_MASK)
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