[powerpc] Use __builtin_{mffs,mtfsf}

Replace inline asm uses of the "mffs" and "mtfsf" instructions with
the analogous GCC builtins.

__builtin_mffs and __builtin_mtfsf are both available in GCC 5 and above.
Given the minimum GCC level for GLibC is now GCC 6.2, it is safe to use
these builtins without restriction.

2019-03-29  Paul A. Clarke  <pc@us.ibm.com>

	* sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_register): Replace inline
	asm with builtin.
	* sysdeps/powerpc/powerpc64/le/fpu/sfp-machine.h (FP_INIT_ROUNDMODE):
	Likewise.
	* sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise.
	(_GET_SI_FPSCR): Likewise.
	(_SET_SI_FPSCR): Likewise.
This commit is contained in:
Paul A. Clarke 2019-03-29 19:16:34 -05:00
parent 225d94459b
commit 10cce66930
4 changed files with 16 additions and 12 deletions

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@ -1,3 +1,13 @@
2019-03-29 Paul A. Clarke <pc@us.ibm.com>
* sysdeps/powerpc/fpu/fenv_libc.h (fegetenv_register): Replace inline
asm with builtin.
* sysdeps/powerpc/powerpc64/le/fpu/sfp-machine.h (FP_INIT_ROUNDMODE):
Likewise.
* sysdeps/powerpc/fpu/tst-setcontext-fpscr.c (_GET_DI_FPSCR): Likewise.
(_GET_SI_FPSCR): Likewise.
(_SET_SI_FPSCR): Likewise.
2019-03-26 Adhemerval Zanella <adhemerval.zanella@linaro.org> 2019-03-26 Adhemerval Zanella <adhemerval.zanella@linaro.org>
* math/math.h (fpclassify, isfinite, isnormal, isnan): Use builtin for * math/math.h (fpclassify, isfinite, isnormal, isnan): Use builtin for

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@ -32,8 +32,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
/* Equivalent to fegetenv, but returns a fenv_t instead of taking a /* Equivalent to fegetenv, but returns a fenv_t instead of taking a
pointer. */ pointer. */
#define fegetenv_register() \ #define fegetenv_register() __builtin_mffs()
({ fenv_t env; asm volatile ("mffs %0" : "=f" (env)); env; })
/* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */ /* Equivalent to fesetenv, but takes a fenv_t instead of a pointer. */
#define fesetenv_register(env) \ #define fesetenv_register(env) \
@ -45,7 +44,7 @@ extern const fenv_t *__fe_mask_env (void) attribute_hidden;
"mtfsf 0xff,%0,1,0; " \ "mtfsf 0xff,%0,1,0; " \
".machine pop" : : "f" (d)); \ ".machine pop" : : "f" (d)); \
else \ else \
asm volatile ("mtfsf 0xff,%0" : : "f" (d)); \ __builtin_mtfsf (0xff, d); \
} while(0) } while(0)
/* This very handy macro: /* This very handy macro:

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@ -97,9 +97,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
/* Macros for accessing the hardware control word on Power6[x]. */ /* Macros for accessing the hardware control word on Power6[x]. */
#define _GET_DI_FPSCR(__fpscr) \ #define _GET_DI_FPSCR(__fpscr) \
({union { double d; di_fpscr_t fpscr; } u; \ ({union { double d; di_fpscr_t fpscr; } u; \
register double fr; \ u.d = __builtin_mffs (); \
__asm__ ("mffs %0" : "=f" (fr)); \
u.d = fr; \
(__fpscr) = u.fpscr; \ (__fpscr) = u.fpscr; \
u.fpscr; \ u.fpscr; \
}) })
@ -121,9 +119,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
# define _GET_SI_FPSCR(__fpscr) \ # define _GET_SI_FPSCR(__fpscr) \
({union { double d; di_fpscr_t fpscr; } u; \ ({union { double d; di_fpscr_t fpscr; } u; \
register double fr; \ u.d = __builtin_mffs (); \
__asm__ ("mffs %0" : "=f" (fr)); \
u.d = fr; \
(__fpscr) = (si_fpscr_t) u.fpscr; \ (__fpscr) = (si_fpscr_t) u.fpscr; \
(si_fpscr_t) u.fpscr; \ (si_fpscr_t) u.fpscr; \
}) })
@ -137,7 +133,7 @@ typedef unsigned int si_fpscr_t __attribute__ ((__mode__ (__SI__)));
u.fpscr = 0xfff80000ULL << 32; \ u.fpscr = 0xfff80000ULL << 32; \
u.fpscr |= __fpscr & 0xffffffffULL; \ u.fpscr |= __fpscr & 0xffffffffULL; \
fr = u.d; \ fr = u.d; \
__asm__ ("mtfsf 255,%0" : : "f" (fr)); \ __builtin_mtfsf (255, fr); \
fr = 0.0; \ fr = 0.0; \
} }

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@ -107,8 +107,7 @@ void __sfp_handle_exceptions (int);
#define FP_INIT_ROUNDMODE \ #define FP_INIT_ROUNDMODE \
do { \ do { \
__asm__ __volatile__ ("mffs %0" \ _fpscr.d = __builtin_mffs (); \
: "=f" (_fpscr.d)); \
} while (0) } while (0)
# define FP_ROUNDMODE (_fpscr.i & FP_RND_MASK) # define FP_ROUNDMODE (_fpscr.i & FP_RND_MASK)