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x86: Check the lower byte of EAX of CPUID leaf 2 [BZ #30643] 

The old Intel software developer manual specified that the low byte of
EAX of CPUID leaf 2 returned 1 which indicated the number of rounds of
CPUDID leaf 2 was needed to retrieve the complete cache information. The
newer Intel manual has been changed to that it should always return 1
and be ignored.  If the lower byte isn't 1, CPUID leaf 2 can't be used.
In this case, we ignore CPUID leaf 2 and use CPUID leaf 4 instead.  If
CPUID leaf 4 doesn't contain the cache information, cache information
isn't available at all.  This addresses BZ #30643.
This commit is contained in:
H.J. Lu 2023-08-28 12:08:14 -07:00
parent e1d3312015
commit 1493622f4f
1 changed files with 13 additions and 18 deletions
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19
sysdeps/x86/dl-cacheinfo.h
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@ -187,7 +187,7 @@ intel_check_word (int name, unsigned int value, bool *has_level_2,
++round; ++round;
} }
/* There is no other cache information anywhere else. */ /* There is no other cache information anywhere else. */
break; return -1;
} }
else else
{ {
@ -257,28 +257,23 @@ handle_intel (int name, const struct cpu_features *cpu_features)
/* OK, we can use the CPUID instruction to get all info about the /* OK, we can use the CPUID instruction to get all info about the
caches. */ caches. */
unsigned int cnt = 0;
unsigned int max = 1;
long int result = 0; long int result = 0;
bool no_level_2_or_3 = false; bool no_level_2_or_3 = false;
bool has_level_2 = false; bool has_level_2 = false;
while (cnt++ < max)
{
unsigned int eax; unsigned int eax;
unsigned int ebx; unsigned int ebx;
unsigned int ecx; unsigned int ecx;
unsigned int edx; unsigned int edx;
__cpuid (2, eax, ebx, ecx, edx); __cpuid (2, eax, ebx, ecx, edx);
/* The low byte of EAX in the first round contain the number of /* The low byte of EAX of CPUID leaf 2 should always return 1 and it
rounds we have to make. At least one, the one we are already should be ignored. If it isn't 1, use CPUID leaf 4 instead. */
doing. */ if ((eax & 0xff) != 1)
if (cnt == 1) return intel_check_word (name, 0xff, &has_level_2, &no_level_2_or_3,
cpu_features);
else
{ {
max = eax & 0xff;
eax &= 0xffffff00; eax &= 0xffffff00;
}
/* Process the individual registers' value. */ /* Process the individual registers' value. */
result = intel_check_word (name, eax, &has_level_2, result = intel_check_word (name, eax, &has_level_2,