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RISC-V: Use builtin for ffs and ffsll while supported extension available 

Hardware ctz instructions are available in the RISC-V Zbb and XTheadBb extension. With special `-march` flags defined, we can generate more simplified code compared to the generic implementation of `ffs`/`ffsll`.

Signed-off-by: Julian Zhu <julian.oerv@isrc.iscas.ac.cn>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
This commit is contained in:
Julian Zhu 2024-11-08 21:41:43 +08:00 committed by Adhemerval Zanella
parent 2be836fe44
commit 4c966c0780
1 changed files with 10 additions and 0 deletions
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sysdeps/riscv/math-use-builtins-ffs.h Normal file
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#if __GNUC_PREREQ (12, 0) && defined __riscv_zbb
# define USE_FFS_BUILTIN 1
# define USE_FFSLL_BUILTIN 1
#elif __GNUC_PREREQ (13, 0) && defined __riscv_xtheadbb
# define USE_FFS_BUILTIN 0
# define USE_FFSLL_BUILTIN 1
#else
# define USE_FFS_BUILTIN 0
# define USE_FFSLL_BUILTIN 0
#endif