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x86: Add comment explaining no Slow_SSE4_2 check in ifunc-sse4_2 

Just for clarities sake and so that if a future implementation is
added we remember to add the check.
This commit is contained in:
Noah Goldstein 2022-07-03 21:28:06 -07:00
parent e070501d12
commit baeae86fb8
1 changed files with 6 additions and 0 deletions
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6
sysdeps/x86_64/multiarch/ifunc-sse4_2.h
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@ -27,6 +27,12 @@ IFUNC_SELECTOR (void)
{ {
const struct cpu_features* cpu_features = __get_cpu_features (); const struct cpu_features* cpu_features = __get_cpu_features ();
/* This function uses the `pcmpstri` sse4.2 instruction which can be
slow on some CPUs. This normally would be guarded by a
Slow_SSE4_2 check, but since there is no other optimized
implementation its best to keep it regardless. If an optimized
fallback is added add a X86_ISA_CPU_FEATURE_ARCH_P (cpu_features,
Slow_SSE4_2) check. */
if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2)) if (CPU_FEATURE_USABLE_P (cpu_features, SSE4_2))
return OPTIMIZE (sse42); return OPTIMIZE (sse42);