Commit Graph

42510 Commits

Author SHA1 Message Date
Martin Coufal 69f8b3e7de resource/Makefile: Split and sort tests
Split and sort tests in resource/Makefile.

Reviewed-by: Arjun Shankar <arjun@redhat.com>
2025-06-19 13:33:34 +02:00
Florian Weimer 124bf1fb6b malloc: Link large tcache tests with $(shared-thread-library)
Introduce tests-link-with-libpthread to list tests that
require linking with libpthread, and use that to generate
dependencies on $(shared-thread-library) for all multi-threaded tests.

Fixes build failures of commit cde5caa4bb
("malloc: add testing for large tcache support") on Hurd.

Reviewed-by: H.J. Lu <hjl.tools@gmail.com>
2025-06-19 12:42:12 +02:00
H.J. Lu 0ef7965e5b x86: Update tst-gnu2-tls2 tests
Update tst-gnu2-tls2 tests to set XMM0...XMM7 to all 1s in malloc to
verify that XMM registers are preserved when _dl_tlsdesc_dynamic is
called by clearing vectors with zeroed XMM registers before
_dl_tlsdesc_dynamic and using these XMM registers to clear vectors
after _dl_tlsdesc_dynamic.  This improves the BZ #31372 test.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Sam James <sam@gentoo.org>
2025-06-19 05:46:31 +08:00
H.J. Lu 848f0e46f0 i386: Update ___tls_get_addr to preserve vector registers
Compiler generates the following instruction sequence for dynamic TLS
access:

	leal	tls_var@tlsgd(,%ebx,1), %eax
	call	___tls_get_addr@PLT

CALL instruction is transparent to compiler which assumes all registers,
except for EFLAGS, AX, CX, and DX, are unchanged after CALL.  But
___tls_get_addr is a normal function which doesn't preserve any vector
registers.

1. Rename the generic __tls_get_addr function to ___tls_get_addr_internal.
2. Change ___tls_get_addr to a wrapper function with implementations for
FNSAVE, FXSAVE, XSAVE and XSAVEC to save and restore all vector registers.
3. dl-tlsdesc-dynamic.h has:

_dl_tlsdesc_dynamic:
	/* Like all TLS resolvers, preserve call-clobbered registers.
	   We need two scratch regs anyway.  */
	subl	$32, %esp
	cfi_adjust_cfa_offset (32)

It is wrong to use

	movl	%ebx, -28(%esp)
	movl	%esp, %ebx
	cfi_def_cfa_register(%ebx)
	...
	mov	%ebx, %esp
	cfi_def_cfa_register(%esp)
	movl	-28(%esp), %ebx

to preserve EBX on stack.  Fix it with:

	movl	%ebx, 28(%esp)
	movl	%esp, %ebx
	cfi_def_cfa_register(%ebx)
	...
	mov	%ebx, %esp
	cfi_def_cfa_register(%esp)
	movl	28(%esp), %ebx

4. Update _dl_tlsdesc_dynamic to call ___tls_get_addr_internal directly.
5. Add have-test-mtls-traditional to compile tst-tls23-mod.c with
traditional TLS variant to verify the fix.
6. Define DL_RUNTIME_RESOLVE_REALIGN_STACK in sysdeps/x86/sysdep.h.

This fixes BZ #32996.

Co-Authored-By: Adhemerval Zanella <adhemerval.zanella@linaro.org>
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-19 04:30:31 +08:00
Jitka Obselkova abc2e954af manual: Clarify renameat documentation
Clarify the meaning of renameat arguments.

Signed-off-by: Jitka Obselkova <jobselko@redhat.com>
Reviewed-by: Collin Funk <collin.funk1@gmail.com>
2025-06-18 16:03:20 -03:00
Collin Funk c3b9abaf33 posix: Add nonnull attribute to glob_pattern_p.
* posix/glob.h (glob_pattern_p): Add __nonnull ((1)) since this function
expects a string and does not check for NULL.

Signed-off-by: Collin Funk <collin.funk1@gmail.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-18 15:57:13 -03:00
Adhemerval Zanella f165e244e4 math: Simplify and optimize modf implementation
Refactor the generic implementation to use math_config.h definitions,
and add an alternative one if the ABI supports truncf instructions
(gated through math-use-builtins-trunc.h).

The generic implementation generates similar code on x86_64, while
the optimization one for aarch64 (where truncf is supported as a
builtin by through frintz), the improvements are:

reciprocal-throughput           master    patch    difference
workload-0_1                    3.0595   3.0698        -0.34%
workload-1_maxint               5.1747   3.0542        40.98%
workload-maxint_maxfloat        3.4391   3.0349        11.75%
workload-integral               3.2732   3.0293         7.45%

latency                         master    patch    difference
workload-0_1                    3.5267   4.7107       -33.57%
workload-1_maxint               6.9074   4.7282        31.55%
workload-maxint_maxfloat        3.7210   4.7506       -27.67%
workload-integral               3.8634   4.8137       -24.60%

Checked on aarch64-linux-gnu and x86_64-linux-gnu.
Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-18 15:56:40 -03:00
Adhemerval Zanella 61cc9922f3 math: Simplify and optimize modff implementation
Refactor the generic implementation to use math_config.h definitions,
and add an alternative one if the ABI supports truncf instructions
(gated through math-use-builtins-trunc.h).

The generic implementation generates similar code for x86_64, while
the optimization path aarch64 (where truncf is supported as a builtin)
through frintz), the improvements are:

reciprocal-throughput           master     patch    difference
workload-0_1                    3.0740    3.0326         1.35%
workload-1_maxint               5.2231    3.0436        41.73%
workload-maxint_maxfloat        4.0962    3.0551        25.42%
workload-integral               3.7093    3.0612        17.47%

latency                         master     patch    difference
workload-0_1                    3.5521    4.7313       -33.20%
workload-1_maxint               6.7148    4.7314        29.54%
workload-maxint_maxfloat        4.0458    4.7518       -17.45%
workload-integral               3.9719    4.7427       -19.40%

Checked on aarch64-linux-gnu and x86_64-linux-gnu.
Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-18 15:56:00 -03:00
Luna Lamb 6849c5b791 AArch64: Improve codegen SVE log1p helper
Improve codegen by packing coefficients.
4% and 2% improvement in throughput microbenchmark on Neoverse V1, for acosh
and atanh respectively.

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-18 17:28:51 +00:00
Dylan Fleming dee22d2a81 AArch64: Optimise SVE FP64 Hyperbolics
Reworke SVE FP64 hyperbolics to use the SVE FEXPA
instruction.

Also update the special case handelling for large
inputs to be entirely vectorised.

Performance improvements on Neoverse V1:

cosh_sve: 19% for |x| < 709, 5x otherwise
sinh_sve: 24% for |x| < 709, 5.9x otherwise
tanh_sve: 12% for |x| < 19,  9x otherwise

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-18 17:28:51 +00:00
Dylan Fleming 1e3d1ddf97 AArch64: Optimize SVE exp functions
Improve performance of SVE exps by making better use
of the SVE FEXPA instruction.

Performance improvement on Neoverse V1:
exp2_sve:   21%
exp2f_sve:  24%
exp10f_sve: 23%
expm1_sve:  25%

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-18 17:28:51 +00:00
Adhemerval Zanella 8788bd77d6 sparc: Fix sparc32 Fix argument passing to __libc_start_main (BZ 32981)
Commit 404526ee2e changed _start to write
the last argument to __libc_start_main without taking into consideration
that the function did not create a full stack frame, which leads to
overwriting the argv[0].
2025-06-18 11:20:34 -03:00
Andreas Schwab 0dbbc44bfd Fix termios related targets
Move Linux-specific termios headers and tests from misc to termios subdir
and install newly added bits/termios-cbaud.h.
2025-06-18 16:12:43 +02:00
Wilco Dijkstra ba32fd7d04 malloc: Cleanup _mid_memalign
Remove unused 'address' parameter from _mid_memalign and callers.
Fix off-by-one alignment calculation in __libc_pvalloc.

Reviewed-by: DJ Delorie <dj@redhat.com>
2025-06-18 13:37:00 +00:00
Yury Khrustalev c0f0db2d59 aarch64: simplify calls to __libc_arm_za_disable in assembly
There is no functional change in this patch.

We remove stores and loads to stack, return address signing, and redundant
CFI directives before and after call to __libc_arm_za_disable().

The __libc_arm_za_disable implementation follows special calling convention
that allows to avoid most of the operations that would be necessary for a
call to a normal function (see [1] for details).

First, we rely on __libc_arm_za_disable() not clobbering certain registers,
and we put return address into one of these registers. Now we don't need
to store it on stack, so we don't need to sign return address using PAC.

Second, as a result of the above, we don't need to update the CFI offset.

This patch provides small optimisation avoiding unnecessary store and load
on stack also simplifies assembly code and CFI directives.

[1]: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-18 09:42:33 +01:00
Yury Khrustalev eeedfc2f74 aarch64: GCS: use internal struct in __alloc_gcs
No functional change here, just a small refactoring to simplify
using __alloc_gcs() for allocating shadow stacks.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-18 09:37:13 +01:00
Andreas Schwab eae5bb0f60 powerpc: Remove assembler workarounds
Now that we require at least binutils 2.39 the support for POWER9 and
POWER10 instructions can be assumed.
2025-06-18 09:29:10 +02:00
Adhemerval Zanella c274c3c07f malloc: Fix tests-malloc-largetcache tests
The commit cde5caa4bb added the
tests-malloc-largetcache without adjusting the previous entry.  The
make check fails with:

  make[1]: Entering directory '/path/to/glibc'
  make  subdir=csu -C csu ..=../ tests
  make[2]: Entering directory '/path/to/glibc/csu'
  make[2]: *** No rule to make target ')', needed by 'tests'.  Stop.
  make[2]: Leaving directory '/path/to/csu'
  make[1]: *** [Makefile:484: csu/tests] Error 2
2025-06-17 14:22:49 -03:00
Jeremy Harris 9f680bfe9b Add TCPI_OPT_USEC_TS from Linux 6.14 and TCPI_OPT_TFO_CHILD from 6.15 to netinet/tcp.h.
This patch adds the TCPI_OPT_USEC_TS constant from Linux 6.14 to
sysdeps/gnu/netinet/tcp.h

This patch adds the TCPI_OPT_TFO_CHILD constant from Linux 6.15 to
sysdeps/gnu/netinet/tcp.h

Signed-off-by: Jeremy Harris <jgh@exim.org>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:57:44 -03:00
H. Peter Anvin (Intel) 964cf50bef linux/termios: regression test for termios speed functions
Test that runs through a fairly large combination of the various
termios speed functions, for the new speed_t interface, for the old
speed_t interface (if enabled), and for the new baud_t interface.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-06-17 09:57:44 -03:00
H. Peter Anvin c66801f361 include/array_length.h: add array_foreach[_const] macros
Add simple-to-use iterator macros for arrays.  They are used instead
of explicit for statements, like:

      /* Test all common speeds */
      array_foreach_const (ts, test_speeds)
	test (fd, *ts);

In this case, ts will be a const pointer to each of the elements of
test_speeds in turn.

Named array_foreach*() to allow for other kinds of equivalent iterator
macros in the future.

Signed-off-by: "H. Peter Anvin" (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:57:40 -03:00
H. Peter Anvin (Intel) be413adedf termios: unify the naming of the termios speed fields
The generic code has __ispeed and __ospeed; Linux has c_ispeed and
c_ospeed. Use an anonymous union member to allow both set of names on
all platforms.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) 5f138519eb termios: add new baud_t interface, defined to be explicitly numeric
Add an explicitly numeric interface for baudrate setting. For glibc,
this only announces what is a fair accompli, but this is a plausible
way forward for standardization, and may be possible to infill on
non-compliant systems. The POSIX committee has stated:

[https://www.austingroupbugs.net/view.php?id=1916#c7135]

	A future version of this standard is expected to add at least
	the following symbolic constants for use as values of objects
	of type speed_t: B57600, B115200, B230400, B460800, and
	B921600.

	Implementations are encouraged to propose additional
	interfaces which will make it possible to set and query a
	wider range of speeds than just those enumerated by the
	constants beginning with B. If a set of common interfaces
	emerges between several implementations, a future version of
	this standard will likely add those interfaces.

This is exactly that interface.

The use of the term "baud" is due to the need to have a term
contrasting "speed", and it is already well established as a legacy
term -- including in the names of the legacy Bxxx
constants. Futhermore, it *is* valid from the point of view that the
termios interface fundamentally emulates an RS-232 serial port as far
as the application software is concerned.

The documentation states that for the current version of glibc,
speed_t == baud_t, but explicitly declares that this may not be the
case in the future.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) 98aeca349a manual: document all the termios Bxxx constants in the manual
Add all the Bxxx constants defined in the now-generic
<bits/termios-baud.h> in the manual.

Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) ad37ecd579 termios: merge the termios baud definitions
Now all platforms unconditionally use the "sane" definitions of the
termios baud constants. Unify them into a common file.

Note: I have made them explicitly unsigned to avoid problems with
compiler warnings for comparisons of unequal signedness or
similar. These constants were historically octal on most platforms,
and so unsigned by default.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) bbbaf50b2a hurd+generic/termios: make speed_t an unsigned int
POSIX requires that speed_t is an unsigned integer type, so change the
generic speed_t definition to be an unsigned int instead of a plain
int.

Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) de730d3d2d termios: change the generic cfsetspeed() to support arbitrary speeds
The generic implementaion of cfsetspeed() had an internal table of
permitted baud rates, which was enforced even on an implementation
supporting arbitrary baud rates. This was to be able to *also* accept
numeric constants as well as Bxxx values.

This fundamentally makes no sense; not only does it go against the
documented behavior of cfsetspeed() which is to take the same input
as cfset[io]speed(), but it means cfsetspeed() is broken with regard
to a platform supporting arbitrary speeds.

With Linux converted to arbitrary baud rates, the only remaining case
of non-arbitrary baud rates appears to be Hurd with USE_OLD_TTY, which
one can presume being a legacy case that few if any people care about,
and so simply strip out this code and make cfsetspeed() rely on
cfsetospeed() to validate acceptable speed constants.

If a new platform is introduced which does not have arbitrary baud
rate support, using non-baud rate Bxxx constants (highly not
recommended; should be abstracted at the glibc level) but such
aliasing is desired, it should be supported by cfset[io]speed() as
well, and belongs in the platform-specific code.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) bff11c2fa9 hurd/termios: remove USE_OLD_TTY
Hurd with USE_OLD_TTY was the only remaining platform with speed_t not
containing a proper baud rate. From the looks of it, that code has
long since bitrotted.

Remove the vestiges of USE_OLD_TTY.

Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) 5cf101a85a linux: implement arbitrary and split speeds in termios
Linux has supported arbitrary speeds and split speeds in the kernel
since 2008 on all platforms except Alpha (fixed in 2020), but glibc
was never updated to match. This is further complicated by POSIX uses
of macros for the cf[gs]et[io]speed interfaces, rather than plain
numbers, as it really ought to have.

On most platforms, the glibc ABI includes the c_[io]speed fields in
struct termios, but they are incorrectly used. On MIPS and SPARC, they
are entirely missing.

For backwards compatibility, the kernel will still use the legacy
speed fields unless they are set to BOTHER, and will use the legacy
output speed as the input speed if the latter is 0 (== B0). However,
the specific encoding used is visible to user space applications,
including ones other than the one running.

- SPARC and MIPS get a new struct termios, and tc[gs]etattr() is
  versioned accordingly. However, the new struct termios is set to be
  a strict extension of the old one, which means that cf* interfaces
  other than the speed-related ones do not need versioning.
- The Bxxx constants are redefined as equivalent to their integer
  values and the legacy Bxxx constants are renamed __Bxxx.
- cf[gs]et[io]speed() and cfsetspeed() are versioned accordingly.
- tcgetattr() and cfset[io]speed() are adjusted to always keep the
  c_[io]speed fields correct (unlike earlier versions), but to
  canonicalize the representation to ALSO configure the legacy fields
  if a valid legacy representation exists.
- tcsetattr(), too, canonicalizes the representation in this way
  before passing it to the kernel, to maximize compatibility with
  older applications/tools.
- The old IBAUD0 hack is removed; it is no longer necessary since
  even the legacy c_cflag baud rate fields have had separate input
  values for a long time.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) 5f54d8bc48 linux/termios/powerpc: deal with powerpc-unique ioctl emulation
The powerpc architecture, only, emulates the termios ioctls using the
glibc termios structure. Export the real kernel ones as the termios2
interface; although the kernel doesn't call it termios2, it is exactly
the termios2 interface, and it avoids the namespace clash between the
emulated ioctls and the real kernel ioctls.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) 091256f0d1 linux/ioctls: use <linux/sockios.h> for sockios ioctls
In the kernel, these are <linux/sockios.h>. The differences between
<linux/sockios.h> and the copied data in <bits/ioctls.h> are minor;
mainly some #ifdefs, so try to use <linux/sockios.h> directly; it is
hopefully clean enough these days to use directly.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) c4929eecf7 io: replace local_isatty() with a proper function __isatty_nostatus()
Replace local_isatty() inlined in libio with a proper function
__isatty_nostatus(). This allows simpler system-specific
implementations that don't need to touch errno at all.

Note: I left the prototype in include/unistd.h (the internal header
file.) It didn't much make sense to me to put it in a different header
(not-cancel.h), but perhaps someone can elucidate the need.

Add such an implementation for Linux, with a generic fallback.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
H. Peter Anvin (Intel) edf7328db2 termios: make __tcsetattr() the internal interface
There is a prototype for an internal __tcsetattr() function in
include/termios.h, but tcsetattr without __ were still declared as the
actual functions.

Make this match the comment and make __tcsetattr() an internal
interface. This will be required to version struct termios for Linux on
MIPS and SPARC.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
2025-06-17 09:11:38 -03:00
Carlos O'Donell 1164979474 Update advisory GLIBC-SA-2025-0003 and GLIBC-SA-2025-0004
Add Fix-Commit information for backported fixes.
2025-06-17 08:05:26 -04:00
H.J. Lu d1b27eeda3 malloc: Sort tests-exclude-largetcache in Makefile
This fixes:

FAIL: lint-makefiles

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-06-17 06:06:06 +08:00
Carlos O'Donell 15808c77b3 ppc64le: Revert "powerpc: Optimized strcmp for power10" (CVE-2025-5702)
This reverts commit 3367d8e180

Reason for revert: Power10 strcmp clobbers non-volatile vector
registers (Bug 33056)

Tested on ppc64le without regression.
2025-06-16 18:02:58 -04:00
Carlos O'Donell a7877bb668 ppc64le: Revert "powerpc : Add optimized memchr for POWER10" (Bug 33059)
This reverts commit b9182c793c

Reason for revert: Power10 memchr clobbers v20 vector register
(Bug 33059)

This is not a security issue, unlike CVE-2025-5745 and
CVE-2025-5702.

Tested on ppc64le without regression.
2025-06-16 18:02:58 -04:00
Carlos O'Donell c22de63588 ppc64le: Revert "powerpc: Fix performance issues of strcmp power10" (CVE-2025-5702)
This reverts commit 90bcc8721e

This change is in the chain of the final revert that fixes the CVE
i.e. 3367d8e180

Reason for revert: Power10 strcmp clobbers non-volatile vector
registers (Bug 33056)

Tested on ppc64le with no regressions.
2025-06-16 18:02:58 -04:00
Carlos O'Donell 63c60101ce ppc64le: Revert "powerpc: Optimized strncmp for power10" (CVE-2025-5745)
This reverts commit 23f0d81608

Reason for revert: Power10 strncmp clobbers non-volatile vector
registers (Bug 33060)

Tested on ppc64le with no regressions.
2025-06-16 18:02:58 -04:00
Cupertino Miranda cde5caa4bb malloc: add testing for large tcache support
This patch adds large tcache support tests by re-executing malloc tests
using the tunable:  glibc.malloc.tcache_max=1048576
Test names are postfixed with "largetcache".

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-16 12:54:32 +00:00
Cupertino Miranda cbfd798810 malloc: add tcache support for large chunk caching
Existing tcache implementation in glibc seems to focus in caching
smaller data size allocations, limiting the size of the allocation to
1KB.

This patch changes tcache implementation to allow to cache any chunk
size allocations.  The implementation adds extra bins (linked-lists)
which store chunks with different ranges of allocation sizes. Bin
selection is done in multiples in powers of 2 and chunks are inserted in
growing size ordering within the bin.  The last bin contains all other
sizes of allocations.

This patch although by default preserves the same implementation,
limitting caches to 1KB chunks, it now allows to increase the max size
for the cached chunks with the tunable glibc.malloc.tcache_max.

It also now verifies if chunk was mmapped, in which case __libc_free
will not add it to tcache.

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-16 12:05:22 +00:00
H.J. Lu 5b7c8d1cd4 Always check lockf64 return value
On x86-64, when GCC 14.2.1 is used to build:

commit f3c82fc1b4
Author: Radko Krkos <krkos@mail.muni.cz>
Date:   Sat Jun 14 11:07:40 2025 +0200

    io: Mark lockf() __wur [BZ #32800]

    In commit 0476597b28 flock() was marked __wur in posix/unistd.h, but not
    in io/fcntl.h, the declarations must match.

    Reviewed-by: Florian Weimer <fweimer@redhat.com>

I got

programs/locarchive.c: In function ‘open_archive’:
programs/locarchive.c:641:18: error: ignoring return value of ‘lockf64’ declared with attribute ‘warn_unused_result’ [-Werror=unused-result]
  641 |           (void) lockf64 (fd, F_ULOCK, sizeof (struct locarhead));
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
programs/locarchive.c:653:14: error: ignoring return value of ‘lockf64’ declared with attribute ‘warn_unused_result’ [-Werror=unused-result]
  653 |       (void) lockf64 (fd, F_ULOCK, sizeof (struct locarhead));
      |              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
programs/locarchive.c:660:14: error: ignoring return value of ‘lockf64’ declared with attribute ‘warn_unused_result’ [-Werror=unused-result]
  660 |       (void) lockf64 (fd, F_ULOCK, sizeof (struct locarhead));
      |              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
programs/locarchive.c:679:14: error: ignoring return value of ‘lockf64’ declared with attribute ‘warn_unused_result’ [-Werror=unused-result]
  679 |       (void) lockf64 (fd, F_ULOCK, sizeof (struct locarhead));
      |              ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Update locarchive.c to always check lockf64 return value.  This fixes
BZ #33089.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Florian Weimer <fweimer@redhat.com>
2025-06-16 14:48:45 +08:00
H.J. Lu 81467d4b61 elf: Add optimization barrier for __ehdr_start and _end
rtld.c has

extern const ElfW(Ehdr) __ehdr_start attribute_hidden;
...
  _dl_rtld_map.l_map_start = (ElfW(Addr)) &__ehdr_start;
  _dl_rtld_map.l_map_end = (ElfW(Addr)) _end;

As

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120653

shows, compiler may generate run-time relocation on __ehdr_start with

	movq	.LC0(%rip), %xmm0
...
	.section	.data.rel.ro.local,"aw"
	.align 8
.LC0:
	.quad	__ehdr_start

This won't work before run-time relocation is finished in rtld.c.  Add
optimization barrier to prevent run-time relocations against __ehdr_start
and _end.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
Reviewed-by: Sam James <sam@gentoo.org>
2025-06-16 08:43:40 +08:00
gfleury 27360ab9ea htl: move pthread_key_*, pthread_get/setspecific
Signed-off-by: gfleury <gfleury@disroot.org>
Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org>
Message-ID: <20250613184440.1660335-1-gfleury@disroot.org>
2025-06-15 21:21:12 +02:00
H.J. Lu 90cf97bb9d elf: Remove the unused _etext declaration
Since

commit 53df2ce688
Author: Florian Weimer <fweimer@redhat.com>
Date:   Fri Sep 8 13:02:06 2023 +0200

    elf: Remove unused l_text_end field from struct link_map

removed the only reference to _etext, also remove the unused _etext
declaration.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-06-15 12:42:24 +08:00
Radko Krkos f3c82fc1b4 io: Mark lockf() __wur [BZ #32800]
In commit 0476597b28 flock() was marked __wur in posix/unistd.h, but not
in io/fcntl.h, the declarations must match.

Reviewed-by: Florian Weimer <fweimer@redhat.com>
2025-06-14 11:57:46 +02:00
Adhemerval Zanella 1d828b9ddc benchtests: Improve modf benchtest
It adds four ranges, which is how the generic implementation handles
normal numbers:

  1. Random inputs in the range [0.0, 1.0];
  2. Random inputs in the range [1.0, (double)(UINT64_C(1) << 52))];
  3. Random inputs in the range [(double)(UINT64_C(1) << 52), DBL_MAX];
  4. Random integral inputs in the range [0.0, (double)(UINT64_C(1) << 52)].

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-13 11:30:12 -03:00
Adhemerval Zanella 619fd4e37b benchtests: Add modff benchtest
It adds four ranges, which is how the generic implementation handles
normal numbers:

  1. Random inputs in the range [0.0, 1.0];
  2. Random inputs in the range [1.0, (float)(1U << 23)];
  3. Random inputs in the range [(float)(1U << 23), FLT_MAX];
  4. Random integral inputs in the range [0.0, (float)(1U << 23)].

Reviewed-by: Wilco Dijkstra  <Wilco.Dijkstra@arm.com>
2025-06-13 11:29:39 -03:00
Mark Harris 8af8beb1c4 riscv: Correct __riscv_hwprobe function prototype [BZ #32932]
The third argument to __riscv_hwprobe is the size in bytes of the
cpu bitmask pointed to by the fourth argument, however in the access
attribute (read_only, 4, 3) it is used as an element count (i.e., the
number of unsigned longs that make up the bitmask), resulting in a
false compiler warning:

$ gcc -c hwprobe1.c
hwprobe1.c: In function 'main':
hwprobe1.c:15:11: warning: '__riscv_hwprobe' reading 1024 bytes from a region of size 128 [-Wstringop-overread]
   15 |     ret = __riscv_hwprobe (pairs, 1, sizeof(cpus), cpus, 0);
      |           ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
hwprobe1.c:9:23: note: source object 'cpus' of size 128
    9 |     unsigned long int cpus[16];
      |                       ^~~~
In file included from hwprobe1.c:1:
/usr/include/riscv64-linux-gnu/sys/hwprobe.h:66:12: note: in a call to function '__riscv_hwprobe' declared with attribute 'access (read_only, 4, 3)'
   66 | extern int __riscv_hwprobe (struct riscv_hwprobe *__pairs, size_t __pair_count,
      |            ^~~~~~~~~~~~~~~
$

The documentation (https://docs.kernel.org/arch/riscv/hwprobe.html)
claims that the cpu bitmask has the type cpu_set_t *, which would be
consistent with other functions that take a cpu bitmask such as
sched_setaffinity and sched_getaffinity.  It also uses the name
cpusetsize for the third argument, which is much more accurate than
cpu_count since it is a size in bytes and not a cpu count.  The
(read_only, 4, 3) access attribute in the glibc prototype claims
that the cpu bitmask is only read, however when flags is
RISCV_HWPROBE_WHICH_CPUS it is both read and written.

Therefore, in the glibc prototype the type of the fourth argument is
changed to cpu_set_t * to match the documentation, the name of the
third argument is changed to cpusetsize as in the documentation, and the
incorrect access attribute that applies to these arguments is removed.
Almost all existing callers pass a null pointer for the fourth
argument, however a transparent union is introduced for compatibility
with callers that cast a pointer to the old argument type, and a
macro is introduced allowing callers the ability to distinguish
between the old and new prototype when needed.

The access attributes are being specified with __fortified_attr_access,
however this macro is for fortified functions; the regular
__attr_access macro is for non-fortified functions such as this one.
Using the incorrect macro results in no access checks at fortify level
3, because it is assumed that the fortified function will be doing the
checking.  It is changed to use the correct macro so that the access
checks will work regardless of fortify level.

Also because __riscv_hwprobe is not a cancellation point, __THROW
is added, consistent with similar functions.  (However, it is omitted
from the typedef because GCC does not accept it there.)

The __wur (warn_unused_result) attribute is helpful for functions that
cannot be used safely without checking the result, however code such
as the following does not require the result to be checked and should
not produce a warning:
    struct riscv_hwprobe pair = { RISCV_HWPROBE_KEY_IMA_EXT_0, 0 };
    __riscv_hwprobe (&pair, 1, 0, NULL, 0);
    if (pair.value & RISCV_HWPROBE_EXT_ZBB) ...
Therefore this attribute is omitted.

The comment claiming that the second argument to the ifunc selector
is a pointer to the vDSO function is corrected.  It is a pointer to
the regular glibc function (which returns errors as positive values),
not the vDSO function (which returns errors as negative values).

Fixes commit 426d0e1aa8 ("riscv: Add
Linux hwprobe syscall support").

Fixes: BZ #32932
Signed-off-by: Mark Harris <mark.hsj@gmail.com>
Signed-off-by: Mark Harris <mark.hsj@gmail.com>
Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>
Acked-by: Palmer Dabbelt <palmer@dabbelt.com>
2025-06-13 11:25:12 -03:00
Sergey Kolosov daab2a6d19 resolv: Add test for getaddrinfo returning FQDN in ai_canonname
Test for BZ #15218.  This test verifies that getaddrinfo returns a
fully-qualified domain name in the ai_canonname field then
AI_CANONNAME is set and search domains apply.

Reviewed-by: Florian Weimer <fweimer@redhat.com>
2025-06-10 15:10:31 +02:00