mirror of git://sourceware.org/git/glibc.git
259 lines
10 KiB
C
259 lines
10 KiB
C
/* Double-precision vector (AdvSIMD) pow function
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Copyright (C) 2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_math.h"
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/* Defines parameters of the approximation and scalar fallback. */
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#include "finite_pow.h"
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#define VecSmallPowX v_u64 (SmallPowX)
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#define VecThresPowX v_u64 (ThresPowX)
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#define VecSmallPowY v_u64 (SmallPowY)
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#define VecThresPowY v_u64 (ThresPowY)
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static const struct data
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{
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uint64x2_t inf;
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float64x2_t small_powx;
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uint64x2_t offset, mask;
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uint64x2_t mask_sub_0, mask_sub_1;
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float64x2_t log_c0, log_c2, log_c4, log_c5;
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double log_c1, log_c3;
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double ln2_lo, ln2_hi;
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uint64x2_t small_exp, thres_exp;
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double ln2_lo_n, ln2_hi_n;
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double inv_ln2_n, exp_c2;
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float64x2_t exp_c0, exp_c1;
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} data = {
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/* Power threshold. */
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.inf = V2 (0x7ff0000000000000),
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.small_powx = V2 (0x1p-126),
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.offset = V2 (Off),
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.mask = V2 (0xfffULL << 52),
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.mask_sub_0 = V2 (1ULL << 52),
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.mask_sub_1 = V2 (52ULL << 52),
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/* Coefficients copied from v_pow_log_data.c
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relative error: 0x1.11922ap-70 in [-0x1.6bp-8, 0x1.6bp-8]
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Coefficients are scaled to match the scaling during evaluation. */
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.log_c0 = V2 (0x1.555555555556p-2 * -2),
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.log_c1 = -0x1.0000000000006p-2 * -2,
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.log_c2 = V2 (0x1.999999959554ep-3 * 4),
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.log_c3 = -0x1.555555529a47ap-3 * 4,
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.log_c4 = V2 (0x1.2495b9b4845e9p-3 * -8),
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.log_c5 = V2 (-0x1.0002b8b263fc3p-3 * -8),
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.ln2_hi = 0x1.62e42fefa3800p-1,
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.ln2_lo = 0x1.ef35793c76730p-45,
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/* Polynomial coefficients: abs error: 1.43*2^-58, ulp error: 0.549
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(0.550 without fma) if |x| < ln2/512. */
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.exp_c0 = V2 (0x1.fffffffffffd4p-2),
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.exp_c1 = V2 (0x1.5555571d6ef9p-3),
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.exp_c2 = 0x1.5555576a5adcep-5,
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.small_exp = V2 (0x3c90000000000000),
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.thres_exp = V2 (0x03f0000000000000),
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.inv_ln2_n = 0x1.71547652b82fep8, /* N/ln2. */
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.ln2_hi_n = 0x1.62e42fefc0000p-9, /* ln2/N. */
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.ln2_lo_n = -0x1.c610ca86c3899p-45,
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};
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/* This version implements an algorithm close to scalar pow but
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- does not implement the trick in the exp's specialcase subroutine to avoid
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double-rounding,
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- does not use a tail in the exponential core computation,
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- and pow's exp polynomial order and table bits might differ.
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Maximum measured error is 1.04 ULPs:
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_ZGVnN2vv_pow(0x1.024a3e56b3c3p-136, 0x1.87910248b58acp-13)
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got 0x1.f71162f473251p-1
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want 0x1.f71162f473252p-1. */
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static inline float64x2_t
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v_masked_lookup_f64 (const double *table, uint64x2_t i)
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{
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return (float64x2_t){
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table[(i[0] >> (52 - V_POW_LOG_TABLE_BITS)) & (N_LOG - 1)],
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table[(i[1] >> (52 - V_POW_LOG_TABLE_BITS)) & (N_LOG - 1)]
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};
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}
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/* Compute y+TAIL = log(x) where the rounded result is y and TAIL has about
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additional 15 bits precision. IX is the bit representation of x, but
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normalized in the subnormal range using the sign bit for the exponent. */
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static inline float64x2_t
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v_log_inline (uint64x2_t ix, float64x2_t *tail, const struct data *d)
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{
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/* x = 2^k z; where z is in range [OFF,2*OFF) and exact.
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The range is split into N subintervals.
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The ith subinterval contains z and c is near its center. */
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uint64x2_t tmp = vsubq_u64 (ix, d->offset);
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int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52);
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uint64x2_t iz = vsubq_u64 (ix, vandq_u64 (tmp, d->mask));
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float64x2_t z = vreinterpretq_f64_u64 (iz);
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float64x2_t kd = vcvtq_f64_s64 (k);
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/* log(x) = k*Ln2 + log(c) + log1p(z/c-1). */
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float64x2_t invc = v_masked_lookup_f64 (__v_pow_log_data.invc, tmp);
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float64x2_t logc = v_masked_lookup_f64 (__v_pow_log_data.logc, tmp);
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float64x2_t logctail = v_masked_lookup_f64 (__v_pow_log_data.logctail, tmp);
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/* Note: 1/c is j/N or j/N/2 where j is an integer in [N,2N) and
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|z/c - 1| < 1/N, so r = z/c - 1 is exactly representible. */
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float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, invc);
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/* k*Ln2 + log(c) + r. */
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float64x2_t ln2 = vld1q_f64 (&d->ln2_lo);
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float64x2_t t1 = vfmaq_laneq_f64 (logc, kd, ln2, 1);
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float64x2_t t2 = vaddq_f64 (t1, r);
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float64x2_t lo1 = vfmaq_laneq_f64 (logctail, kd, ln2, 0);
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float64x2_t lo2 = vaddq_f64 (vsubq_f64 (t1, t2), r);
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/* Evaluation is optimized assuming superscalar pipelined execution. */
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float64x2_t ar = vmulq_f64 (v_f64 (-0.5), r);
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float64x2_t ar2 = vmulq_f64 (r, ar);
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float64x2_t ar3 = vmulq_f64 (r, ar2);
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/* k*Ln2 + log(c) + r + A[0]*r*r. */
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float64x2_t hi = vaddq_f64 (t2, ar2);
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float64x2_t lo3 = vfmaq_f64 (vnegq_f64 (ar2), ar, r);
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float64x2_t lo4 = vaddq_f64 (vsubq_f64 (t2, hi), ar2);
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/* p = log1p(r) - r - A[0]*r*r. */
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float64x2_t odd_coeffs = vld1q_f64 (&d->log_c1);
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float64x2_t a56 = vfmaq_f64 (d->log_c4, r, d->log_c5);
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float64x2_t a34 = vfmaq_laneq_f64 (d->log_c2, r, odd_coeffs, 1);
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float64x2_t a12 = vfmaq_laneq_f64 (d->log_c0, r, odd_coeffs, 0);
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float64x2_t p = vfmaq_f64 (a34, ar2, a56);
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p = vfmaq_f64 (a12, ar2, p);
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p = vmulq_f64 (ar3, p);
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float64x2_t lo
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= vaddq_f64 (vaddq_f64 (vaddq_f64 (vaddq_f64 (lo1, lo2), lo3), lo4), p);
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float64x2_t y = vaddq_f64 (hi, lo);
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*tail = vaddq_f64 (vsubq_f64 (hi, y), lo);
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return y;
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}
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static float64x2_t VPCS_ATTR NOINLINE
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exp_special_case (float64x2_t x, float64x2_t xtail)
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{
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return (float64x2_t){ exp_nosignbias (x[0], xtail[0]),
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exp_nosignbias (x[1], xtail[1]) };
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}
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/* Computes sign*exp(x+xtail) where |xtail| < 2^-8/N and |xtail| <= |x|. */
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static inline float64x2_t
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v_exp_inline (float64x2_t x, float64x2_t neg_xtail, const struct data *d)
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{
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/* Fallback to scalar exp_inline for all lanes if any lane
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contains value of x s.t. |x| <= 2^-54 or >= 512. */
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uint64x2_t uoflowx = vcgeq_u64 (
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vsubq_u64 (vreinterpretq_u64_f64 (vabsq_f64 (x)), d->small_exp),
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d->thres_exp);
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if (__glibc_unlikely (v_any_u64 (uoflowx)))
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return exp_special_case (x, vnegq_f64 (neg_xtail));
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/* exp(x) = 2^(k/N) * exp(r), with exp(r) in [2^(-1/2N),2^(1/2N)]. */
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/* x = ln2/N*k + r, with k integer and r in [-ln2/2N, ln2/2N]. */
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/* z - kd is in [-1, 1] in non-nearest rounding modes. */
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float64x2_t exp_consts = vld1q_f64 (&d->inv_ln2_n);
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float64x2_t z = vmulq_laneq_f64 (x, exp_consts, 0);
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float64x2_t kd = vrndnq_f64 (z);
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uint64x2_t ki = vreinterpretq_u64_s64 (vcvtaq_s64_f64 (z));
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float64x2_t ln2_n = vld1q_f64 (&d->ln2_lo_n);
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float64x2_t r = vfmsq_laneq_f64 (x, kd, ln2_n, 1);
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r = vfmsq_laneq_f64 (r, kd, ln2_n, 0);
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/* The code assumes 2^-200 < |xtail| < 2^-8/N. */
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r = vsubq_f64 (r, neg_xtail);
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/* 2^(k/N) ~= scale. */
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uint64x2_t idx = vandq_u64 (ki, v_u64 (N_EXP - 1));
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uint64x2_t top = vshlq_n_u64 (ki, 52 - V_POW_EXP_TABLE_BITS);
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/* This is only a valid scale when -1023*N < k < 1024*N. */
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uint64x2_t sbits = v_lookup_u64 (SBits, idx);
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sbits = vaddq_u64 (sbits, top);
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/* exp(x) = 2^(k/N) * exp(r) ~= scale + scale * (exp(r) - 1). */
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float64x2_t r2 = vmulq_f64 (r, r);
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float64x2_t tmp = vfmaq_laneq_f64 (d->exp_c1, r, exp_consts, 1);
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tmp = vfmaq_f64 (d->exp_c0, r, tmp);
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tmp = vfmaq_f64 (r, r2, tmp);
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float64x2_t scale = vreinterpretq_f64_u64 (sbits);
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/* Note: tmp == 0 or |tmp| > 2^-200 and scale > 2^-739, so there
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is no spurious underflow here even without fma. */
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return vfmaq_f64 (scale, scale, tmp);
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}
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static float64x2_t NOINLINE VPCS_ATTR
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scalar_fallback (float64x2_t x, float64x2_t y)
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{
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return (float64x2_t){ pow_scalar_special_case (x[0], y[0]),
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pow_scalar_special_case (x[1], y[1]) };
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}
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float64x2_t VPCS_ATTR V_NAME_D2 (pow) (float64x2_t x, float64x2_t y)
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{
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const struct data *d = ptr_barrier (&data);
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/* Case of x <= 0 is too complicated to be vectorised efficiently here,
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fallback to scalar pow for all lanes if any x < 0 detected. */
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if (v_any_u64 (vclezq_s64 (vreinterpretq_s64_f64 (x))))
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return scalar_fallback (x, y);
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uint64x2_t vix = vreinterpretq_u64_f64 (x);
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uint64x2_t viy = vreinterpretq_u64_f64 (y);
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uint64x2_t iay = vandq_u64 (viy, d->inf);
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/* Special cases of x or y. */
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#if WANT_SIMD_EXCEPT
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/* Small or large. */
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uint64x2_t vtopx = vshrq_n_u64 (vix, 52);
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uint64x2_t vabstopy = vshrq_n_u64 (iay, 52);
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uint64x2_t specialx
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= vcgeq_u64 (vsubq_u64 (vtopx, VecSmallPowX), VecThresPowX);
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uint64x2_t specialy
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= vcgeq_u64 (vsubq_u64 (vabstopy, VecSmallPowY), VecThresPowY);
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#else
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/* The case y==0 does not trigger a special case, since in this case it is
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necessary to fix the result only if x is a signalling nan, which already
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triggers a special case. We test y==0 directly in the scalar fallback. */
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uint64x2_t iax = vandq_u64 (vix, d->inf);
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uint64x2_t specialx = vcgeq_u64 (iax, d->inf);
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uint64x2_t specialy = vcgeq_u64 (iay, d->inf);
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#endif
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uint64x2_t special = vorrq_u64 (specialx, specialy);
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/* Fallback to scalar on all lanes if any lane is inf or nan. */
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if (__glibc_unlikely (v_any_u64 (special)))
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return scalar_fallback (x, y);
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/* Small cases of x: |x| < 0x1p-126. */
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uint64x2_t smallx = vcaltq_f64 (x, d->small_powx);
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if (__glibc_unlikely (v_any_u64 (smallx)))
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{
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/* Update ix if top 12 bits of x are 0. */
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uint64x2_t sub_x = vceqzq_u64 (vshrq_n_u64 (vix, 52));
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if (__glibc_unlikely (v_any_u64 (sub_x)))
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{
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/* Normalize subnormal x so exponent becomes negative. */
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uint64x2_t vix_norm = vreinterpretq_u64_f64 (
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vabsq_f64 (vmulq_f64 (x, vcvtq_f64_u64 (d->mask_sub_0))));
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vix_norm = vsubq_u64 (vix_norm, d->mask_sub_1);
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vix = vbslq_u64 (sub_x, vix_norm, vix);
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}
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}
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/* Vector Log(ix, &lo). */
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float64x2_t vlo;
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float64x2_t vhi = v_log_inline (vix, &vlo, d);
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/* Vector Exp(y_loghi, y_loglo). */
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float64x2_t vehi = vmulq_f64 (y, vhi);
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float64x2_t vemi = vfmsq_f64 (vehi, y, vhi);
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float64x2_t neg_velo = vfmsq_f64 (vemi, y, vlo);
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return v_exp_inline (vehi, neg_velo, d);
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}
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