x86/bugs: Move cpu_bugs_smt_update() down
Commit 6449f5baf9
upstream.
cpu_bugs_smt_update() uses global variables from different mitigations. For
SMT updates it can't currently use vmscape_mitigation that is defined after
it.
Since cpu_bugs_smt_update() depends on many other mitigations, move it
after all mitigations are defined. With that, it can use vmscape_mitigation
in a moment.
No functional change.
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
459274c77b
commit
28504e3102
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@ -2202,80 +2202,6 @@ out:
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pr_info("%s\n", tsa_strings[tsa_mitigation]);
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pr_info("%s\n", tsa_strings[tsa_mitigation]);
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}
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}
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void cpu_bugs_smt_update(void)
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{
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mutex_lock(&spec_ctrl_mutex);
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if (sched_smt_active() && unprivileged_ebpf_enabled() &&
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spectre_v2_enabled == SPECTRE_V2_EIBRS_LFENCE)
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pr_warn_once(SPECTRE_V2_EIBRS_LFENCE_EBPF_SMT_MSG);
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switch (spectre_v2_user_stibp) {
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case SPECTRE_V2_USER_NONE:
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break;
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case SPECTRE_V2_USER_STRICT:
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case SPECTRE_V2_USER_STRICT_PREFERRED:
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update_stibp_strict();
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break;
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case SPECTRE_V2_USER_PRCTL:
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case SPECTRE_V2_USER_SECCOMP:
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update_indir_branch_cond();
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break;
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}
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switch (mds_mitigation) {
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case MDS_MITIGATION_FULL:
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case MDS_MITIGATION_VMWERV:
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if (sched_smt_active() && !boot_cpu_has(X86_BUG_MSBDS_ONLY))
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pr_warn_once(MDS_MSG_SMT);
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update_mds_branch_idle();
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break;
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case MDS_MITIGATION_OFF:
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break;
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}
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switch (taa_mitigation) {
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case TAA_MITIGATION_VERW:
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case TAA_MITIGATION_UCODE_NEEDED:
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if (sched_smt_active())
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pr_warn_once(TAA_MSG_SMT);
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break;
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case TAA_MITIGATION_TSX_DISABLED:
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case TAA_MITIGATION_OFF:
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break;
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}
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switch (mmio_mitigation) {
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case MMIO_MITIGATION_VERW:
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case MMIO_MITIGATION_UCODE_NEEDED:
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if (sched_smt_active())
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pr_warn_once(MMIO_MSG_SMT);
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break;
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case MMIO_MITIGATION_OFF:
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break;
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}
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switch (tsa_mitigation) {
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case TSA_MITIGATION_USER_KERNEL:
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case TSA_MITIGATION_VM:
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case TSA_MITIGATION_FULL:
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case TSA_MITIGATION_UCODE_NEEDED:
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/*
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* TSA-SQ can potentially lead to info leakage between
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* SMT threads.
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*/
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if (sched_smt_active())
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static_branch_enable(&cpu_buf_idle_clear);
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else
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static_branch_disable(&cpu_buf_idle_clear);
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break;
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case TSA_MITIGATION_NONE:
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break;
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}
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mutex_unlock(&spec_ctrl_mutex);
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}
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#undef pr_fmt
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#undef pr_fmt
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#define pr_fmt(fmt) "Speculative Store Bypass: " fmt
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#define pr_fmt(fmt) "Speculative Store Bypass: " fmt
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@ -3025,6 +2951,80 @@ static void __init vmscape_select_mitigation(void)
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#undef pr_fmt
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#undef pr_fmt
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#define pr_fmt(fmt) fmt
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#define pr_fmt(fmt) fmt
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void cpu_bugs_smt_update(void)
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{
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mutex_lock(&spec_ctrl_mutex);
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if (sched_smt_active() && unprivileged_ebpf_enabled() &&
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spectre_v2_enabled == SPECTRE_V2_EIBRS_LFENCE)
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pr_warn_once(SPECTRE_V2_EIBRS_LFENCE_EBPF_SMT_MSG);
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switch (spectre_v2_user_stibp) {
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case SPECTRE_V2_USER_NONE:
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break;
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case SPECTRE_V2_USER_STRICT:
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case SPECTRE_V2_USER_STRICT_PREFERRED:
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update_stibp_strict();
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break;
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case SPECTRE_V2_USER_PRCTL:
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case SPECTRE_V2_USER_SECCOMP:
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update_indir_branch_cond();
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break;
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}
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switch (mds_mitigation) {
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case MDS_MITIGATION_FULL:
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case MDS_MITIGATION_VMWERV:
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if (sched_smt_active() && !boot_cpu_has(X86_BUG_MSBDS_ONLY))
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pr_warn_once(MDS_MSG_SMT);
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update_mds_branch_idle();
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break;
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case MDS_MITIGATION_OFF:
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break;
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}
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switch (taa_mitigation) {
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case TAA_MITIGATION_VERW:
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case TAA_MITIGATION_UCODE_NEEDED:
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if (sched_smt_active())
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pr_warn_once(TAA_MSG_SMT);
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break;
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case TAA_MITIGATION_TSX_DISABLED:
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case TAA_MITIGATION_OFF:
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break;
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}
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switch (mmio_mitigation) {
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case MMIO_MITIGATION_VERW:
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case MMIO_MITIGATION_UCODE_NEEDED:
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if (sched_smt_active())
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pr_warn_once(MMIO_MSG_SMT);
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break;
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case MMIO_MITIGATION_OFF:
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break;
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}
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switch (tsa_mitigation) {
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case TSA_MITIGATION_USER_KERNEL:
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case TSA_MITIGATION_VM:
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case TSA_MITIGATION_FULL:
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case TSA_MITIGATION_UCODE_NEEDED:
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/*
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* TSA-SQ can potentially lead to info leakage between
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* SMT threads.
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*/
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if (sched_smt_active())
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static_branch_enable(&cpu_buf_idle_clear);
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else
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static_branch_disable(&cpu_buf_idle_clear);
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break;
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case TSA_MITIGATION_NONE:
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break;
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}
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mutex_unlock(&spec_ctrl_mutex);
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}
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#ifdef CONFIG_SYSFS
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#ifdef CONFIG_SYSFS
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#define L1TF_DEFAULT_MSG "Mitigation: PTE Inversion"
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#define L1TF_DEFAULT_MSG "Mitigation: PTE Inversion"
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