Fixes to the Allwinner and Renesas clk drivers:

- Do the math properly in Allwinner's ccu_mp_recalc_rate() so
    clk rates aren't bogus
 
  - Fix a clock domain regression on Renesas R-Car M1A, R-Car H1,
    and RZ/A1 by registering the domain after the pmdomain bus is
    registered instead of before
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Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk fixes from Stephen Boyd:
 "Fixes to the Allwinner and Renesas clk drivers:

   - Do the math properly in Allwinner's ccu_mp_recalc_rate() so clk
     rates aren't bogus

   - Fix a clock domain regression on Renesas R-Car M1A, R-Car H1,
     and RZ/A1 by registering the domain after the pmdomain bus is
     registered instead of before"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: sunxi-ng: mp: Fix dual-divider clock rate readback
  clk: renesas: mstp: Add genpd OF provider at postcore_initcall()
This commit is contained in:
Linus Torvalds 2025-09-21 11:11:07 -07:00
commit 2d5bd41a45
2 changed files with 20 additions and 2 deletions

View File

@ -303,6 +303,9 @@ void cpg_mstp_detach_dev(struct generic_pm_domain *unused, struct device *dev)
pm_clk_destroy(dev);
}
static struct device_node *cpg_mstp_pd_np __initdata = NULL;
static struct generic_pm_domain *cpg_mstp_pd_genpd __initdata = NULL;
void __init cpg_mstp_add_clk_domain(struct device_node *np)
{
struct generic_pm_domain *pd;
@ -324,5 +327,20 @@ void __init cpg_mstp_add_clk_domain(struct device_node *np)
pd->detach_dev = cpg_mstp_detach_dev;
pm_genpd_init(pd, &pm_domain_always_on_gov, false);
of_genpd_add_provider_simple(np, pd);
cpg_mstp_pd_np = of_node_get(np);
cpg_mstp_pd_genpd = pd;
}
static int __init cpg_mstp_pd_init_provider(void)
{
int error;
if (!cpg_mstp_pd_np)
return -ENODEV;
error = of_genpd_add_provider_simple(cpg_mstp_pd_np, cpg_mstp_pd_genpd);
of_node_put(cpg_mstp_pd_np);
return error;
}
postcore_initcall(cpg_mstp_pd_init_provider);

View File

@ -185,7 +185,7 @@ static unsigned long ccu_mp_recalc_rate(struct clk_hw *hw,
p &= (1 << cmp->p.width) - 1;
if (cmp->common.features & CCU_FEATURE_DUAL_DIV)
rate = (parent_rate / p) / m;
rate = (parent_rate / (p + cmp->p.offset)) / m;
else
rate = (parent_rate >> p) / m;