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clk: rockchip: rk3399: print arm enter and init rate 

Change-Id: Ib5e3e0f9a3e1a5b535ec852e7c58966dc0db77cf
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
This commit is contained in:
Elaine Zhang 2019-01-22 16:04:28 +08:00
parent dfce009693
commit 044bc79de9
2 changed files with 40 additions and 5 deletions
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8
arch/arm/include/asm/arch-rockchip/cru_rk3399.h
View File

@ -12,6 +12,14 @@
/* Private data for the clock driver - used by rockchip_get_cru() */
struct rk3399_clk_priv {
struct rk3399_cru *cru;
ulong armlclk_hz;
ulong armlclk_enter_hz;
ulong armlclk_init_hz;
ulong armbclk_hz;
ulong armbclk_enter_hz;
ulong armbclk_init_hz;
bool sync_kernel;
bool set_armclk_rate;
};
struct rk3399_pmuclk_priv {

37
drivers/clk/rockchip/clk_rk3399.c
View File

@ -1465,7 +1465,21 @@ static int rk3399_clk_probe(struct udevice *dev)
priv->cru = map_sysmem(plat->dtd.reg[0], plat->dtd.reg[1]);
#endif
priv->sync_kernel = false;
if (!priv->armlclk_enter_hz)
priv->armlclk_enter_hz =
rkclk_pll_get_rate(&priv->cru->apll_l_con[0]);
if (!priv->armbclk_enter_hz)
priv->armbclk_enter_hz =
rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
rkclk_init(priv->cru);
if (!priv->armlclk_init_hz)
priv->armlclk_init_hz =
rkclk_pll_get_rate(&priv->cru->apll_l_con[0]);
if (!priv->armbclk_init_hz)
priv->armbclk_init_hz =
rkclk_pll_get_rate(&priv->cru->apll_b_con[0]);
return 0;
}
@ -1741,6 +1755,7 @@ U_BOOT_DRIVER(rockchip_rk3399_pmuclk) = {
int soc_clk_dump(void)
{
struct udevice *cru_dev, *pmucru_dev;
struct rk3399_clk_priv *priv;
const struct rk3399_clk_info *clk_dump;
struct clk clk;
unsigned long clk_count = ARRAY_SIZE(clks_dump);
@ -1763,7 +1778,19 @@ int soc_clk_dump(void)
return ret;
}
printf("CLK:\n");
priv = dev_get_priv(cru_dev);
printf("CLK: (%s. arml: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
priv->sync_kernel ? "sync kernel" : "uboot",
priv->armlclk_enter_hz / 1000,
priv->armlclk_init_hz / 1000,
priv->set_armclk_rate ? priv->armlclk_hz / 1000 : 0,
priv->set_armclk_rate ? " KHz" : "N/A");
printf("CLK: (%s. armb: enter %lu KHz, init %lu KHz, kernel %lu%s)\n",
priv->sync_kernel ? "sync kernel" : "uboot",
priv->armbclk_enter_hz / 1000,
priv->armbclk_init_hz / 1000,
priv->set_armclk_rate ? priv->armbclk_hz / 1000 : 0,
priv->set_armclk_rate ? " KHz" : "N/A");
for (i = 0; i < clk_count; i++) {
clk_dump = &clks_dump[i];
if (clk_dump->name) {
@ -1779,17 +1806,17 @@ int soc_clk_dump(void)
clk_free(&clk);
if (i == 0) {
if (rate < 0)
printf("%s %s\n", clk_dump->name,
printf(" %s %s\n", clk_dump->name,
"unknown");
else
printf("%s %lu KHz\n", clk_dump->name,
printf(" %s %lu KHz\n", clk_dump->name,
rate / 1000);
} else {
if (rate < 0)
printf("%s %s\n", clk_dump->name,
printf(" %s %s\n", clk_dump->name,
"unknown");
else
printf("%s %lu KHz\n", clk_dump->name,
printf(" %s %lu KHz\n", clk_dump->name,
rate / 1000);
}
}