rockchip: dts: rv1126: add gmac support

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I19edafc1fc9402d6f9a4123c935e8a0881071960
This commit is contained in:
Joseph Chen 2020-05-28 19:21:22 +08:00 committed by Jianhong Chen
parent 11a331d232
commit 1619e70322
1 changed files with 99 additions and 0 deletions

View File

@ -143,3 +143,102 @@
u-boot,dm-pre-reloc;
status = "okay";
};
&pinctrl {
u-boot,dm-pre-reloc;
status = "okay";
};
&gpio3 {
u-boot,dm-pre-reloc;
status = "okay";
};
&gmac {
u-boot,dm-pre-reloc;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, <&cru CLK_GMAC_ETHERNET_OUT>;
assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>;
assigned-clock-rates = <125000000>, <0>, <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>;
tx_delay = <0x2a>;
rx_delay = <0x1a>;
phy-handle = <&phy>;
status = "okay";
};
&mdio {
u-boot,dm-pre-reloc;
status = "okay";
phy: phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
u-boot,dm-pre-reloc;
reg = <0x0>;
clocks = <&cru CLK_GMAC_ETHERNET_OUT>;
};
};
&stmmac_axi_setup {
u-boot,dm-pre-reloc;
status = "okay";
queue0 {
u-boot,dm-pre-reloc;
};
};
&mtl_rx_setup {
u-boot,dm-pre-reloc;
status = "okay";
queue0 {
u-boot,dm-pre-reloc;
};
};
&mtl_tx_setup {
u-boot,dm-pre-reloc;
status = "okay";
};
&gmac_clkin_m0 {
u-boot,dm-pre-reloc;
status = "okay";
};
&gmac_clkini_m1 {
u-boot,dm-pre-reloc;
status = "okay";
};
&rgmiim1_pins {
u-boot,dm-pre-reloc;
status = "okay";
};
&clk_out_ethernetm1_pins{
u-boot,dm-pre-reloc;
status = "okay";
};
&pcfg_pull_none {
u-boot,dm-pre-reloc;
status = "okay";
};
&pcfg_pull_none_drv_level_12 {
u-boot,dm-pre-reloc;
status = "okay";
};