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rockchip: rv1126: Increase otp tRWH timing for stable read 

Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
Change-Id: I42d57e6a9eaeb30e24b755821c7672ea9ffce56d
This commit is contained in:
Sugar Zhang 2020-11-10 09:07:14 +08:00
parent 5a82dae5f5
commit 1ac424cf03
1 changed files with 7 additions and 0 deletions
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7
arch/arm/mach-rockchip/rv1126/rv1126.c
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@ -98,6 +98,9 @@ DECLARE_GLOBAL_DATA_PTR;
#define WDT_RESET_SRC_CLR BIT(1)
#define GRF_IOFUNC_CON3 0xFF01026C
#define GRF1_GPIO0D_P 0xFE010104
#define OTP_NS_BASE 0xFF5C0000
#define OTP_S_BASE 0xFF5D0000
#define OTP_NVM_TRWH 0x28
enum {
GPIO1A7_SHIFT = 12,
@ -548,6 +551,10 @@ int arch_cpu_init(void)
writel(WDT_RESET_SRC_CLR, PMUGRF_RSTFUNC_CLR);
}
/* set otp tRWH to 0x9 for stable read */
writel(0x9, OTP_NS_BASE + OTP_NVM_TRWH);
writel(0x9, OTP_S_BASE + OTP_NVM_TRWH);
#ifdef CONFIG_SPL_BUILD
/*
* Just set region 0 to unsecure.