From 1cbfe65d1cc1e4f470be7732dbbfe21031788501 Mon Sep 17 00:00:00 2001
From: Joseph Chen <chenjh@rock-chips.com>
Date: Tue, 12 Sep 2017 15:54:03 +0800
Subject: [PATCH] rk322x: add arch_cpu_init implementation

1. pwm select rkpwm clock source;
2. pwm0~3 io select;
3. uart1~2 io select;
4. HDMI phy clock source select HDMIPHY clock out;

Change-Id: I7e59b4d50b2b10f1b3a9d832eaa1297288ebfeff
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
---
 arch/arm/mach-rockchip/rk322x/Makefile |  1 +
 arch/arm/mach-rockchip/rk322x/rk322x.c | 32 ++++++++++++++++++++++++++
 2 files changed, 33 insertions(+)
 create mode 100644 arch/arm/mach-rockchip/rk322x/rk322x.c

diff --git a/arch/arm/mach-rockchip/rk322x/Makefile b/arch/arm/mach-rockchip/rk322x/Makefile
index ecb3e8dfda..c2330499f9 100644
--- a/arch/arm/mach-rockchip/rk322x/Makefile
+++ b/arch/arm/mach-rockchip/rk322x/Makefile
@@ -7,3 +7,4 @@
 
 obj-y += clk_rk322x.o
 obj-y += syscon_rk322x.o
+obj-y += rk322x.o
diff --git a/arch/arm/mach-rockchip/rk322x/rk322x.c b/arch/arm/mach-rockchip/rk322x/rk322x.c
new file mode 100644
index 0000000000..dcc9f423c3
--- /dev/null
+++ b/arch/arm/mach-rockchip/rk322x/rk322x.c
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2017 Rockchip Electronics Co., Ltd
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+#include <asm/io.h>
+#include <asm/arch/hardware.h>
+
+#define GRF_SOC_CON2	0x11000408
+#define GRF_CON_IOMUX	0x11000050
+#define CRU_MISC_CON	0x110e0134
+
+int arch_cpu_init(void)
+{
+	/* We do some SoC one time setting here. */
+
+	/* PWMs select rkpwm clock source */
+	rk_setreg(GRF_SOC_CON2, 1 << 0);
+
+	/* PWM0~3 io select */
+	rk_setreg(GRF_CON_IOMUX, 0xf << 0);
+
+	/* UART1~2 io select */
+	rk_setreg(GRF_CON_IOMUX, (1 << 11) | (1 << 8));
+
+	/* HDMI phy clock source select HDMIPHY clock out */
+	rk_clrreg(CRU_MISC_CON, 1 << 13);
+
+	/* TODO: ECO version */
+
+	return 0;
+}