From 1f161166c605a98c1483dd2275ad21b4b0940e77 Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Thu, 28 Jan 2021 17:41:35 +0800 Subject: [PATCH] mtd: spinand: Support GD5F4GQ6UExxG Change-Id: Ib72399ca0166ec82fdaf900ac51059076c155de3 Signed-off-by: Jon Lin --- drivers/mtd/nand/spi/gigadevice.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/spi/gigadevice.c b/drivers/mtd/nand/spi/gigadevice.c index 52a3766708..999d137295 100644 --- a/drivers/mtd/nand/spi/gigadevice.c +++ b/drivers/mtd/nand/spi/gigadevice.c @@ -176,7 +176,7 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout, gd5fxgq5xexxg_ecc_get_status)), - SPINAND_INFO("GD5F2GQ4UBExxG", 0xd2, + SPINAND_INFO("GD5F2GQ4UBxxG", 0xd2, NAND_MEMORG(1, 2048, 128, 64, 2048, 1, 1, 1), NAND_ECCREQ(8, 512), SPINAND_INFO_OP_VARIANTS(&read_cache_variants, @@ -185,6 +185,15 @@ static const struct spinand_info gigadevice_spinand_table[] = { SPINAND_HAS_QE_BIT, SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout, gd5f1gq4xexxg_ecc_get_status)), + SPINAND_INFO("GD5F4GQ6UExxG", 0x55, + NAND_MEMORG(1, 2048, 128, 64, 4096, 1, 1, 1), + NAND_ECCREQ(4, 512), + SPINAND_INFO_OP_VARIANTS(&read_cache_variants, + &write_cache_variants, + &update_cache_variants), + SPINAND_HAS_QE_BIT, + SPINAND_ECCINFO(&gd5fxgq4xexxg_ooblayout, + gd5fxgq5xexxg_ecc_get_status)), }; static int gigadevice_spinand_detect(struct spinand_device *spinand)