video/drm: analogix_dp: Simplify analogix_dp_{set/get}_lane_link_training helpers
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I5e0a90c8a1fd132567635a7751c1ca4ade38e692
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d90a0d9f94
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@ -81,28 +81,6 @@ static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
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DP_TRAINING_PATTERN_DISABLE);
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}
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static void
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analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp,
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int pre_emphasis, int lane)
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{
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switch (lane) {
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case 0:
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analogix_dp_set_lane0_pre_emphasis(dp, pre_emphasis);
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break;
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case 1:
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analogix_dp_set_lane1_pre_emphasis(dp, pre_emphasis);
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break;
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case 2:
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analogix_dp_set_lane2_pre_emphasis(dp, pre_emphasis);
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break;
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case 3:
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analogix_dp_set_lane3_pre_emphasis(dp, pre_emphasis);
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break;
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}
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}
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static int analogix_dp_link_start(struct analogix_dp_device *dp)
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{
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u8 buf[4];
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@ -127,10 +105,12 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
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if (retval)
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return retval;
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/* Set TX pre-emphasis to minimum */
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/* Set TX voltage-swing and pre-emphasis to minimum */
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for (lane = 0; lane < lane_count; lane++)
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analogix_dp_set_lane_lane_pre_emphasis(dp,
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PRE_EMPHASIS_LEVEL_0, lane);
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dp->link_train.training_lane[lane] =
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DP_TRAIN_VOLTAGE_SWING_LEVEL_0 |
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DP_TRAIN_PRE_EMPH_LEVEL_0;
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analogix_dp_set_lane_link_training(dp);
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/* Wait for PLL lock */
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pll_tries = 0;
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@ -223,54 +203,6 @@ static unsigned char analogix_dp_get_adjust_request_pre_emphasis(
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return ((link_value >> shift) & 0xc) >> 2;
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}
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static void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp,
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u8 training_lane_set, int lane)
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{
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switch (lane) {
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case 0:
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analogix_dp_set_lane0_link_training(dp, training_lane_set);
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break;
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case 1:
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analogix_dp_set_lane1_link_training(dp, training_lane_set);
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break;
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case 2:
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analogix_dp_set_lane2_link_training(dp, training_lane_set);
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break;
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case 3:
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analogix_dp_set_lane3_link_training(dp, training_lane_set);
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break;
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}
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}
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static unsigned int
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analogix_dp_get_lane_link_training(struct analogix_dp_device *dp,
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int lane)
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{
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u32 reg;
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switch (lane) {
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case 0:
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reg = analogix_dp_get_lane0_link_training(dp);
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break;
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case 1:
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reg = analogix_dp_get_lane1_link_training(dp);
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break;
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case 2:
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reg = analogix_dp_get_lane2_link_training(dp);
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break;
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case 3:
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reg = analogix_dp_get_lane3_link_training(dp);
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break;
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default:
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WARN_ON(1);
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return 0;
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}
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return reg;
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}
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static void analogix_dp_reduce_link_rate(struct analogix_dp_device *dp)
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{
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analogix_dp_training_pattern_dis(dp);
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@ -364,10 +296,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
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}
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analogix_dp_get_adjust_training_lane(dp, adjust_request);
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for (lane = 0; lane < lane_count; lane++)
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analogix_dp_set_lane_link_training(dp,
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dp->link_train.training_lane[lane], lane);
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analogix_dp_set_lane_link_training(dp);
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retval = analogix_dp_write_bytes_to_dpcd(dp,
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DP_TRAINING_LANE0_SET, lane_count,
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@ -380,7 +309,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
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static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
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{
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int lane, lane_count, retval;
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int lane_count, retval;
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u32 reg;
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u8 link_align, link_status[2], adjust_request[2];
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@ -440,9 +369,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
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return -EIO;
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}
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for (lane = 0; lane < lane_count; lane++)
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analogix_dp_set_lane_link_training(dp,
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dp->link_train.training_lane[lane], lane);
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analogix_dp_set_lane_link_training(dp);
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retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
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lane_count, dp->link_train.training_lane);
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@ -1143,26 +1143,8 @@ void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
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bool enable);
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void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
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enum pattern_set pattern);
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void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
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u32 level);
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void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
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u32 level);
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void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
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u32 level);
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void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
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u32 level);
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void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
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u32 training_lane);
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void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
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u32 training_lane);
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void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
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u32 training_lane);
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void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
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u32 training_lane);
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u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
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u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
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u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
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u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
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void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp);
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u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane);
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void analogix_dp_reset_macro(struct analogix_dp_device *dp);
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void analogix_dp_init_video(struct analogix_dp_device *dp);
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@ -951,6 +951,22 @@ void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
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*count = reg;
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}
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void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp)
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{
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u8 lane;
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for (lane = 0; lane < dp->link_train.lane_count; lane++)
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analogix_dp_write(dp,
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ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane,
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dp->link_train.training_lane[lane]);
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}
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u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane)
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{
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return analogix_dp_read(dp,
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ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane);
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}
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void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
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bool enable)
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{
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@ -1000,118 +1016,6 @@ void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
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}
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}
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void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
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u32 level)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
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reg &= ~PRE_EMPHASIS_SET_MASK;
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reg |= level << PRE_EMPHASIS_SET_SHIFT;
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analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
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u32 level)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
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reg &= ~PRE_EMPHASIS_SET_MASK;
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reg |= level << PRE_EMPHASIS_SET_SHIFT;
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analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
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u32 level)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
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reg &= ~PRE_EMPHASIS_SET_MASK;
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reg |= level << PRE_EMPHASIS_SET_SHIFT;
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analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
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u32 level)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
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reg &= ~PRE_EMPHASIS_SET_MASK;
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reg |= level << PRE_EMPHASIS_SET_SHIFT;
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analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
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u32 training_lane)
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{
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u32 reg;
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reg = training_lane;
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analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
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u32 training_lane)
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{
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u32 reg;
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reg = training_lane;
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analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
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u32 training_lane)
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{
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u32 reg;
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reg = training_lane;
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analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
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}
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void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
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u32 training_lane)
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{
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u32 reg;
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reg = training_lane;
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analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
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}
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u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
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return reg;
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}
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u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
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return reg;
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}
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u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
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return reg;
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}
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u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
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{
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u32 reg;
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reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
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return reg;
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}
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void analogix_dp_reset_macro(struct analogix_dp_device *dp)
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{
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u32 reg;
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