video/drm: analogix_dp: Simplify analogix_dp_{set/get}_lane_link_training helpers

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: I5e0a90c8a1fd132567635a7751c1ca4ade38e692
This commit is contained in:
Wyon Bi 2020-12-10 02:40:54 +00:00
parent d90a0d9f94
commit 253c2dc8a6
3 changed files with 26 additions and 213 deletions

View File

@ -81,28 +81,6 @@ static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp)
DP_TRAINING_PATTERN_DISABLE);
}
static void
analogix_dp_set_lane_lane_pre_emphasis(struct analogix_dp_device *dp,
int pre_emphasis, int lane)
{
switch (lane) {
case 0:
analogix_dp_set_lane0_pre_emphasis(dp, pre_emphasis);
break;
case 1:
analogix_dp_set_lane1_pre_emphasis(dp, pre_emphasis);
break;
case 2:
analogix_dp_set_lane2_pre_emphasis(dp, pre_emphasis);
break;
case 3:
analogix_dp_set_lane3_pre_emphasis(dp, pre_emphasis);
break;
}
}
static int analogix_dp_link_start(struct analogix_dp_device *dp)
{
u8 buf[4];
@ -127,10 +105,12 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp)
if (retval)
return retval;
/* Set TX pre-emphasis to minimum */
/* Set TX voltage-swing and pre-emphasis to minimum */
for (lane = 0; lane < lane_count; lane++)
analogix_dp_set_lane_lane_pre_emphasis(dp,
PRE_EMPHASIS_LEVEL_0, lane);
dp->link_train.training_lane[lane] =
DP_TRAIN_VOLTAGE_SWING_LEVEL_0 |
DP_TRAIN_PRE_EMPH_LEVEL_0;
analogix_dp_set_lane_link_training(dp);
/* Wait for PLL lock */
pll_tries = 0;
@ -223,54 +203,6 @@ static unsigned char analogix_dp_get_adjust_request_pre_emphasis(
return ((link_value >> shift) & 0xc) >> 2;
}
static void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp,
u8 training_lane_set, int lane)
{
switch (lane) {
case 0:
analogix_dp_set_lane0_link_training(dp, training_lane_set);
break;
case 1:
analogix_dp_set_lane1_link_training(dp, training_lane_set);
break;
case 2:
analogix_dp_set_lane2_link_training(dp, training_lane_set);
break;
case 3:
analogix_dp_set_lane3_link_training(dp, training_lane_set);
break;
}
}
static unsigned int
analogix_dp_get_lane_link_training(struct analogix_dp_device *dp,
int lane)
{
u32 reg;
switch (lane) {
case 0:
reg = analogix_dp_get_lane0_link_training(dp);
break;
case 1:
reg = analogix_dp_get_lane1_link_training(dp);
break;
case 2:
reg = analogix_dp_get_lane2_link_training(dp);
break;
case 3:
reg = analogix_dp_get_lane3_link_training(dp);
break;
default:
WARN_ON(1);
return 0;
}
return reg;
}
static void analogix_dp_reduce_link_rate(struct analogix_dp_device *dp)
{
analogix_dp_training_pattern_dis(dp);
@ -364,10 +296,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
}
analogix_dp_get_adjust_training_lane(dp, adjust_request);
for (lane = 0; lane < lane_count; lane++)
analogix_dp_set_lane_link_training(dp,
dp->link_train.training_lane[lane], lane);
analogix_dp_set_lane_link_training(dp);
retval = analogix_dp_write_bytes_to_dpcd(dp,
DP_TRAINING_LANE0_SET, lane_count,
@ -380,7 +309,7 @@ static int analogix_dp_process_clock_recovery(struct analogix_dp_device *dp)
static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
{
int lane, lane_count, retval;
int lane_count, retval;
u32 reg;
u8 link_align, link_status[2], adjust_request[2];
@ -440,9 +369,7 @@ static int analogix_dp_process_equalizer_training(struct analogix_dp_device *dp)
return -EIO;
}
for (lane = 0; lane < lane_count; lane++)
analogix_dp_set_lane_link_training(dp,
dp->link_train.training_lane[lane], lane);
analogix_dp_set_lane_link_training(dp);
retval = analogix_dp_write_bytes_to_dpcd(dp, DP_TRAINING_LANE0_SET,
lane_count, dp->link_train.training_lane);

View File

@ -1143,26 +1143,8 @@ void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
bool enable);
void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
enum pattern_set pattern);
void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
u32 level);
void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
u32 level);
void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
u32 level);
void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
u32 level);
void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
u32 training_lane);
void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
u32 training_lane);
void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
u32 training_lane);
void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
u32 training_lane);
u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp);
void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp);
u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane);
void analogix_dp_reset_macro(struct analogix_dp_device *dp);
void analogix_dp_init_video(struct analogix_dp_device *dp);

View File

@ -951,6 +951,22 @@ void analogix_dp_get_lane_count(struct analogix_dp_device *dp, u32 *count)
*count = reg;
}
void analogix_dp_set_lane_link_training(struct analogix_dp_device *dp)
{
u8 lane;
for (lane = 0; lane < dp->link_train.lane_count; lane++)
analogix_dp_write(dp,
ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane,
dp->link_train.training_lane[lane]);
}
u32 analogix_dp_get_lane_link_training(struct analogix_dp_device *dp, u8 lane)
{
return analogix_dp_read(dp,
ANALOGIX_DP_LN0_LINK_TRAINING_CTL + 4 * lane);
}
void analogix_dp_enable_enhanced_mode(struct analogix_dp_device *dp,
bool enable)
{
@ -1000,118 +1016,6 @@ void analogix_dp_set_training_pattern(struct analogix_dp_device *dp,
}
}
void analogix_dp_set_lane0_pre_emphasis(struct analogix_dp_device *dp,
u32 level)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
reg &= ~PRE_EMPHASIS_SET_MASK;
reg |= level << PRE_EMPHASIS_SET_SHIFT;
analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane1_pre_emphasis(struct analogix_dp_device *dp,
u32 level)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
reg &= ~PRE_EMPHASIS_SET_MASK;
reg |= level << PRE_EMPHASIS_SET_SHIFT;
analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane2_pre_emphasis(struct analogix_dp_device *dp,
u32 level)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
reg &= ~PRE_EMPHASIS_SET_MASK;
reg |= level << PRE_EMPHASIS_SET_SHIFT;
analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane3_pre_emphasis(struct analogix_dp_device *dp,
u32 level)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
reg &= ~PRE_EMPHASIS_SET_MASK;
reg |= level << PRE_EMPHASIS_SET_SHIFT;
analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane0_link_training(struct analogix_dp_device *dp,
u32 training_lane)
{
u32 reg;
reg = training_lane;
analogix_dp_write(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane1_link_training(struct analogix_dp_device *dp,
u32 training_lane)
{
u32 reg;
reg = training_lane;
analogix_dp_write(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane2_link_training(struct analogix_dp_device *dp,
u32 training_lane)
{
u32 reg;
reg = training_lane;
analogix_dp_write(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL, reg);
}
void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
u32 training_lane)
{
u32 reg;
reg = training_lane;
analogix_dp_write(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL, reg);
}
u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
return reg;
}
u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
return reg;
}
u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
return reg;
}
u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = analogix_dp_read(dp, ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
return reg;
}
void analogix_dp_reset_macro(struct analogix_dp_device *dp)
{
u32 reg;