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mmc: dw_mmc: set DWMCI_CARDTHRCTL 

Since v2.80a, dwmmc controller introduced the card write threshold for
HS200 & HS400 mode. So CardThrCtl can be supported during write operation, not
only read operation.

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
Change-Id: I7f345660107c2978d2f874d36f2dffd2acdfbcb6
This commit is contained in:
Jason Zhu 2020-06-01 12:43:48 +08:00 committed by Jianhong Chen
parent ca0130caa2
commit 33e40bac6a
2 changed files with 12 additions and 0 deletions
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5
drivers/mmc/dw_mmc.c
View File

@ -581,6 +581,7 @@ static int dwmci_init(struct mmc *mmc)
{
struct dwmci_host *host = mmc->priv;
uint32_t use_dma;
uint32_t verid;
if (host->board_init)
host->board_init(host);
@ -595,6 +596,10 @@ static int dwmci_init(struct mmc *mmc)
dwmci_writel(host, DWMCI_PWREN, 1);
#endif
verid = dwmci_readl(host, DWMCI_VERID) & 0x0000ffff;
if (verid >= DW_MMC_240A)
dwmci_writel(host, DWMCI_CARDTHRCTL, DWMCI_CDTHRCTRL_CONFIG);
if (!dwmci_wait_reset(host, DWMCI_RESET_ALL)) {
debug("%s[%d] Fail-reset!!\n", __func__, __LINE__);
return -EIO;

7
include/dwmmc.h
View File

@ -48,6 +48,7 @@
#define DWMCI_IDINTEN 0x090
#define DWMCI_DSCADDR 0x094
#define DWMCI_BUFADDR 0x098
#define DWMCI_CARDTHRCTL 0x100
#define DWMCI_DATA 0x200
/* Interrupt Mask register */
@ -141,6 +142,12 @@
*/
#define DWMCI_MSIZE 0x6
/* The DW MMC Controller Version */
#define DW_MMC_240A 0x240a
/* sdmmc cardthrctl set */
#define DWMCI_CDTHRCTRL_CONFIG (1 + (0x200 << 16))
/**
* struct dwmci_host - Information about a designware MMC host
*