rockchip: rk3066: add core support
Add core skeleton for rk3066 Change-Id: I9fac85baaf671ac598c1c759b0f387b83ba9c21c Signed-off-by: Paweł Jarosz <paweljarosz3691@gmail.com> Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Paweł Jarosz
Kever Yang
parent
2c67c6667b
commit
578306ea5a
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@ -21,6 +21,21 @@ config ROCKCHIP_RK3128
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and video codec support. Peripherals include Gigabit Ethernet,
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USB2 host and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
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config ROCKCHIP_RK3066
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bool "Support Rockchip RK3066"
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select CPU_V7
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select SUPPORT_SPL
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select SUPPORT_TPL
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select SPL
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select TPL
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select BOARD_LATE_INIT
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select ROCKCHIP_BROM_HELPER
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help
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The Rockchip RK3066 is a ARM-based SoC with a dual-core Cortex-A9
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including NEON and GPU, Mali-400 graphics, several DDR3 options
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and video codec support. Peripherals include ethernet, USB2 host
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and OTG, SDIO, I2S, UART, SPI, I2C and PWMs.
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config ROCKCHIP_RK3188
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bool "Support Rockchip RK3188"
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select CPU_V7
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@ -255,6 +270,7 @@ config GICV3
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bool "ARM GICv3"
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source "arch/arm/mach-rockchip/rk3036/Kconfig"
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source "arch/arm/mach-rockchip/rk3066/Kconfig"
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source "arch/arm/mach-rockchip/rk3128/Kconfig"
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source "arch/arm/mach-rockchip/rk3188/Kconfig"
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source "arch/arm/mach-rockchip/rk322x/Kconfig"
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@ -11,12 +11,14 @@
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obj-spl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
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obj-tpl-$(CONFIG_ROCKCHIP_BROM_HELPER) += bootrom.o save_boot_param.o
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obj-tpl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-tpl.o
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obj-tpl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-tpl.o
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obj-tpl-$(CONFIG_ROCKCHIP_RK3368) += rk3368-board-tpl.o
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obj-tpl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-tpl.o
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obj-tpl-$(CONFIG_ROCKCHIP_RK3328) += rk3328-board-tpl.o
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obj-spl-$(CONFIG_ROCKCHIP_RK3036) += rk3036-board-spl.o
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obj-spl-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board-spl.o
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obj-spl-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board-spl.o
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obj-spl-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board-spl.o spl-boot-order.o
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obj-spl-$(CONFIG_ROCKCHIP_RK3288) += rk3288-board-spl.o
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@ -30,6 +32,7 @@ obj-$(CONFIG_ROCKCHIP_VENDOR_PARTITION) += vendor.o
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obj-$(CONFIG_ROCKCHIP_PARAM) += rockchip_parameter.o
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obj-$(CONFIG_ROCKCHIP_RESOURCE_IMAGE) += resource_img.o
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obj-$(CONFIG_ROCKCHIP_PARTITION_BOOT) += bootrkp.o
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obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066-board.o
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obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188-board.o
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obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128-board.o
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obj-$(CONFIG_ROCKCHIP_RK322X) += rk322x-board.o
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@ -44,6 +47,7 @@ obj-y += rk_timer.o
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endif
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obj-$(CONFIG_ROCKCHIP_RK3036) += rk3036/
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obj-$(CONFIG_ROCKCHIP_RK3066) += rk3066/
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obj-$(CONFIG_ROCKCHIP_RK3128) += rk3128/
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ifndef CONFIG_TPL_BUILD
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obj-$(CONFIG_ROCKCHIP_RK3188) += rk3188/
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@ -0,0 +1,139 @@
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/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <clk.h>
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <fdtdec.h>
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#include <led.h>
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#include <malloc.h>
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#include <ram.h>
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#include <spl.h>
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#include <syscon.h>
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#include <asm/gpio.h>
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#include <asm/io.h>
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#include <asm/arch/bootrom.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/pmu_rk3188.h>
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#include <asm/arch/sdram.h>
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#include <asm/arch/timer.h>
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#include <dm/pinctrl.h>
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#include <dm/root.h>
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#include <dm/test.h>
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#include <dm/util.h>
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#include <power/regulator.h>
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DECLARE_GLOBAL_DATA_PTR;
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_NAND;
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}
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void board_init_f(ulong dummy)
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{
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struct udevice *pinctrl, *dev;
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int ret;
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debug_uart_init();
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("Pinctrl init failed: %d\n", ret);
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return;
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}
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ret = rockchip_get_clk(&dev);
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if (ret) {
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debug("CLK init failed: %d\n", ret);
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return;
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}
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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}
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void spl_board_init(void)
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{
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struct udevice *pinctrl;
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int ret;
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto err;
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}
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#ifdef CONFIG_SPL_MMC_SUPPORT
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
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if (ret) {
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debug("%s: Failed to set up SD card\n", __func__);
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goto err;
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}
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#endif
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/* Enable debug UART */
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_UART_DBG);
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if (ret) {
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debug("%s: Failed to set up console UART\n", __func__);
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goto err;
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}
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preloader_console_init();
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return;
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err:
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debug("spl_board_init: Error %d\n", ret);
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/* No way to report error here */
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hang();
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}
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#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
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#include <usb.h>
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#include <usb/dwc2_udc.h>
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static struct dwc2_plat_otg_data rk3066_otg_data = {
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.rx_fifo_sz = 275,
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.np_tx_fifo_sz = 16,
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.tx_fifo_sz = 256,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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ofnode otg_node;
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u32 reg;
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otg_node = ofnode_path("/usb@10180000");
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if (!ofnode_valid(otg_node)) {
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debug("Not found usb otg device\n");
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return -ENODEV;
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}
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ofnode_read_u32(otg_node, "reg", ®);
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rk3066_otg_data.regs_otg = reg;
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return dwc2_udc_probe(&rk3066_otg_data);
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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#endif
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@ -0,0 +1,90 @@
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/*
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* (C) Copyright 2015 Google, Inc
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <clk.h>
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#include <common.h>
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#include <debug_uart.h>
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#include <dm.h>
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#include <ram.h>
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#include <spl.h>
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#include <asm/io.h>
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#include <asm/arch/bootrom.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/ddr_rk3188.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/grf_rk3066.h>
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#include <asm/arch/pmu_rk3188.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define RK3066_TIMER_CONTROL 0x8
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#define GRF_BASE 0x20008000
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static int setup_arm_clock(void)
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{
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struct udevice *dev;
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struct clk clk;
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int ret;
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ret = rockchip_get_clk(&dev);
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if (ret)
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return ret;
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clk.id = CLK_ARM;
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ret = clk_request(dev, &clk);
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if (ret < 0)
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return ret;
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ret = clk_set_rate(&clk, 600000000);
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clk_free(&clk);
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return ret;
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}
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void board_init_f(ulong dummy)
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{
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struct rk3066_grf * const grf = (void *)GRF_BASE;
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struct udevice *dev;
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int ret;
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/* Enable early UART on the RK3066 */
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rk_clrsetreg(&grf->gpio1b_iomux,
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GPIO1B1_MASK | GPIO1B0_MASK,
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GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
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GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
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debug_uart_init();
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printascii("U-Boot TPL board init\n");
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ret = spl_early_init();
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if (ret) {
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debug("spl_early_init() failed: %d\n", ret);
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hang();
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}
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/* Reset and enable Timer0 */
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writel(0, CONFIG_SYS_TIMER_BASE);
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rk_clrsetreg(CONFIG_SYS_TIMER_BASE + RK3066_TIMER_CONTROL, 0x1, 0x1);
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ret = uclass_get_device(UCLASS_RAM, 0, &dev);
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if (ret) {
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debug("DRAM init failed: %d\n", ret);
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return;
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}
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setup_arm_clock();
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}
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void board_return_to_bootrom(void)
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{
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back_to_bootrom();
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}
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u32 spl_boot_device(void)
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{
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return BOOT_DEVICE_BOOTROM;
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}
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@ -0,0 +1,150 @@
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/*
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* (C) Copyright 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <clk.h>
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#include <dm.h>
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#include <ram.h>
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#include <syscon.h>
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#include <asm/io.h>
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#include <asm/arch/clock.h>
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#include <asm/arch/grf_rk3066.h>
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#include <asm/arch/periph.h>
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#include <asm/arch/pmu_rk3188.h>
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#include <asm/arch/boot_mode.h>
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#include <asm/gpio.h>
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#include <dm/pinctrl.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_late_init(void)
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{
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struct rk3066_grf *grf;
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grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
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if (IS_ERR(grf)) {
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debug("grf syscon returned %ld\n", PTR_ERR(grf));
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return PTR_ERR(grf);
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}
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/* enable noc remap to mimic legacy loaders */
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rk_clrsetreg(&grf->soc_con0, NOC_REMAP_MASK, NOC_REMAP_MASK);
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return 0;
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}
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int board_init(void)
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{
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#if defined(CONFIG_ROCKCHIP_SPL_BACK_TO_BROM)
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struct udevice *pinctrl;
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int ret;
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/*
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* We need to implement sdcard iomux here for the further
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* initialization, otherwise, it'll hit sdcard command sending
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* timeout exception.
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*/
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ret = uclass_get_device(UCLASS_PINCTRL, 0, &pinctrl);
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if (ret) {
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debug("%s: Cannot find pinctrl device\n", __func__);
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goto err;
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}
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ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_SDCARD);
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if (ret) {
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debug("%s: Failed to set up SD card\n", __func__);
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goto err;
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}
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return 0;
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err:
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debug("board_init: Error %d\n", ret);
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/* No way to report error here */
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hang();
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return -1;
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#else
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return 0;
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#endif
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}
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#ifndef CONFIG_SYS_DCACHE_OFF
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void enable_caches(void)
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{
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/* Enable D-cache. I-cache is already enabled in start.S */
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dcache_enable();
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}
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#endif
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#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
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#include <usb.h>
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#include <usb/dwc2_udc.h>
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static struct dwc2_plat_otg_data rk3066_otg_data = {
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.rx_fifo_sz = 275,
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.np_tx_fifo_sz = 16,
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.tx_fifo_sz = 256,
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};
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int board_usb_init(int index, enum usb_init_type init)
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{
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int node, phy_node;
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const char *mode;
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bool matched = false;
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const void *blob = gd->fdt_blob;
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u32 grf_phy_offset;
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/* find the usb_otg node */
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node = fdt_node_offset_by_compatible(blob, -1,
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"rockchip,rk3066-usb");
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while (node > 0) {
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mode = fdt_getprop(blob, node, "dr_mode", NULL);
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if (mode && strcmp(mode, "otg") == 0) {
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matched = true;
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break;
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}
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node = fdt_node_offset_by_compatible(blob, node,
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"rockchip,rk3066-usb");
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}
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if (!matched) {
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debug("Not found usb_otg device\n");
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return -ENODEV;
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}
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rk3066_otg_data.regs_otg = fdtdec_get_addr(blob, node, "reg");
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node = fdtdec_lookup_phandle(blob, node, "phys");
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if (node <= 0) {
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debug("Not found usb phy device\n");
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return -ENODEV;
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}
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phy_node = fdt_parent_offset(blob, node);
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if (phy_node <= 0) {
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debug("Not found usb phy device\n");
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return -ENODEV;
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}
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rk3066_otg_data.phy_of_node = phy_node;
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grf_phy_offset = fdtdec_get_addr(blob, node, "reg");
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node = fdt_node_offset_by_compatible(blob, -1,
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"rockchip,rk3066-grf");
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if (node <= 0) {
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debug("Not found grf device\n");
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return -ENODEV;
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}
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rk3066_otg_data.regs_phy = grf_phy_offset +
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fdtdec_get_addr(blob, node, "reg");
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return dwc2_udc_probe(&rk3066_otg_data);
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}
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int board_usb_cleanup(int index, enum usb_init_type init)
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{
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return 0;
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}
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#endif
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@ -0,0 +1,29 @@
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if ROCKCHIP_RK3066
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config TARGET_MK808_RK3066
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bool "MK808_RK3066"
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help
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MK808 is a tv stick with usb host and otg, microsd card slot, hdmi and wifi.
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config SYS_SOC
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default "rockchip"
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config SYS_MALLOC_F_LEN
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default 0x0800
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config SPL_LIBCOMMON_SUPPORT
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default y
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config SPL_LIBGENERIC_SUPPORT
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default y
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config SPL_SERIAL_SUPPORT
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default y
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||||
|
||||
config TPL_LIBCOMMON_SUPPORT
|
||||
default y
|
||||
|
||||
config TPL_LIBGENERIC_SUPPORT
|
||||
default y
|
||||
|
||||
endif
|
||||
|
|
@ -0,0 +1,8 @@
|
|||
#
|
||||
# Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += clk_rk3066.o
|
||||
obj-y += syscon_rk3066.o
|
||||
|
|
@ -0,0 +1,33 @@
|
|||
/*
|
||||
* Copyright (C) 2016 Google, Inc
|
||||
* Written by Simon Glass <sjg@chromium.org>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <syscon.h>
|
||||
#include <asm/arch/clock.h>
|
||||
#include <asm/arch/cru_rk3066.h>
|
||||
|
||||
int rockchip_get_clk(struct udevice **devp)
|
||||
{
|
||||
return uclass_get_device_by_driver(UCLASS_CLK,
|
||||
DM_GET_DRIVER(rockchip_rk3066a_cru), devp);
|
||||
}
|
||||
|
||||
void *rockchip_get_cru(void)
|
||||
{
|
||||
struct rk3066_clk_priv *priv;
|
||||
struct udevice *dev;
|
||||
int ret;
|
||||
|
||||
ret = rockchip_get_clk(&dev);
|
||||
if (ret)
|
||||
return ERR_PTR(ret);
|
||||
|
||||
priv = dev_get_priv(dev);
|
||||
|
||||
return priv->cru;
|
||||
}
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
/*
|
||||
* (C) Copyright 2015 Rockchip Electronics Co., Ltd
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <dm.h>
|
||||
#include <syscon.h>
|
||||
#include <asm/arch/clock.h>
|
||||
|
||||
static const struct udevice_id rk3066_syscon_ids[] = {
|
||||
{ .compatible = "rockchip,rk3188-noc", .data = ROCKCHIP_SYSCON_NOC },
|
||||
{ .compatible = "rockchip,rk3066-grf", .data = ROCKCHIP_SYSCON_GRF },
|
||||
{ .compatible = "rockchip,rk3066-pmu", .data = ROCKCHIP_SYSCON_PMU },
|
||||
{ }
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(syscon_rk3066) = {
|
||||
.name = "rk3066_syscon",
|
||||
.id = UCLASS_SYSCON,
|
||||
.of_match = rk3066_syscon_ids,
|
||||
};
|
||||
|
||||
#if CONFIG_IS_ENABLED(OF_PLATDATA)
|
||||
static int rk3066_syscon_bind_of_platdata(struct udevice *dev)
|
||||
{
|
||||
dev->driver_data = dev->driver->of_match->data;
|
||||
debug("syscon: %s %d\n", dev->name, (uint)dev->driver_data);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
U_BOOT_DRIVER(rockchip_rk3188_noc) = {
|
||||
.name = "rockchip_rk3188_noc",
|
||||
.id = UCLASS_SYSCON,
|
||||
.of_match = rk3066_syscon_ids,
|
||||
.bind = rk3066_syscon_bind_of_platdata,
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(rockchip_rk3066_grf) = {
|
||||
.name = "rockchip_rk3066_grf",
|
||||
.id = UCLASS_SYSCON,
|
||||
.of_match = rk3066_syscon_ids + 1,
|
||||
.bind = rk3066_syscon_bind_of_platdata,
|
||||
};
|
||||
|
||||
U_BOOT_DRIVER(rockchip_rk3066_pmu) = {
|
||||
.name = "rockchip_rk3066_pmu",
|
||||
.id = UCLASS_SYSCON,
|
||||
.of_match = rk3066_syscon_ids + 2,
|
||||
.bind = rk3066_syscon_bind_of_platdata,
|
||||
};
|
||||
#endif
|
||||
|
|
@ -0,0 +1,97 @@
|
|||
/*
|
||||
* Copyright (c) 2017 Paweł Jarosz <paweljarosz3691@gmail.com>
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0+
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_RK3066_COMMON_H
|
||||
#define __CONFIG_RK3066_COMMON_H
|
||||
|
||||
#include <asm/arch/hardware.h>
|
||||
#include "rockchip-common.h"
|
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT_ONLY
|
||||
#define CONFIG_SYS_MAXARGS 16
|
||||
#define CONFIG_BAUDRATE 115200
|
||||
#define CONFIG_SYS_MALLOC_LEN (64 << 20)
|
||||
#define CONFIG_SYS_CBSIZE 256
|
||||
|
||||
#define CONFIG_SYS_SDRAM_BASE 0x60000000
|
||||
#define CONFIG_NR_DRAM_BANKS 1
|
||||
#define SDRAM_BANK_SIZE (1024UL << 20UL)
|
||||
#define SDRAM_MAX_SIZE CONFIG_NR_DRAM_BANKS * SDRAM_BANK_SIZE
|
||||
|
||||
#define CONFIG_SYS_TIMER_RATE 24000000
|
||||
#define CONFIG_SYS_TIMER_BASE 0x20038000
|
||||
#define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMER_BASE + 4)
|
||||
#define CONFIG_SYS_TIMER_COUNTS_DOWN
|
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0x60408000
|
||||
#define CONFIG_SYS_INIT_SP_ADDR 0x78000000
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x70800800
|
||||
|
||||
#define CONFIG_SYS_NS16550_MEM32
|
||||
#define CONFIG_BOUNCE_BUFFER
|
||||
#define CONFIG_SPL_FRAMEWORK
|
||||
|
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 8
|
||||
|
||||
#ifdef CONFIG_TPL_BUILD
|
||||
#define CONFIG_SPL_TEXT_BASE 0x10080C04
|
||||
#define CONFIG_SPL_STACK 0x1008FFFF
|
||||
/* tpl size max 32kb - 4byte RK30 header */
|
||||
#define CONFIG_SPL_MAX_SIZE (0x8000 - 0x4)
|
||||
#elif defined(CONFIG_SPL_BUILD)
|
||||
/* spl size max 200k */
|
||||
#define CONFIG_SPL_MAX_SIZE 0x32000
|
||||
#define CONFIG_SPL_TEXT_BASE 0x60000000
|
||||
#define CONFIG_SPL_STACK 0x1008FFFF
|
||||
#define CONFIG_SPL_BOARD_INIT
|
||||
#define CONFIG_SPL_NAND_DRIVERS
|
||||
#define CONFIG_SPL_NAND_LOAD
|
||||
#define CONFIG_SPL_NAND_ECC
|
||||
#define CONFIG_SPL_NAND_BASE
|
||||
#define CONFIG_SPL_NAND_INIT
|
||||
#define CONFIG_SPL_NAND_BBT
|
||||
#define CONFIG_SPL_NAND_IDS
|
||||
#define CONFIG_SPL_NAND_UTIL
|
||||
#define CONFIG_SPL_NAND_RAW_ONLY
|
||||
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
|
||||
#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS ROCKCHIP_DEVICE_SETTINGS
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#endif
|
||||
|
||||
#include <config_distro_defaults.h>
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
|
||||
#define CONFIG_USB_FUNCTION_MASS_STORAGE
|
||||
|
||||
#define CONFIG_MTD_DEVICE
|
||||
#define MTDIDS_DEFAULT "nand0=rockchip-nand.0"
|
||||
|
||||
#define ENV_MEM_LAYOUT_SETTINGS \
|
||||
"scriptaddr=0x60000000\0" \
|
||||
"pxefile_addr_r=0x60100000\0" \
|
||||
"fdt_addr_r=0x61f00000\0" \
|
||||
"kernel_addr_r=0x62000000\0" \
|
||||
"ramdisk_addr_r=0x64000000\0"
|
||||
|
||||
#include <config_distro_bootcmd.h>
|
||||
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
"fdt_high=0x6fffffff\0" \
|
||||
"initrd_high=0x6fffffff\0" \
|
||||
"partitions=" PARTS_DEFAULT \
|
||||
"mtdids=" MTDIDS_DEFAULT "\0" \
|
||||
ENV_MEM_LAYOUT_SETTINGS \
|
||||
ROCKCHIP_DEVICE_SETTINGS \
|
||||
BOOTENV
|
||||
|
||||
#endif
|
||||
|
||||
#define CONFIG_PREBOOT
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue