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drm/rockchip: vop: add support rk3308 vop 

Change-Id: I067ac3f95163dd678317a11ffad7a7d85225c9ee
Signed-off-by: Sandy Huang <hjc@rock-chips.com>
This commit is contained in:
Sandy Huang 2018-04-04 09:19:34 +08:00 committed by Kever Yang
parent 45fa51f320
commit 5c651246bb
7 changed files with 200 additions and 1 deletions
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113
arch/arm/dts/rk3308.dtsi
View File

@ -65,6 +65,23 @@
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
}; };
display_subsystem: display-subsystem {
compatible = "rockchip,display-subsystem";
ports = <&vop_out>;
status = "disabled";
route {
route_rgb: route-rgb {
status = "okay";
logo,uboot = "logo.bmp";
logo,kernel = "logo_kernel.bmp";
logo,mode = "center";
charge_logo,mode = "center";
connect = <&vop_out_rgb>;
};
};
};
psci { psci {
compatible = "arm,psci-1.0"; compatible = "arm,psci-1.0";
method = "smc"; method = "smc";
@ -164,6 +181,27 @@
status = "disabled"; status = "disabled";
}; };
vop: vop@ff2e0000 {
compatible = "rockchip,rk3308-vop";
reg = <0x0 0xff2e0000 0x0 0x1fc>, <0x0 0xff2e0a00 0x0 0x400>;
reg-names = "regs", "gamma_lut";
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>,
<&cru HCLK_VOP>;
clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
status = "disabled";
vop_out: port {
#address-cells = <1>;
#size-cells = <0>;
vop_out_rgb: endpoint@0 {
reg = <0>;
remote-endpoint = <&rgb_in_vop>;
};
};
};
pwm0: pwm@ff180000 { pwm0: pwm@ff180000 {
compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm";
reg = <0x0 0xff180000 0x0 0x10>; reg = <0x0 0xff180000 0x0 0x10>;
@ -208,6 +246,31 @@
status = "disabled"; status = "disabled";
}; };
rgb: rgb {
compatible = "rockchip,rk3308-rgb";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&lcdc_ctl>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
rgb_in_vop: endpoint@0 {
reg = <0>;
remote-endpoint = <&vop_out_rgb>;
};
};
};
};
saradc: saradc@ff1e0000 { saradc: saradc@ff1e0000 {
compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc"; compatible = "rockchip,rk3308-saradc", "rockchip,rk3399-saradc";
reg = <0x0 0xff1e0000 0x0 0x100>; reg = <0x0 0xff1e0000 0x0 0x100>;
@ -951,5 +1014,55 @@
<1 RK_PB4 3 &pcfg_pull_none>; <1 RK_PB4 3 &pcfg_pull_none>;
}; };
}; };
lcdc {
lcdc_ctl: lcdc-ctl {
rockchip,pins =
/* dclk */
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_none>,
/* hsync */
<1 RK_PA1 RK_FUNC_1 &pcfg_pull_none>,
/* vsync */
<1 RK_PA2 RK_FUNC_1 &pcfg_pull_none>,
/* den */
<1 RK_PA3 RK_FUNC_1 &pcfg_pull_none>,
/* d0 */
<1 RK_PA4 RK_FUNC_1 &pcfg_pull_none>,
/* d1 */
<1 RK_PA5 RK_FUNC_1 &pcfg_pull_none>,
/* d2 */
<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none>,
/* d3 */
<1 RK_PA7 RK_FUNC_1 &pcfg_pull_none>,
/* d4 */
<1 RK_PB0 RK_FUNC_1 &pcfg_pull_none>,
/* d5 */
<1 RK_PB1 RK_FUNC_1 &pcfg_pull_none>,
/* d6 */
<1 RK_PB2 RK_FUNC_1 &pcfg_pull_none>,
/* d7 */
<1 RK_PB3 RK_FUNC_1 &pcfg_pull_none>,
/* d8 */
<1 RK_PB4 RK_FUNC_1 &pcfg_pull_none>,
/* d9 */
<1 RK_PB5 RK_FUNC_1 &pcfg_pull_none>,
/* d10 */
<1 RK_PB6 RK_FUNC_1 &pcfg_pull_none>,
/* d11 */
<1 RK_PB7 RK_FUNC_1 &pcfg_pull_none>,
/* d12 */
<1 RK_PC0 RK_FUNC_1 &pcfg_pull_none>,
/* d13 */
<1 RK_PC1 RK_FUNC_1 &pcfg_pull_none>,
/* d14 */
<1 RK_PC2 RK_FUNC_1 &pcfg_pull_none>,
/* d15 */
<1 RK_PC3 RK_FUNC_1 &pcfg_pull_none>,
/* d16 */
<1 RK_PC4 RK_FUNC_1 &pcfg_pull_none>,
/* d17 */
<1 RK_PC5 RK_FUNC_1 &pcfg_pull_none>;
};
};
}; };
}; };

5
configs/evb-rk3308_defconfig
View File

@ -55,6 +55,11 @@ CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_G_DNL_MANUFACTURER="Rockchip" CONFIG_G_DNL_MANUFACTURER="Rockchip"
CONFIG_G_DNL_VENDOR_NUM=0x2207 CONFIG_G_DNL_VENDOR_NUM=0x2207
CONFIG_G_DNL_PRODUCT_NUM=0x330d CONFIG_G_DNL_PRODUCT_NUM=0x330d
CONFIG_DM_VIDEO=y
CONFIG_DISPLAY=y
CONFIG_DRM_ROCKCHIP=y
CONFIG_DRM_ROCKCHIP_RGB=y
CONFIG_LCD=y
CONFIG_USE_TINY_PRINTF=y CONFIG_USE_TINY_PRINTF=y
CONFIG_SPL_TINY_MEMSET=y CONFIG_SPL_TINY_MEMSET=y
CONFIG_ERRNO_STR=y CONFIG_ERRNO_STR=y

8
drivers/video/drm/rockchip_crtc.c
View File

@ -32,6 +32,11 @@ static const struct rockchip_crtc px30_vop_big_data = {
.data = &px30_vop_big, .data = &px30_vop_big,
}; };
static const struct rockchip_crtc rk3308_vop_data = {
.funcs = &rockchip_vop_funcs,
.data = &rk3308_vop,
};
static const struct rockchip_crtc rk3288_vop_big_data = { static const struct rockchip_crtc rk3288_vop_big_data = {
.funcs = &rockchip_vop_funcs, .funcs = &rockchip_vop_funcs,
.data = &rk3288_vop_big, .data = &rk3288_vop_big,
@ -85,6 +90,9 @@ static const struct udevice_id rockchip_vop_ids[] = {
}, { }, {
.compatible = "rockchip,px30-vop-big", .compatible = "rockchip,px30-vop-big",
.data = (ulong)&px30_vop_big_data, .data = (ulong)&px30_vop_big_data,
}, {
.compatible = "rockchip,rk3308-vop",
.data = (ulong)&rk3308_vop_data,
}, { }, {
.compatible = "rockchip,rk3288-vop-big", .compatible = "rockchip,rk3288-vop-big",
.data = (ulong)&rk3288_vop_big_data, .data = (ulong)&rk3288_vop_big_data,

1
drivers/video/drm/rockchip_crtc.h
View File

@ -28,6 +28,7 @@ extern const struct rockchip_crtc_funcs rockchip_vop_funcs;
extern const struct vop_data rk3036_vop; extern const struct vop_data rk3036_vop;
extern const struct vop_data px30_vop_lit; extern const struct vop_data px30_vop_lit;
extern const struct vop_data px30_vop_big; extern const struct vop_data px30_vop_big;
extern const struct vop_data rk3308_vop;
extern const struct vop_data rk3288_vop_big; extern const struct vop_data rk3288_vop_big;
extern const struct vop_data rk3288_vop_lit; extern const struct vop_data rk3288_vop_lit;
extern const struct vop_data rk3368_vop; extern const struct vop_data rk3368_vop;

67
drivers/video/drm/rockchip_vop_reg.c
View File

@ -502,3 +502,70 @@ const struct vop_data px30_vop_big = {
.line_flag = &rk3366_vop_lite_line_flag, .line_flag = &rk3366_vop_lite_line_flag,
.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4, .reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
}; };
static const struct vop_ctrl rk3308_ctrl_data = {
.standby = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 1),
.axi_outstanding_max_num = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1f, 16),
.axi_max_outstanding_en = VOP_REG(RK3366_LIT_SYS_CTRL1, 0x1, 12),
.htotal_pw = VOP_REG(RK3366_LIT_DSP_HTOTAL_HS_END, 0x0fff0fff, 0),
.hact_st_end = VOP_REG(RK3366_LIT_DSP_HACT_ST_END, 0x0fff0fff, 0),
.vtotal_pw = VOP_REG(RK3366_LIT_DSP_VTOTAL_VS_END, 0x0fff0fff, 0),
.vact_st_end = VOP_REG(RK3366_LIT_DSP_VACT_ST_END, 0x0fff0fff, 0),
.vact_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VACT_ST_END_F1, 0x0fff0fff, 0),
.vs_st_end_f1 = VOP_REG(RK3366_LIT_DSP_VS_ST_END_F1, 0x0fff0fff, 0),
.global_regdone_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 13),
.auto_gate_en = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 0),
.dsp_layer_sel = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 3),
.overlay_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 4),
.dclk_ddr = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 14),
.rgb_en = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 0),
.rgb_pin_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x7, 2),
.rgb_dclk_pol = VOP_REG(RK3366_LIT_DSP_CTRL0, 0x1, 1),
.dither_up = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 2),
.dither_down = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x7, 6),
.dsp_data_swap = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1f, 9),
.dsp_ccir656_avg = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 5),
.dsp_black = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 15),
.dsp_blank = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 14),
.dsp_outzero = VOP_REG(RK3366_LIT_SYS_CTRL2, 0x1, 3),
.dsp_lut_en = VOP_REG(RK3366_LIT_DSP_CTRL2, 0x1, 5),
.out_mode = VOP_REG(RK3366_LIT_DSP_CTRL2, 0xf, 16),
.dsp_background = VOP_REG(RK3366_LIT_DSP_BG, 0x00ffffff, 0),
.cfg_done = VOP_REG(RK3366_LIT_REG_CFG_DONE, 0x1, 0),
.bcsh_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 0),
.bcsh_r2y_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 1),
.bcsh_out_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 2),
.bcsh_y2r_csc_mode = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x3, 4),
.bcsh_y2r_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 6),
.bcsh_r2y_en = VOP_REG(RK3366_LIT_BCSH_CTRL, 0x1, 7),
.bcsh_color_bar = VOP_REG(RK3366_LIT_BCSH_COL_BAR, 0xffffff, 0),
.bcsh_brightness = VOP_REG(RK3366_LIT_BCSH_BCS, 0xff, 0),
.bcsh_contrast = VOP_REG(RK3366_LIT_BCSH_BCS, 0x1ff, 8),
.bcsh_sat_con = VOP_REG(RK3366_LIT_BCSH_BCS, 0x3ff, 20),
.bcsh_sin_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 0),
.bcsh_cos_hue = VOP_REG(RK3366_LIT_BCSH_H, 0x1ff, 16),
.mcu_pix_total = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 0),
.mcu_cs_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 6),
.mcu_cs_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 10),
.mcu_rw_pst = VOP_REG(RK3366_LIT_MCU_CTRL, 0xf, 16),
.mcu_rw_pend = VOP_REG(RK3366_LIT_MCU_CTRL, 0x3f, 20),
.mcu_clk_sel = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 26),
.mcu_hold_mode = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 27),
.mcu_frame_st = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 28),
.mcu_rs = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 29),
.mcu_bypass = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 30),
.mcu_type = VOP_REG(RK3366_LIT_MCU_CTRL, 0x1, 31),
.mcu_rw_bypass_port = VOP_REG(RK3366_LIT_MCU_RW_BYPASS_PORT,
0xffffffff, 0),
};
const struct vop_data rk3308_vop = {
.version = VOP_VERSION(2, 7),
.max_output = {1920, 1080},
.ctrl = &rk3308_ctrl_data,
.win = &rk3366_win0_data,
.line_flag = &rk3366_vop_lite_line_flag,
.reg_len = RK3366_LIT_FRC_LOWER01_0 * 4,
};

6
include/configs/evb_rk3308.h
View File

@ -12,7 +12,11 @@
#define CONFIG_SYS_MMC_ENV_DEV 0 #define CONFIG_SYS_MMC_ENV_DEV 0
#define CONFIG_CONSOLE_SCROLL_LINES 10 #define ROCKCHIP_DEVICE_SETTINGS \
"stdout=serial,vidconsole\0" \
"stderr=serial,vidconsole\0"
#undef CONFIG_CONSOLE_SCROLL_LINES
#define CONFIG_CONSOLE_SCROLL_LINES 10
#undef CONFIG_BOOTCOMMAND #undef CONFIG_BOOTCOMMAND
#define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND #define CONFIG_BOOTCOMMAND RKIMG_BOOTCOMMAND

1
include/configs/rk3308_common.h
View File

@ -59,6 +59,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \ #define CONFIG_EXTRA_ENV_SETTINGS \
ENV_MEM_LAYOUT_SETTINGS \ ENV_MEM_LAYOUT_SETTINGS \
"partitions=" PARTS_DEFAULT \ "partitions=" PARTS_DEFAULT \
ROCKCHIP_DEVICE_SETTINGS \
BOOTENV BOOTENV
#endif #endif