rockchip: rk3568: support usbplug

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: If2c56d1db774f79689cfbe87bcae7cfcadacae82
This commit is contained in:
Yifeng Zhao 2021-01-28 14:55:43 +08:00 committed by Jianhong Chen
parent 42b8fbc43f
commit 5f73fdb14a
3 changed files with 41 additions and 1 deletions

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@ -385,7 +385,7 @@ config ROCKCHIP_RK3568
bool "Support Rockchip RK3568" bool "Support Rockchip RK3568"
select ARM64 if !ARM64_BOOT_AARCH32 select ARM64 if !ARM64_BOOT_AARCH32
select ARM_SMCCC select ARM_SMCCC
select GICV3 if !ARM64_BOOT_AARCH32 select GICV3 if !ARM64_BOOT_AARCH32 && !SUPPORT_USBPLUG
select SUPPORT_TPL if !ARM64_BOOT_AARCH32 select SUPPORT_TPL if !ARM64_BOOT_AARCH32
select SUPPORT_SPL if !ARM64_BOOT_AARCH32 select SUPPORT_SPL if !ARM64_BOOT_AARCH32
select TPL_TINY_FRAMEWORK if TPL select TPL_TINY_FRAMEWORK if TPL

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@ -16,6 +16,11 @@ DECLARE_GLOBAL_DATA_PTR;
#define PMUGRF_BASE 0xfdc20000 #define PMUGRF_BASE 0xfdc20000
#define GRF_BASE 0xfdc60000 #define GRF_BASE 0xfdc60000
#define GRF_GPIO1B_IOMUX_H 0x0C
#define GRF_GPIO1C_IOMUX_L 0x10
#define GRF_GPIO1C_IOMUX_H 0x14
#define GRF_GPIO1D_IOMUX_L 0x18
#define GRF_GPIO1D_IOMUX_H 0x1C
#define GRF_GPIO1B_DS_2 0x218 #define GRF_GPIO1B_DS_2 0x218
#define GRF_GPIO1B_DS_3 0x21c #define GRF_GPIO1B_DS_3 0x21c
#define GRF_GPIO1C_DS_0 0x220 #define GRF_GPIO1C_DS_0 0x220
@ -863,6 +868,35 @@ int arch_cpu_init(void)
#ifndef CONFIG_TPL_BUILD #ifndef CONFIG_TPL_BUILD
qos_priority_init(); qos_priority_init();
#endif #endif
#elif defined(CONFIG_SUPPORT_USBPLUG)
/*
* When perform idle operation, corresponding clock can
* be opened or gated automatically.
*/
writel(0xffffffff, PMU_BASE_ADDR + PMU_NOC_AUTO_CON0);
writel(0x000f000f, PMU_BASE_ADDR + PMU_NOC_AUTO_CON1);
writel(0x00030000, SGRF_BASE + SGRF_SOC_CON4); /* usb3otg0 master secure setting */
/* Set the emmc sdmmc0 to secure */
writel(((0x3 << 11 | 0x1 << 4) << 16), SGRF_BASE + SGRF_SOC_CON4);
/* set the emmc ds to level 2 */
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_2);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1B_DS_3);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_0);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_1);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
/* emmc and sfc iomux */
writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1B_IOMUX_H);
writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1C_IOMUX_L);
writel((0x7777UL << 16) | (0x2111), GRF_BASE + GRF_GPIO1C_IOMUX_H);
writel((0x7777UL << 16) | (0x1111), GRF_BASE + GRF_GPIO1D_IOMUX_L);
writel(((7 << 0) << 16) | (1 << 0), GRF_BASE + GRF_GPIO1D_IOMUX_H);
/* Set the fspi to secure */
writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
#endif #endif
return 0; return 0;

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@ -19,7 +19,13 @@
#define CONFIG_SYS_MALLOC_LEN (32 << 20) #define CONFIG_SYS_MALLOC_LEN (32 << 20)
#define CONFIG_SYS_CBSIZE 1024 #define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SKIP_LOWLEVEL_INIT #define CONFIG_SKIP_LOWLEVEL_INIT
#ifdef CONFIG_SUPPORT_USBPLUG
#define CONFIG_SYS_TEXT_BASE 0x00000000
#else
#define CONFIG_SYS_TEXT_BASE 0x00a00000 #define CONFIG_SYS_TEXT_BASE 0x00a00000
#endif
#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000 #define CONFIG_SYS_INIT_SP_ADDR 0x00c00000
#define CONFIG_SYS_LOAD_ADDR 0x00c00800 #define CONFIG_SYS_LOAD_ADDR 0x00c00800
#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */ #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */