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UPSTREAM: net: dwc_eth_qos: Fully rewrite RX descriptor field 3 

The RX descriptor field 3 should contain only OWN and BUF1V bits before
being used for receiving data by the DMA engine. However, right now, if
the descriptor was already used for receiving data and is being cleared,
the field 3 is only modified and the aforementioned two bits are ORRed
into the field. This could lead to a residual dirty bits being left in
the field 3 from previous transfer, and it generally does. Fully set the
field 3 instead to clear those residual dirty bits.

Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Stephen Warren <swarren@nvidia.com>
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I5b116fa58de65b3958c3ddd87f6c182c532b9542
This commit is contained in:
Marek Vasut 2020-03-23 02:02:57 +01:00 committed by Joseph Chen
parent 83d31c080c
commit 6143c348bd
1 changed files with 2 additions and 2 deletions
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4
drivers/net/dwc_eth_qos.c
View File

@ -1287,7 +1287,7 @@ static int eqos_start(struct udevice *dev)
struct eqos_desc *rx_desc = &(eqos->rx_descs[i]);
rx_desc->des0 = (u32)(ulong)(eqos->rx_dma_buf +
(i * EQOS_MAX_PACKET_SIZE));
rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
}
eqos->config->ops->eqos_flush_desc(eqos->descs);
@ -1481,7 +1481,7 @@ static int eqos_free_pkt(struct udevice *dev, uchar *packet, int length)
* writes to the rest of the descriptor too.
*/
mb();
rx_desc->des3 |= EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
rx_desc->des3 = EQOS_DESC3_OWN | EQOS_DESC3_BUF1V;
eqos->config->ops->eqos_flush_desc(rx_desc);
writel((ulong)rx_desc, &eqos->dma_regs->ch0_rxdesc_tail_pointer);