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spi: rockchip_sfc support SPI Nor which's capacity is larger than 16MB 

Change-Id: I2e76abae6d84d8e393395458bb1cf801a30e9fb8
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin 2019-09-26 22:35:19 +08:00 committed by Jianhong Chen
parent 5a9f9698ff
commit 6e1213715c
1 changed files with 26 additions and 32 deletions
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58
drivers/spi/rockchip_sfc.c
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@ -248,28 +248,6 @@ static void rockchip_sfc_setup_xfer(struct rockchip_sfc *sfc, u32 trb)
u32 val = 0x02; u32 val = 0x02;
u8 data_width = IF_TYPE_STD; u8 data_width = IF_TYPE_STD;
switch (sfc->addr_bits) {
case 0:
sfc->addr_bits = SFC_ADDR_0BITS;
break;
case 8:
sfc->addr_bits = SFC_ADDR_XBITS;
writel(7, &regs->abit);
break;
case 16:
sfc->addr_bits = SFC_ADDR_XBITS;
writel(15, &regs->abit);
break;
case 24:
sfc->addr_bits = SFC_ADDR_24BITS;
break;
case 32:
sfc->addr_bits = SFC_ADDR_32BITS;
break;
default:
pr_err("%s addr-bits error %d\n", __func__, sfc->addr_bits);
return;
}
SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits); SFC_DBG("--- sfc.addr_bit %x\n", sfc->addr_bits);
if (sfc->addr_bits == SFC_ADDR_24BITS || if (sfc->addr_bits == SFC_ADDR_24BITS ||
@ -512,25 +490,41 @@ static int rockchip_sfc_xfer(struct udevice *dev, unsigned int bitlen,
if (flags & SPI_XFER_BEGIN) { if (flags & SPI_XFER_BEGIN) {
sfc->cmd = pcmd[0]; sfc->cmd = pcmd[0];
if (len >= 4) { switch (len) {
sfc->addr_bits = 24; case 6: /* Nor >16MB 0x6b dummy op */
sfc->dummy_bits = (len - 4) << 3; sfc->addr_bits = SFC_ADDR_32BITS;
sfc->dummy_bits = 8;
sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16)| (pcmd[1] << 24);
break;
case 5: /* Nor <=16MB 0x6b dummy op, Nor >16MB no dummy op */
sfc->addr_bits = SFC_ADDR_32BITS;
sfc->dummy_bits = 0;
sfc->addr = pcmd[4] | (pcmd[3] << 8) | (pcmd[2] << 16)| (pcmd[1] << 24);
break;
case 4: /* Nand erase and read, Nor <=16MB no dummy op */
sfc->addr_bits = SFC_ADDR_24BITS;
sfc->dummy_bits = 0;
sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16); sfc->addr = pcmd[3] | (pcmd[2] << 8) | (pcmd[1] << 16);
} else if (len == 3 && dout) { break;
sfc->addr_bits = 16; case 3: /* Nand prog, */
sfc->addr_bits = SFC_ADDR_XBITS;
sfc->dummy_bits = 0; sfc->dummy_bits = 0;
sfc->addr = pcmd[2] | pcmd[1] << 8; sfc->addr = pcmd[2] | pcmd[1] << 8;
} else if (len == 2 && dout) { break;
sfc->addr_bits = 8; case 2: /* Nand read/write feature */
sfc->addr_bits = SFC_ADDR_XBITS;
sfc->dummy_bits = 0; sfc->dummy_bits = 0;
sfc->addr = pcmd[1]; sfc->addr = pcmd[1];
} else { break;
sfc->addr_bits = 0; default: /* Nand/Nor Read/Write status */
sfc->addr_bits = SFC_ADDR_0BITS;
sfc->dummy_bits = 0; sfc->dummy_bits = 0;
sfc->addr = 0; sfc->addr = 0;
break;
} }
SFC_DBG("%s %d %x %d %d %x\n", __func__, len, sfc->cmd, sfc->addr_bits,
sfc->dummy_bits, sfc->addr);
} }
if (flags & SPI_XFER_END) { if (flags & SPI_XFER_END) {
if (din) { if (din) {
sfc->rw = SFC_RD; sfc->rw = SFC_RD;