diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index 6c1228b1be..2e3d11eb7e 100644
--- a/drivers/misc/rockchip-otp.c
+++ b/drivers/misc/rockchip-otp.c
@@ -10,47 +10,7 @@
 #include <linux/bitops.h>
 #include <linux/delay.h>
 #include <misc.h>
-
-/* OTP Register Offsets */
-#define OTPC_SBPI_CTRL			0x0020
-#define OTPC_SBPI_CMD_VALID_PRE		0x0024
-#define OTPC_SBPI_CS_VALID_PRE		0x0028
-#define OTPC_SBPI_STATUS		0x002C
-#define OTPC_USER_CTRL			0x0100
-#define OTPC_USER_ADDR			0x0104
-#define OTPC_USER_ENABLE		0x0108
-#define OTPC_USER_Q			0x0124
-#define OTPC_INT_STATUS			0x0304
-#define OTPC_SBPI_CMD0_OFFSET		0x1000
-#define OTPC_SBPI_CMD1_OFFSET		0x1004
-
-/* OTP Register bits and masks */
-#define OTPC_USER_ADDR_MASK		GENMASK(31, 16)
-#define OTPC_USE_USER			BIT(0)
-#define OTPC_USE_USER_MASK		GENMASK(16, 16)
-#define OTPC_USER_FSM_ENABLE		BIT(0)
-#define OTPC_USER_FSM_ENABLE_MASK	GENMASK(16, 16)
-#define OTPC_SBPI_DONE			BIT(1)
-#define OTPC_USER_DONE			BIT(2)
-
-#define SBPI_DAP_ADDR			0x02
-#define SBPI_DAP_ADDR_SHIFT		8
-#define SBPI_DAP_ADDR_MASK		GENMASK(31, 24)
-#define SBPI_CMD_VALID_MASK		GENMASK(31, 16)
-#define SBPI_DAP_CMD_WRF		0xC0
-#define SBPI_DAP_REG_ECC		0x3A
-#define SBPI_ECC_ENABLE			0x00
-#define SBPI_ECC_DISABLE		0x09
-#define SBPI_ENABLE			BIT(0)
-#define SBPI_ENABLE_MASK		GENMASK(16, 16)
-
-#define OTPC_TIMEOUT			10000
-
-typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
-
-struct rockchip_otp_platdata {
-	void __iomem *base;
-};
+#include <rockchip-otp.h>
 
 static int rockchip_otp_wait_status(struct rockchip_otp_platdata *otp,
 				    u32 flag)
diff --git a/include/rockchip-otp.h b/include/rockchip-otp.h
new file mode 100644
index 0000000000..5c6a1340d7
--- /dev/null
+++ b/include/rockchip-otp.h
@@ -0,0 +1,51 @@
+/* SPDX-License-Identifier:     GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef _ROCKCHIP_OTP_H_
+#define _ROCKCHIP_OTP_H_
+
+/* OTP Register Offsets */
+#define OTPC_SBPI_CTRL			0x0020
+#define OTPC_SBPI_CMD_VALID_PRE		0x0024
+#define OTPC_SBPI_CS_VALID_PRE		0x0028
+#define OTPC_SBPI_STATUS		0x002C
+#define OTPC_USER_CTRL			0x0100
+#define OTPC_USER_ADDR			0x0104
+#define OTPC_USER_ENABLE		0x0108
+#define OTPC_USER_QP			0x0120
+#define OTPC_USER_Q			0x0124
+#define OTPC_INT_STATUS			0x0304
+#define OTPC_SBPI_CMD0_OFFSET		0x1000
+#define OTPC_SBPI_CMD1_OFFSET		0x1004
+
+/* OTP Register bits and masks */
+#define OTPC_USER_ADDR_MASK		GENMASK(31, 16)
+#define OTPC_USE_USER			BIT(0)
+#define OTPC_USE_USER_MASK		GENMASK(16, 16)
+#define OTPC_USER_FSM_ENABLE		BIT(0)
+#define OTPC_USER_FSM_ENABLE_MASK	GENMASK(16, 16)
+#define OTPC_SBPI_DONE			BIT(1)
+#define OTPC_USER_DONE			BIT(2)
+
+#define SBPI_DAP_ADDR			0x02
+#define SBPI_DAP_ADDR_SHIFT		8
+#define SBPI_DAP_ADDR_MASK		GENMASK(31, 24)
+#define SBPI_CMD_VALID_MASK		GENMASK(31, 16)
+#define SBPI_DAP_CMD_WRF		0xC0
+#define SBPI_DAP_REG_ECC		0x3A
+#define SBPI_ECC_ENABLE			0x00
+#define SBPI_ECC_DISABLE		0x09
+#define SBPI_ENABLE			BIT(0)
+#define SBPI_ENABLE_MASK		GENMASK(16, 16)
+
+#define OTPC_TIMEOUT			10000
+
+typedef int (*OTP_READ)(struct udevice *dev, int offset, void *buf, int size);
+
+struct rockchip_otp_platdata {
+	void __iomem *base;
+};
+
+#endif