sf: add support for GD25Q256
Add support for GD25Q256, a 32MiB SPI Nor flash from Gigadevice. Change-Id: Id28c00189058971580406270e708a126c94c0461 Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This commit is contained in:
parent
b49168b2b6
commit
6f775b34e5
|
|
@ -37,6 +37,7 @@ enum spi_nor_option_flags {
|
|||
#define SPI_FLASH_CFI_MFR_SST 0xbf
|
||||
#define SPI_FLASH_CFI_MFR_WINBOND 0xef
|
||||
#define SPI_FLASH_CFI_MFR_ATMEL 0x1f
|
||||
#define SPI_FLASH_CIF_MFR_GIGADEVICE 0xc8
|
||||
|
||||
/* Erase commands */
|
||||
#define CMD_ERASE_4K 0x20
|
||||
|
|
|
|||
|
|
@ -807,7 +807,7 @@ int stm_unlock(struct spi_flash *flash, u32 ofs, size_t len)
|
|||
#endif
|
||||
|
||||
|
||||
#ifdef CONFIG_SPI_FLASH_MACRONIX
|
||||
#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
|
||||
static int macronix_quad_enable(struct spi_flash *flash)
|
||||
{
|
||||
u8 qeb_status;
|
||||
|
|
@ -892,8 +892,9 @@ static int set_quad_mode(struct spi_flash *flash,
|
|||
const struct spi_flash_info *info)
|
||||
{
|
||||
switch (JEDEC_MFR(info)) {
|
||||
#ifdef CONFIG_SPI_FLASH_MACRONIX
|
||||
#if defined(CONFIG_SPI_FLASH_MACRONIX) || defined(CONFIG_SPI_FLASH_GIGADEVICE)
|
||||
case SPI_FLASH_CFI_MFR_MACRONIX:
|
||||
case SPI_FLASH_CIF_MFR_GIGADEVICE:
|
||||
return macronix_quad_enable(flash);
|
||||
#endif
|
||||
#if defined(CONFIG_SPI_FLASH_SPANSION) || defined(CONFIG_SPI_FLASH_WINBOND)
|
||||
|
|
|
|||
|
|
@ -65,6 +65,7 @@ const struct spi_flash_info spi_flash_ids[] = {
|
|||
#ifdef CONFIG_SPI_FLASH_GIGADEVICE /* GIGADEVICE */
|
||||
{"gd25q64b", INFO(0xc84017, 0x0, 64 * 1024, 128, SECT_4K) },
|
||||
{"gd25lq32", INFO(0xc86016, 0x0, 64 * 1024, 64, SECT_4K) },
|
||||
{"GD25Q256", INFO(0xc84019, 0x0, 64 * 1024, 512, RD_FULL | WR_QPP | SECT_4K)},
|
||||
#endif
|
||||
#ifdef CONFIG_SPI_FLASH_ISSI /* ISSI */
|
||||
{"is25lp032", INFO(0x9d6016, 0x0, 64 * 1024, 64, 0) },
|
||||
|
|
|
|||
Loading…
Reference in New Issue