rockchip: include: rk3128-cru: add same clk define for mipi dsi
Change-Id: I045ad0101c152648de2a0c53d160b2398367a6e4 Signed-off-by: Jerry Xu <xbl@rock-chips.com>
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@ -44,6 +44,7 @@
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#define SCLK_PVTM_CORE 123
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#define SCLK_PVTM_CORE 123
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#define SCLK_PVTM_GPU 124
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#define SCLK_PVTM_GPU 124
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#define SCLK_PVTM_VIDEO 125
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#define SCLK_PVTM_VIDEO 125
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#define SCLK_MIPI_24M 148
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#define SCLK_MAC 151
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#define SCLK_MAC 151
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#define SCLK_MACREF 152
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#define SCLK_MACREF 152
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#define SCLK_SFC 160
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#define SCLK_SFC 160
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@ -64,6 +65,7 @@
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#define PCLK_GPIO1 321
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#define PCLK_GPIO1 321
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#define PCLK_GPIO2 322
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#define PCLK_GPIO2 322
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#define PCLK_GPIO3 323
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#define PCLK_GPIO3 323
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#define PCLK_MIPI 325
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#define PCLK_GRF 329
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#define PCLK_GRF 329
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#define PCLK_I2C0 332
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#define PCLK_I2C0 332
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#define PCLK_I2C1 333
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#define PCLK_I2C1 333
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@ -80,6 +82,7 @@
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#define PCLK_PERI 363
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#define PCLK_PERI 363
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#define PCLK_DDRUPCTL 364
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#define PCLK_DDRUPCTL 364
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#define PCLK_WDT 368
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#define PCLK_WDT 368
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#define PCLK_MIPIPHY 370
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/* hclk gates */
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/* hclk gates */
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#define HCLK_OTG0 449
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#define HCLK_OTG0 449
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@ -91,6 +94,7 @@
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#define HCLK_I2S 462
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#define HCLK_I2S 462
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#define HCLK_LCDC 465
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#define HCLK_LCDC 465
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#define HCLK_ROM 467
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#define HCLK_ROM 467
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#define HCLK_VIO_H2P 469
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#define HCLK_VIO_BUS 472
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#define HCLK_VIO_BUS 472
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#define HCLK_VCODEC 476
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#define HCLK_VCODEC 476
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#define HCLK_CPU 477
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#define HCLK_CPU 477
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@ -129,6 +133,7 @@
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#define SRST_GPIO0 32
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#define SRST_GPIO0 32
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#define SRST_GPIO1 33
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#define SRST_GPIO1 33
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#define SRST_GPIO2 34
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#define SRST_GPIO2 34
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#define SRST_MIPIPHY_P 36
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#define SRST_UART0 39
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#define SRST_UART0 39
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#define SRST_UART1 40
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#define SRST_UART1 40
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#define SRST_UART2 41
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#define SRST_UART2 41
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@ -186,5 +191,6 @@
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#define SRST_GPU_NIU_A 122
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#define SRST_GPU_NIU_A 122
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#define SRST_DBG_P 131
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#define SRST_DBG_P 131
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#define SRST_VIO_MIPI_DSI 137
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#endif
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#endif
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