diff --git a/drivers/mtd/nand/spi/Kconfig b/drivers/mtd/nand/spi/Kconfig
index b58b769c54..b53b78c1a0 100644
--- a/drivers/mtd/nand/spi/Kconfig
+++ b/drivers/mtd/nand/spi/Kconfig
@@ -77,4 +77,10 @@ config SPI_NAND_FORESEE
 	help
 	  Add support for various FORESEE SPI Nand flash chips
 
+config SPI_NAND_BIWIN
+	default y
+	bool "BIWIN SPI flash support"
+	help
+	  Add support for various BIWIN SPI Nand flash chips
+
 endif
diff --git a/drivers/mtd/nand/spi/Makefile b/drivers/mtd/nand/spi/Makefile
index 2ec3b33285..a8ca970920 100644
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -12,4 +12,5 @@ obj-$(CONFIG_SPI_NAND_XTX) += xtx.o
 obj-$(CONFIG_SPI_NAND_HYF) += hyf.o
 obj-$(CONFIG_SPI_NAND_FMSH) += fmsh.o
 obj-$(CONFIG_SPI_NAND_FORESEE) += foresee.o
+obj-$(CONFIG_SPI_NAND_BIWIN) += biwin.o
 obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
diff --git a/drivers/mtd/nand/spi/biwin.c b/drivers/mtd/nand/spi/biwin.c
new file mode 100644
index 0000000000..5c0629547c
--- /dev/null
+++ b/drivers/mtd/nand/spi/biwin.c
@@ -0,0 +1,130 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
+ */
+
+#ifndef __UBOOT__
+#include <linux/device.h>
+#include <linux/kernel.h>
+#endif
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_BIWIN		0xBC
+
+#define BIWIN_CFG_BUF_READ		BIT(3)
+#define BIWIN_STATUS_ECC_HAS_BITFLIPS_T	(3 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+		SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+		SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int bwjx08k_ooblayout_ecc(struct mtd_info *mtd, int section,
+				 struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 12;
+	region->length = 4;
+
+	return 0;
+}
+
+static int bwjx08k_ooblayout_free(struct mtd_info *mtd, int section,
+				  struct mtd_oob_region *region)
+{
+	if (section > 3)
+		return -ERANGE;
+
+	region->offset = (16 * section) + 2;
+	region->length = 10;
+
+	return 0;
+}
+
+static const struct mtd_ooblayout_ops bwjx08k_ooblayout = {
+	.ecc = bwjx08k_ooblayout_ecc,
+	.rfree = bwjx08k_ooblayout_free,
+};
+
+static int bwjx08k_ecc_get_status(struct spinand_device *spinand,
+				  u8 status)
+{
+	struct nand_device *nand = spinand_to_nand(spinand);
+
+	switch (status & STATUS_ECC_MASK) {
+	case STATUS_ECC_NO_BITFLIPS:
+		return 0;
+
+	case STATUS_ECC_UNCOR_ERROR:
+		return -EBADMSG;
+
+	case STATUS_ECC_HAS_BITFLIPS:
+		return 1;
+
+	default:
+		return nand->eccreq.strength;
+	}
+
+	return -EINVAL;
+}
+
+/* Another set for the same id[2] devices in one series */
+static const struct spinand_info biwin_spinand_table[] = {
+	SPINAND_INFO("BWJX08K", 0xB3,
+		     NAND_MEMORG(1, 2048, 64, 64, 2048, 1, 1, 1),
+		     NAND_ECCREQ(8, 512),
+		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+					      &write_cache_variants,
+					      &update_cache_variants),
+		     SPINAND_HAS_QE_BIT,
+		     SPINAND_ECCINFO(&bwjx08k_ooblayout,
+				     bwjx08k_ecc_get_status)),
+};
+
+/**
+ * biwin_spinand_detect - initialize device related part in spinand_device
+ * struct if it is a Winbond device.
+ * @spinand: SPI NAND device structure
+ */
+static int biwin_spinand_detect(struct spinand_device *spinand)
+{
+	u8 *id = spinand->id.data;
+	int ret;
+
+	/*
+	 * BIWIN SPI NAND read ID need a dummy byte,
+	 * so the first byte in raw_id is dummy.
+	 */
+	if (id[1] != SPINAND_MFR_BIWIN)
+		return 0;
+
+	ret = spinand_match_and_init(spinand, biwin_spinand_table,
+				     ARRAY_SIZE(biwin_spinand_table), id[2]);
+	if (ret)
+		return ret;
+
+	return 1;
+}
+
+static const struct spinand_manufacturer_ops biwin_spinand_manuf_ops = {
+	.detect = biwin_spinand_detect,
+};
+
+const struct spinand_manufacturer biwin_spinand_manufacturer = {
+	.id = SPINAND_MFR_BIWIN,
+	.name = "BIWIN",
+	.ops = &biwin_spinand_manuf_ops,
+};
diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
index ebbfe5ab17..eb8cb26462 100644
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -848,6 +848,9 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = {
 #ifdef CONFIG_SPI_NAND_FORESEE
 	&foresee_spinand_manufacturer,
 #endif
+#ifdef CONFIG_SPI_NAND_BIWIN
+	&biwin_spinand_manufacturer,
+#endif
 };
 
 static int spinand_manufacturer_detect(struct spinand_device *spinand)
diff --git a/include/linux/mtd/spinand.h b/include/linux/mtd/spinand.h
index 7050d90a1c..043c5d5cc7 100644
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -212,6 +212,7 @@ extern const struct spinand_manufacturer xtx_spinand_manufacturer;
 extern const struct spinand_manufacturer hyf_spinand_manufacturer;
 extern const struct spinand_manufacturer fmsh_spinand_manufacturer;
 extern const struct spinand_manufacturer foresee_spinand_manufacturer;
+extern const struct spinand_manufacturer biwin_spinand_manufacturer;
 
 /**
  * struct spinand_op_variants - SPI NAND operation variants