diff --git a/drivers/rkflash/rk_sftl_arm_v7.S b/drivers/rkflash/rk_sftl_arm_v7.S index 1113098210..741fe7164f 100644 --- a/drivers/rkflash/rk_sftl_arm_v7.S +++ b/drivers/rkflash/rk_sftl_arm_v7.S @@ -2,7 +2,7 @@ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd * * SPDX-License-Identifier: GPL-2.0 - * date: 2019-10-28 + * date: 2020-09-25 */ .arch armv7-a .eabi_attribute 20, 1 @@ -58,32 +58,6 @@ l2p_addr_tran.isra.0: .L3: .word .LANCHOR0 .size l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0 - .section .text.ftl_set_blk_mode.part.6,"ax",%progbits - .align 1 - .syntax unified - .thumb - .thumb_func - .fpu softvfp - .type ftl_set_blk_mode.part.6, %function -ftl_set_blk_mode.part.6: - @ args = 0, pretend = 0, frame = 0 - @ frame_needed = 0, uses_anonymous_args = 0 - @ link register save eliminated. - ldr r3, .L6 - lsrs r1, r0, #5 - and r0, r0, #31 - ldr r2, [r3] - movs r3, #1 - lsl r0, r3, r0 - ldr r3, [r2, r1, lsl #2] - orrs r3, r3, r0 - str r3, [r2, r1, lsl #2] - bx lr -.L7: - .align 2 -.L6: - .word .LANCHOR1 - .size ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6 .section .text.Ftl_log2,"ax",%progbits .align 1 .global Ftl_log2 @@ -98,17 +72,17 @@ Ftl_log2: @ link register save eliminated. movs r1, #0 movs r2, #1 -.L9: +.L6: cmp r2, r0 uxth r3, r1 add r1, r1, #1 - bls .L10 + bls .L7 subs r0, r3, #1 uxth r0, r0 bx lr -.L10: +.L7: lsls r2, r2, #1 - b .L9 + b .L6 .size Ftl_log2, .-Ftl_log2 .section .text.FtlPrintInfo,"ax",%progbits .align 1 @@ -136,38 +110,38 @@ FtlSysBlkNumInit: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L13 + ldr r3, .L10 cmp r0, #24 it cc movcc r0, #24 - ldr r2, .L13+4 + ldr r2, .L10+4 str r0, [r3] - ldr r3, .L13+8 + ldr r3, .L10+8 ldrh r3, [r3] muls r3, r0, r3 str r3, [r2] - ldr r2, .L13+12 + ldr r2, .L10+12 ldrh r2, [r2] subs r0, r2, r0 - ldr r2, .L13+16 + ldr r2, .L10+16 strh r0, [r2] @ movhi movs r0, #0 - ldr r2, .L13+20 + ldr r2, .L10+20 ldr r2, [r2] subs r3, r2, r3 - ldr r2, .L13+24 + ldr r2, .L10+24 str r3, [r2] bx lr -.L14: +.L11: .align 2 -.L13: - .word .LANCHOR2 - .word .LANCHOR4 +.L10: + .word .LANCHOR1 .word .LANCHOR3 - .word .LANCHOR6 + .word .LANCHOR2 .word .LANCHOR5 - .word .LANCHOR8 + .word .LANCHOR4 .word .LANCHOR7 + .word .LANCHOR6 .size FtlSysBlkNumInit, .-FtlSysBlkNumInit .global __aeabi_idiv .section .text.FtlConstantsInit,"ax",%progbits @@ -184,35 +158,35 @@ FtlConstantsInit: push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} mov r3, r0 ldrh r4, [r0] - ldr r2, .L26 + ldr r2, .L23 ldrh r5, [r0, #2] ldrh r7, [r3, #14] strh r4, [r2] @ movhi - ldr r2, .L26+4 + ldr r2, .L23+4 ldrh ip, [r0, #4] cmp r7, #4 - ldr r0, .L26+8 + ldr r0, .L23+8 strh r5, [r2] @ movhi - ldr r1, .L26+12 + ldr r1, .L23+12 ldrh r2, [r3, #6] - ldr r6, .L26+16 + ldr r6, .L23+16 strh ip, [r0] @ movhi strh r2, [r1] @ movhi strh r7, [r6] @ movhi - bne .L16 + bne .L13 lsrs r2, r2, #1 strh r2, [r1] @ movhi movs r2, #8 strh r2, [r6] @ movhi -.L17: - ldr r7, .L26+20 +.L14: + ldr r7, .L23+20 movs r2, #0 -.L18: +.L15: strb r2, [r2, r7] adds r2, r2, #1 cmp r2, #32 - bne .L18 - ldr r2, .L26+24 + bne .L15 + ldr r2, .L23+24 cmp r4, #1 mov r7, #5 ldrh r0, [r0] @@ -222,37 +196,37 @@ FtlConstantsInit: it eq strheq r4, [r2] @ movhi mov r4, #640 - ldr r2, .L26+28 + ldr r2, .L23+28 smulbb r5, r5, r0 - ldr r7, .L26+32 + ldr r7, .L23+32 strh r4, [r2] @ movhi uxth r5, r5 ldrh r4, [r1] - ldr r2, .L26+36 + ldr r2, .L23+36 strh ip, [r7] @ movhi - ldr r7, .L26+40 + ldr r7, .L23+40 smulbb r0, r0, r4 strh r5, [r2] @ movhi - ldr r2, .L26+44 + ldr r2, .L23+44 uxth r0, r0 strh r0, [r2] @ movhi bl Ftl_log2 ldr r3, [sp, #4] - ldr r2, .L26+48 + ldr r2, .L23+48 ldrh fp, [r6] ldrh r8, [r3, #12] strh r0, [r2] @ movhi - ldr r2, .L26+52 + ldr r2, .L23+52 mov r0, fp strh r8, [r7] @ movhi smulbb r1, r5, r8 - ldr r6, .L26+56 + ldr r6, .L23+56 strh r8, [r2] @ movhi - ldr r2, .L26+60 + ldr r2, .L23+60 strh r1, [r2] @ movhi bl Ftl_log2 lsl r2, fp, #9 - ldr r1, .L26+64 + ldr r1, .L23+64 ldr r3, [sp, #4] mov r10, r0 uxth r2, r2 @@ -260,25 +234,25 @@ FtlConstantsInit: mov r0, #5120 strh r2, [r1] @ movhi lsrs r2, r2, #8 - ldr r1, .L26+68 + ldr r1, .L23+68 strh r2, [r1] @ movhi mul r1, r8, fp ldrh r2, [r3, #20] - ldr r3, .L26+72 + ldr r3, .L23+72 strh r2, [r3] @ movhi mul r3, r4, r5 - ldr r2, .L26+76 + ldr r2, .L23+76 lsls r4, r4, #6 str r3, [r2] mul r3, fp, r3 - ldr r2, .L26+80 + ldr r2, .L23+80 mul r3, r8, r3 - ldr r8, .L26+116 + ldr r8, .L23+116 asrs r3, r3, #11 str r3, [r2] bl __aeabi_idiv uxth r0, r0 - ldr r2, .L26+84 + ldr r2, .L23+84 mov r1, r5 cmp r0, #4 itet ls @@ -289,11 +263,11 @@ FtlConstantsInit: asr r3, r3, r10 add r10, r10, #9 asr r4, r4, r10 - ldr r10, .L26+120 + ldr r10, .L23+120 adds r3, r3, #2 ldrh r0, [r8] strh r3, [r2] @ movhi - ldr r3, .L26+88 + ldr r3, .L23+88 strh r4, [r3] @ movhi uxth r4, r4 mul r3, r5, r4 @@ -301,7 +275,7 @@ FtlConstantsInit: str r3, [r10] bl __aeabi_uidiv uxtah r0, r4, r0 - ldr r4, .L26+92 + ldr r4, .L23+92 cmp r5, #1 it eq addeq r0, r0, #4 @@ -310,9 +284,9 @@ FtlConstantsInit: bl FtlSysBlkNumInit ldr r2, [r4] movs r0, #0 - ldr r3, .L26+96 + ldr r3, .L23+96 str r2, [r3] - ldr r3, .L26+100 + ldr r3, .L23+100 ldr r2, [r3] ldrh r3, [r7] lsls r2, r2, #2 @@ -320,13 +294,13 @@ FtlConstantsInit: ldrh r2, [r6] adds r2, r2, #9 lsrs r3, r3, r2 - ldr r2, .L26+104 + ldr r2, .L23+104 adds r3, r3, #2 strh r3, [r2] @ movhi movs r2, #32 - ldr r3, .L26+108 + ldr r3, .L23+108 strh r2, [r3] @ movhi - ldr r3, .L26+112 + ldr r3, .L23+112 str r0, [r3] ldrh r3, [r8] adds r3, r3, #3 @@ -337,50 +311,50 @@ FtlConstantsInit: add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L16: +.L13: cmp r7, #8 - bne .L17 + bne .L14 cmp ip, #1 itttt eq lsreq r2, r2, #1 strheq r2, [r1] @ movhi moveq r2, #2 strheq r2, [r0] @ movhi - b .L17 -.L27: + b .L14 +.L24: .align 2 -.L26: +.L23: + .word .LANCHOR8 .word .LANCHOR9 .word .LANCHOR10 + .word .LANCHOR5 .word .LANCHOR11 - .word .LANCHOR6 .word .LANCHOR12 .word .LANCHOR13 - .word .LANCHOR14 - .word .LANCHOR16 .word .LANCHOR15 - .word .LANCHOR3 - .word .LANCHOR19 - .word .LANCHOR17 + .word .LANCHOR14 + .word .LANCHOR2 .word .LANCHOR18 + .word .LANCHOR16 + .word .LANCHOR17 + .word .LANCHOR19 + .word .LANCHOR21 .word .LANCHOR20 .word .LANCHOR22 - .word .LANCHOR21 .word .LANCHOR23 .word .LANCHOR24 - .word .LANCHOR25 - .word .LANCHOR8 - .word .LANCHOR26 - .word .LANCHOR28 - .word .LANCHOR29 - .word .LANCHOR2 - .word .LANCHOR31 .word .LANCHOR7 + .word .LANCHOR25 + .word .LANCHOR27 + .word .LANCHOR28 + .word .LANCHOR1 + .word .LANCHOR30 + .word .LANCHOR6 + .word .LANCHOR31 .word .LANCHOR32 .word .LANCHOR33 - .word .LANCHOR34 - .word .LANCHOR27 - .word .LANCHOR30 + .word .LANCHOR26 + .word .LANCHOR29 .size FtlConstantsInit, .-FtlConstantsInit .section .text.IsBlkInVendorPart,"ax",%progbits .align 1 @@ -394,32 +368,32 @@ IsBlkInVendorPart: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L35 + ldr r3, .L32 ldrh r3, [r3] - cbz r3, .L34 - ldr r3, .L35+4 - ldr r2, .L35+8 + cbz r3, .L31 + ldr r3, .L32+4 + ldr r2, .L32+8 ldr r3, [r3] ldrh r2, [r2] add r2, r3, r2, lsl #1 -.L30: +.L27: cmp r3, r2 - bne .L31 -.L34: + bne .L28 +.L31: movs r0, #0 bx lr -.L31: +.L28: ldrh r1, [r3], #2 cmp r0, r1 - bne .L30 + bne .L27 movs r0, #1 bx lr -.L36: +.L33: .align 2 -.L35: +.L32: + .word .LANCHOR34 .word .LANCHOR35 - .word .LANCHOR36 - .word .LANCHOR27 + .word .LANCHOR26 .size IsBlkInVendorPart, .-IsBlkInVendorPart .section .text.FtlCacheWriteBack,"ax",%progbits .align 1 @@ -448,13 +422,13 @@ sftl_get_density: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L39 + ldr r3, .L36 ldr r0, [r3] bx lr -.L40: +.L37: .align 2 -.L39: - .word .LANCHOR34 +.L36: + .word .LANCHOR33 .size sftl_get_density, .-sftl_get_density .global __aeabi_uidivmod .section .text.FtlBbmMapBadBlock,"ax",%progbits @@ -468,14 +442,14 @@ sftl_get_density: FtlBbmMapBadBlock: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L42 + ldr r3, .L39 push {r0, r1, r2, r4, r5, r6, r7, lr} mov r5, r0 ldrh r4, [r3] mov r1, r4 bl __aeabi_uidiv mov r1, r4 - ldr r4, .L42+4 + ldr r4, .L39+4 uxth r6, r0 mov r0, r5 bl __aeabi_uidivmod @@ -492,7 +466,7 @@ FtlBbmMapBadBlock: mov r2, r6 str r0, [sp] mov r1, r5 - ldr r0, .L42+8 + ldr r0, .L39+8 bl printf ldrh r3, [r4, #6] movs r0, #0 @@ -501,11 +475,11 @@ FtlBbmMapBadBlock: add sp, sp, #12 @ sp needed pop {r4, r5, r6, r7, pc} -.L43: +.L40: .align 2 -.L42: - .word .LANCHOR17 - .word .LANCHOR37 +.L39: + .word .LANCHOR16 + .word .LANCHOR36 .word .LC0 .size FtlBbmMapBadBlock, .-FtlBbmMapBadBlock .section .text.FtlBbmIsBadBlock,"ax",%progbits @@ -519,7 +493,7 @@ FtlBbmMapBadBlock: FtlBbmIsBadBlock: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L45 + ldr r3, .L42 push {r4, r5, r6, lr} mov r6, r0 ldrh r5, [r3] @@ -529,7 +503,7 @@ FtlBbmIsBadBlock: uxth r4, r1 mov r1, r5 bl __aeabi_uidiv - ldr r3, .L45+4 + ldr r3, .L42+4 uxth r0, r0 lsrs r2, r4, #5 and r4, r4, #31 @@ -539,11 +513,11 @@ FtlBbmIsBadBlock: lsrs r0, r0, r4 and r0, r0, #1 pop {r4, r5, r6, pc} -.L46: +.L43: .align 2 -.L45: - .word .LANCHOR17 - .word .LANCHOR37 +.L42: + .word .LANCHOR16 + .word .LANCHOR36 .size FtlBbmIsBadBlock, .-FtlBbmIsBadBlock .section .text.FtlBbtInfoPrint,"ax",%progbits .align 1 @@ -572,12 +546,12 @@ V2P_block: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, lr} mov r5, r1 - ldr r3, .L49 + ldr r3, .L46 mov r7, r0 ldrh r6, [r3] mov r1, r6 bl __aeabi_uidiv - ldr r3, .L49+4 + ldr r3, .L46+4 smulbb r5, r6, r5 mov r1, r6 ldrh r4, [r3] @@ -588,11 +562,11 @@ V2P_block: add r0, r0, r4 uxth r0, r0 pop {r3, r4, r5, r6, r7, pc} -.L50: +.L47: .align 2 -.L49: - .word .LANCHOR11 - .word .LANCHOR17 +.L46: + .word .LANCHOR10 + .word .LANCHOR16 .size V2P_block, .-V2P_block .section .text.P2V_plane,"ax",%progbits .align 1 @@ -605,11 +579,11 @@ V2P_block: P2V_plane: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L52 + ldr r3, .L49 push {r4, r5, r6, lr} mov r6, r0 ldrh r5, [r3] - ldr r3, .L52+4 + ldr r3, .L49+4 ldrh r1, [r3] bl __aeabi_uidiv smulbb r4, r0, r5 @@ -619,11 +593,11 @@ P2V_plane: add r1, r1, r4 uxth r0, r1 pop {r4, r5, r6, pc} -.L53: +.L50: .align 2 -.L52: - .word .LANCHOR11 - .word .LANCHOR17 +.L49: + .word .LANCHOR10 + .word .LANCHOR16 .size P2V_plane, .-P2V_plane .section .text.P2V_block_in_plane,"ax",%progbits .align 1 @@ -637,20 +611,20 @@ P2V_block_in_plane: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r3, lr} - ldr r3, .L55 + ldr r3, .L52 ldrh r1, [r3] bl __aeabi_uidivmod - ldr r3, .L55+4 + ldr r3, .L52+4 uxth r0, r1 ldrh r1, [r3] bl __aeabi_uidiv uxth r0, r0 pop {r3, pc} -.L56: +.L53: .align 2 -.L55: - .word .LANCHOR17 - .word .LANCHOR11 +.L52: + .word .LANCHOR16 + .word .LANCHOR10 .size P2V_block_in_plane, .-P2V_block_in_plane .section .text.ftl_cmp_data_ver,"ax",%progbits .align 1 @@ -665,14 +639,14 @@ ftl_cmp_data_ver: @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. cmp r0, r1 - bls .L58 + bls .L55 subs r0, r0, r1 cmp r0, #-2147483648 ite hi movhi r0, #0 movls r0, #1 bx lr -.L58: +.L55: subs r0, r1, r0 cmp r0, #-2147483648 ite ls @@ -692,15 +666,15 @@ FtlFreeSysBlkQueueEmpty: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L61 + ldr r3, .L58 ldrh r0, [r3, #6] clz r0, r0 lsrs r0, r0, #5 bx lr -.L62: +.L59: .align 2 -.L61: - .word .LANCHOR38 +.L58: + .word .LANCHOR37 .size FtlFreeSysBlkQueueEmpty, .-FtlFreeSysBlkQueueEmpty .section .text.FtlFreeSysBlkQueueFull,"ax",%progbits .align 1 @@ -714,16 +688,16 @@ FtlFreeSysBlkQueueFull: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L64 + ldr r3, .L61 ldrh r0, [r3, #6] sub r3, r0, #1024 rsbs r0, r3, #0 adcs r0, r0, r3 bx lr -.L65: +.L62: .align 2 -.L64: - .word .LANCHOR38 +.L61: + .word .LANCHOR37 .size FtlFreeSysBlkQueueFull, .-FtlFreeSysBlkQueueFull .section .text.FtlFreeSysBLkSort,"ax",%progbits .align 1 @@ -736,28 +710,28 @@ FtlFreeSysBlkQueueFull: FtlFreeSysBLkSort: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L75 + ldr r3, .L72 push {r4, r5, r6, lr} ldrh r2, [r3, #6] - cbz r2, .L66 - ldr r2, .L75+4 + cbz r2, .L63 + ldr r2, .L72+4 movs r6, #0 ldrh r1, [r3, #2] mov r5, r6 ldrh r4, [r2, #28] ldrh r2, [r3, #4] and r4, r4, #31 -.L68: +.L65: uxth r0, r6 adds r6, r6, #1 cmp r4, r0 - bgt .L69 - cbz r5, .L66 + bgt .L66 + cbz r5, .L63 strh r1, [r3, #2] @ movhi strh r2, [r3, #4] @ movhi -.L66: +.L63: pop {r4, r5, r6, pc} -.L69: +.L66: adds r0, r1, #4 adds r1, r1, #1 ldrh r5, [r3, r0, lsl #1] @@ -767,12 +741,12 @@ FtlFreeSysBLkSort: movs r5, #1 add r2, r2, r5 ubfx r2, r2, #0, #10 - b .L68 -.L76: + b .L65 +.L73: .align 2 -.L75: +.L72: + .word .LANCHOR37 .word .LANCHOR38 - .word .LANCHOR39 .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort .section .text.IsInFreeQueue,"ax",%progbits .align 1 @@ -785,35 +759,35 @@ FtlFreeSysBLkSort: IsInFreeQueue: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L83 + ldr r3, .L80 push {r4, r5, lr} ldrh r4, [r3, #6] cmp r4, #1024 - beq .L81 + beq .L78 ldrh r5, [r3, #2] movs r1, #0 -.L79: +.L76: cmp r1, r4 - bcc .L80 -.L81: + bcc .L77 +.L78: movs r0, #0 pop {r4, r5, pc} -.L80: +.L77: adds r2, r1, r5 ubfx r2, r2, #0, #10 adds r2, r2, #4 ldrh r2, [r3, r2, lsl #1] cmp r2, r0 - beq .L82 + beq .L79 adds r1, r1, #1 - b .L79 -.L82: + b .L76 +.L79: movs r0, #1 pop {r4, r5, pc} -.L84: +.L81: .align 2 -.L83: - .word .LANCHOR38 +.L80: + .word .LANCHOR37 .size IsInFreeQueue, .-IsInFreeQueue .section .text.insert_data_list,"ax",%progbits .align 1 @@ -826,12 +800,12 @@ IsInFreeQueue: insert_data_list: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L100 + ldr r3, .L97 push {r4, r5, r6, r7, r8, r10, fp, lr} ldrh r8, [r3] cmp r8, r0 - bls .L87 - ldr r3, .L100+4 + bls .L84 + ldr r3, .L97+4 movs r5, #6 muls r5, r0, r5 ldr r4, [r3] @@ -839,85 +813,85 @@ insert_data_list: adds r1, r4, r5 strh r3, [r1, #2] @ movhi strh r3, [r4, r5] @ movhi - ldr r3, .L100+8 + ldr r3, .L97+8 ldr ip, [r3] cmp ip, #0 - bne .L88 -.L99: + bne .L85 +.L96: str r1, [r3] -.L87: +.L84: movs r0, #0 pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L88: - ldr r3, .L100+12 +.L85: + ldr r3, .L97+12 ldrh r6, [r1, #4] ldr r10, [r3] ldrh r3, [r10, r0, lsl #1] - cbz r6, .L95 + cbz r6, .L92 muls r6, r3, r6 -.L89: +.L86: sub r2, ip, r4 movs r7, #0 asrs r3, r2, #1 - ldr r2, .L100+16 + ldr r2, .L97+16 muls r2, r3, r2 mov r3, ip uxth r2, r2 -.L93: +.L90: adds r7, r7, #1 uxth r7, r7 cmp r8, r7 - bcc .L87 + bcc .L84 cmp r2, r0 - beq .L87 + beq .L84 ldrh lr, [r3, #4] cmp lr, #0 - beq .L91 + beq .L88 ldrh fp, [r10, r2, lsl #1] mul lr, lr, fp cmp r6, lr - bls .L91 + bls .L88 ldrh lr, [r3] movw fp, #65535 cmp lr, fp - bne .L92 + bne .L89 strh r2, [r1, #2] @ movhi strh r0, [r3] @ movhi - ldr r3, .L100+20 - b .L99 -.L95: - mov r6, #-1 - b .L89 + ldr r3, .L97+20 + b .L96 .L92: + mov r6, #-1 + b .L86 +.L89: movs r3, #6 mov r2, lr mla r3, r3, lr, r4 - b .L93 -.L91: + b .L90 +.L88: strh r2, [r4, r5] @ movhi cmp r3, ip ldrh r2, [r3, #2] strh r2, [r1, #2] @ movhi - bne .L94 + bne .L91 strh r0, [r3, #2] @ movhi - ldr r3, .L100+8 - b .L99 -.L94: + ldr r3, .L97+8 + b .L96 +.L91: ldrh r1, [r3, #2] movs r2, #6 muls r2, r1, r2 strh r0, [r4, r2] @ movhi strh r0, [r3, #2] @ movhi - b .L87 -.L101: + b .L84 +.L98: .align 2 -.L100: - .word .LANCHOR5 +.L97: + .word .LANCHOR4 + .word .LANCHOR39 .word .LANCHOR40 .word .LANCHOR41 - .word .LANCHOR42 .word -1431655765 - .word .LANCHOR43 + .word .LANCHOR42 .size insert_data_list, .-insert_data_list .section .text.INSERT_DATA_LIST,"ax",%progbits .align 1 @@ -932,28 +906,28 @@ INSERT_DATA_LIST: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, lr} bl insert_data_list - ldr r2, .L104 + ldr r2, .L101 ldrh r3, [r2] adds r3, r3, #1 uxth r3, r3 strh r3, [r2] @ movhi - ldr r2, .L104+4 + ldr r2, .L101+4 ldrh r2, [r2] cmp r2, r3 - bcs .L102 + bcs .L99 movs r2, #214 - ldr r1, .L104+8 - ldr r0, .L104+12 + ldr r1, .L101+8 + ldr r0, .L101+12 pop {r3, lr} b printf -.L102: +.L99: pop {r3, pc} -.L105: +.L102: .align 2 -.L104: +.L101: + .word .LANCHOR43 + .word .LANCHOR4 .word .LANCHOR44 - .word .LANCHOR5 - .word .LANCHOR45 .word .LC1 .size INSERT_DATA_LIST, .-INSERT_DATA_LIST .section .text.insert_free_list,"ax",%progbits @@ -970,48 +944,48 @@ insert_free_list: movw r1, #65535 push {r4, r5, r6, r7, r8, r10, fp, lr} cmp r0, r1 - beq .L107 - ldr r3, .L113 + beq .L104 + ldr r3, .L110 mov r10, #6 mul r7, r10, r0 ldr r4, [r3] - ldr r3, .L113+4 + ldr r3, .L110+4 adds r5, r4, r7 ldr r6, [r3] mov lr, r3 strh r1, [r5, #2] @ movhi strh r1, [r4, r7] @ movhi - cbnz r6, .L108 + cbnz r6, .L105 str r5, [r3] -.L107: +.L104: movs r0, #0 pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L108: - ldr r3, .L113+8 +.L105: + ldr r3, .L110+8 subs r2, r6, r4 mov fp, r1 ldr ip, [r3] asrs r3, r2, #1 - ldr r2, .L113+12 + ldr r2, .L110+12 ldrh r8, [ip, r0, lsl #1] muls r2, r3, r2 mov r3, r6 uxth r2, r2 -.L111: +.L108: ldrh r1, [ip, r2, lsl #1] cmp r1, r8 - bcs .L109 + bcs .L106 ldrh r1, [r3] cmp r1, fp - bne .L110 + bne .L107 strh r2, [r5, #2] @ movhi strh r0, [r3] @ movhi - b .L107 -.L110: + b .L104 +.L107: mla r3, r10, r1, r4 mov r2, r1 - b .L111 -.L109: + b .L108 +.L106: ldrh r1, [r3, #2] cmp r3, r6 strh r1, [r5, #2] @ movhi @@ -1026,13 +1000,13 @@ insert_free_list: itt ne strhne r0, [r4, r2] @ movhi strhne r0, [r3, #2] @ movhi - b .L107 -.L114: + b .L104 +.L111: .align 2 -.L113: - .word .LANCHOR40 +.L110: + .word .LANCHOR39 + .word .LANCHOR45 .word .LANCHOR46 - .word .LANCHOR47 .word -1431655765 .size insert_free_list, .-insert_free_list .section .text.INSERT_FREE_LIST,"ax",%progbits @@ -1048,28 +1022,28 @@ INSERT_FREE_LIST: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, lr} bl insert_free_list - ldr r2, .L117 + ldr r2, .L114 ldrh r3, [r2] adds r3, r3, #1 uxth r3, r3 strh r3, [r2] @ movhi - ldr r2, .L117+4 + ldr r2, .L114+4 ldrh r2, [r2] cmp r2, r3 - bcs .L115 + bcs .L112 movs r2, #207 - ldr r1, .L117+8 - ldr r0, .L117+12 + ldr r1, .L114+8 + ldr r0, .L114+12 pop {r3, lr} b printf -.L115: +.L112: pop {r3, pc} -.L118: +.L115: .align 2 -.L117: +.L114: + .word .LANCHOR47 + .word .LANCHOR4 .word .LANCHOR48 - .word .LANCHOR5 - .word .LANCHOR49 .word .LC1 .size INSERT_FREE_LIST, .-INSERT_FREE_LIST .section .text.List_remove_node,"ax",%progbits @@ -1085,7 +1059,7 @@ List_remove_node: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, r8, lr} movs r6, #6 - ldr r5, .L125 + ldr r5, .L122 muls r6, r1, r6 movw r3, #65535 mov r8, r0 @@ -1093,20 +1067,20 @@ List_remove_node: adds r4, r7, r6 ldrh r2, [r4, #2] cmp r2, r3 - bne .L120 + bne .L117 ldr r3, [r0] cmp r4, r3 - beq .L120 + beq .L117 mov r2, #372 - ldr r1, .L125+4 - ldr r0, .L125+8 + ldr r1, .L122+4 + ldr r0, .L122+8 bl printf -.L120: +.L117: ldr r3, [r8] movw r1, #65535 cmp r4, r3 ldrh r3, [r7, r6] - bne .L121 + bne .L118 cmp r3, r1 ittee ne ldrne r0, [r5] @@ -1117,24 +1091,24 @@ List_remove_node: mlane r3, r2, r3, r0 strne r3, [r8] strhne r1, [r3, #2] @ movhi -.L123: +.L120: movw r3, #65535 movs r0, #0 strh r3, [r7, r6] @ movhi strh r3, [r4, #2] @ movhi pop {r4, r5, r6, r7, r8, pc} -.L121: +.L118: cmp r3, r1 ldrh r1, [r4, #2] - bne .L124 + bne .L121 cmp r1, r3 - beq .L123 + beq .L120 movs r2, #6 ldr r0, [r5] muls r1, r2, r1 strh r3, [r0, r1] @ movhi - b .L123 -.L124: + b .L120 +.L121: ldr r0, [r5] movs r2, #6 mla r5, r2, r3, r0 @@ -1142,12 +1116,12 @@ List_remove_node: ldrh r1, [r4, #2] muls r2, r1, r2 strh r3, [r0, r2] @ movhi - b .L123 -.L126: + b .L120 +.L123: .align 2 -.L125: - .word .LANCHOR40 - .word .LANCHOR50 +.L122: + .word .LANCHOR39 + .word .LANCHOR49 .word .LC1 .size List_remove_node, .-List_remove_node .section .text.List_pop_index_node,"ax",%progbits @@ -1163,15 +1137,15 @@ List_pop_index_node: @ frame_needed = 0, uses_anonymous_args = 0 ldr r3, [r0] push {r4, r5, r6, lr} - cbz r3, .L133 - ldr r2, .L134 + cbz r3, .L130 + ldr r2, .L131 movw r5, #65535 movs r6, #6 ldr r2, [r2] +.L126: + cbnz r1, .L127 .L129: - cbnz r1, .L130 -.L132: - ldr r4, .L134+4 + ldr r4, .L131+4 subs r3, r3, r2 asrs r3, r3, #1 muls r4, r3, r4 @@ -1179,21 +1153,21 @@ List_pop_index_node: bl List_remove_node uxth r0, r4 pop {r4, r5, r6, pc} -.L130: +.L127: ldrh r4, [r3] cmp r4, r5 - beq .L132 + beq .L129 subs r1, r1, #1 mla r3, r6, r4, r2 uxth r1, r1 - b .L129 -.L133: + b .L126 +.L130: movw r0, #65535 pop {r4, r5, r6, pc} -.L135: +.L132: .align 2 -.L134: - .word .LANCHOR40 +.L131: + .word .LANCHOR39 .word -1431655765 .size List_pop_index_node, .-List_pop_index_node .section .text.List_pop_head_node,"ax",%progbits @@ -1222,39 +1196,39 @@ List_pop_head_node: List_get_gc_head_node: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L143 + ldr r3, .L140 push {r4, lr} ldr r3, [r3] - cbz r3, .L142 - ldr r2, .L143+4 + cbz r3, .L139 + ldr r2, .L140+4 movs r4, #6 ldr r1, [r2] movw r2, #65535 -.L139: - cbz r0, .L140 +.L136: + cbz r0, .L137 ldrh r3, [r3] cmp r3, r2 - bne .L141 -.L142: + bne .L138 +.L139: movw r0, #65535 pop {r4, pc} -.L141: +.L138: subs r0, r0, #1 mla r3, r4, r3, r1 uxth r0, r0 - b .L139 -.L140: - ldr r0, .L143+8 + b .L136 +.L137: + ldr r0, .L140+8 subs r3, r3, r1 asrs r3, r3, #1 muls r3, r0, r3 uxth r0, r3 pop {r4, pc} -.L144: +.L141: .align 2 -.L143: - .word .LANCHOR41 +.L140: .word .LANCHOR40 + .word .LANCHOR39 .word -1431655765 .size List_get_gc_head_node, .-List_get_gc_head_node .section .text.List_update_data_list,"ax",%progbits @@ -1268,61 +1242,61 @@ List_get_gc_head_node: List_update_data_list: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L156 + ldr r3, .L153 push {r4, r5, r6, r7, r8, r10, fp, lr} mov r4, r0 ldrh r3, [r3] cmp r3, r0 - beq .L147 - ldr r3, .L156+4 + beq .L144 + ldr r3, .L153+4 ldrh r3, [r3] cmp r3, r0 - beq .L147 - ldr r3, .L156+8 + beq .L144 + ldr r3, .L153+8 ldrh r3, [r3] cmp r3, r0 - beq .L147 - ldr r7, .L156+12 + beq .L144 + ldr r7, .L153+12 movs r6, #6 - ldr r3, .L156+16 + ldr r3, .L153+16 muls r6, r0, r6 ldr fp, [r7] ldr r3, [r3] add r10, fp, r6 cmp r10, r3 - beq .L147 - ldr r3, .L156+20 + beq .L144 + ldr r3, .L153+20 ldrh r5, [r10, #4] ldr r2, [r3] mov r8, r3 ldrh r2, [r2, r0, lsl #1] cmp r5, #0 - beq .L154 + beq .L151 muls r5, r2, r5 -.L149: +.L146: ldrh r3, [r10, #2] movw r2, #65535 cmp r3, r2 - bne .L150 + bne .L147 ldrh r2, [fp, r6] cmp r2, r3 - bne .L150 + bne .L147 movw r2, #463 - ldr r1, .L156+24 - ldr r0, .L156+28 + ldr r1, .L153+24 + ldr r0, .L153+28 bl printf -.L150: +.L147: ldrh r3, [r10, #2] movw r2, #65535 cmp r3, r2 - bne .L151 + bne .L148 ldrh r2, [fp, r6] cmp r2, r3 - beq .L147 -.L151: + beq .L144 +.L148: movs r2, #6 muls r2, r3, r2 - ldr r3, .L156+32 + ldr r3, .L153+32 asrs r1, r2, #1 muls r3, r1, r3 ldr r1, [r8] @@ -1330,49 +1304,49 @@ List_update_data_list: ldr r1, [r7] add r2, r2, r1 ldrh r3, [r2, #4] - cbz r3, .L155 + cbz r3, .L152 muls r3, r0, r3 -.L152: +.L149: cmp r5, r3 - bcs .L147 - ldr r5, .L156+36 + bcs .L144 + ldr r5, .L153+36 mov r1, r4 - ldr r0, .L156+16 + ldr r0, .L153+16 bl List_remove_node ldrh r3, [r5] - cbnz r3, .L153 + cbnz r3, .L150 mov r2, #474 - ldr r1, .L156+24 - ldr r0, .L156+28 + ldr r1, .L153+24 + ldr r0, .L153+28 bl printf -.L153: +.L150: ldrh r3, [r5] mov r0, r4 subs r3, r3, #1 strh r3, [r5] @ movhi bl INSERT_DATA_LIST -.L147: +.L144: movs r0, #0 pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L154: +.L151: mov r5, #-1 - b .L149 -.L155: + b .L146 +.L152: mov r3, #-1 - b .L152 -.L157: + b .L149 +.L154: .align 2 -.L156: +.L153: + .word .LANCHOR50 .word .LANCHOR51 .word .LANCHOR52 - .word .LANCHOR53 + .word .LANCHOR39 .word .LANCHOR40 .word .LANCHOR41 - .word .LANCHOR42 - .word .LANCHOR54 + .word .LANCHOR53 .word .LC1 .word -1431655765 - .word .LANCHOR44 + .word .LANCHOR43 .size List_update_data_list, .-List_update_data_list .section .text.select_l2p_ram_region,"ax",%progbits .align 1 @@ -1387,83 +1361,83 @@ select_l2p_ram_region: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, lr} movs r1, #0 - ldr r3, .L168 + ldr r3, .L165 movs r0, #12 movw r5, #65535 ldrh r2, [r3] - ldr r3, .L168+4 + ldr r3, .L165+4 ldr r3, [r3] -.L159: +.L156: uxth r4, r1 cmp r4, r2 - bcc .L161 + bcc .L158 mov r4, r2 movs r1, #0 mov r6, #-2147483648 movs r7, #12 +.L159: + uxth r5, r1 + cmp r5, r2 + bcc .L161 + cmp r4, r2 + bcc .L157 + ldr r1, .L165+8 + mov r4, r2 + mov r0, #-1 + ldrh r7, [r1] + movs r1, #0 .L162: uxth r5, r1 cmp r5, r2 bcc .L164 cmp r4, r2 - bcc .L160 - ldr r1, .L168+8 - mov r4, r2 - mov r0, #-1 - ldrh r7, [r1] - movs r1, #0 -.L165: - uxth r5, r1 - cmp r5, r2 - bcc .L167 - cmp r4, r2 - bcc .L160 + bcc .L157 movw r2, #789 - ldr r1, .L168+12 - ldr r0, .L168+16 + ldr r1, .L165+12 + ldr r0, .L165+16 bl printf - b .L160 -.L161: + b .L157 +.L158: adds r1, r1, #1 mla r6, r0, r1, r3 ldrh r6, [r6, #-12] cmp r6, r5 - bne .L159 -.L160: + bne .L156 +.L157: mov r0, r4 pop {r3, r4, r5, r6, r7, pc} -.L164: +.L161: mla r0, r7, r1, r3 ldr r0, [r0, #4] cmp r0, #0 - blt .L163 + blt .L160 cmp r6, r0 itt hi movhi r6, r0 movhi r4, r5 -.L163: +.L160: adds r1, r1, #1 - b .L162 -.L167: + b .L159 +.L164: ldr r6, [r3, #4] cmp r0, r6 - bls .L166 + bls .L163 ldrh ip, [r3] cmp ip, r7 itt ne movne r0, r6 movne r4, r5 -.L166: +.L163: adds r1, r1, #1 adds r3, r3, #12 - b .L165 -.L169: + b .L162 +.L166: .align 2 -.L168: - .word .LANCHOR33 +.L165: + .word .LANCHOR32 + .word .LANCHOR54 .word .LANCHOR55 .word .LANCHOR56 - .word .LANCHOR57 .word .LC1 .size select_l2p_ram_region, .-select_l2p_ram_region .section .text.FtlUpdateVaildLpn,"ax",%progbits @@ -1477,106 +1451,50 @@ select_l2p_ram_region: FtlUpdateVaildLpn: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r2, .L180 + ldr r2, .L177 push {r4, r5, r6, lr} mov r1, r2 ldrh r3, [r2] cmp r3, #4 - bhi .L171 - cbnz r0, .L171 + bhi .L168 + cbnz r0, .L168 adds r3, r3, #1 strh r3, [r2] @ movhi pop {r4, r5, r6, pc} -.L171: +.L168: movs r3, #0 - ldr r0, .L180+4 + ldr r0, .L177+4 strh r3, [r1] @ movhi movw r6, #65535 - ldr r1, .L180+8 + ldr r1, .L177+8 ldrh r4, [r0] mov r0, r3 - ldr r2, .L180+12 + ldr r2, .L177+12 ldr r1, [r1] str r3, [r2] add r4, r1, r4, lsl #1 -.L172: +.L169: cmp r1, r4 - bne .L174 - cbz r3, .L170 + bne .L171 + cbz r3, .L167 str r0, [r2] -.L170: +.L167: pop {r4, r5, r6, pc} -.L174: +.L171: ldrh r5, [r1], #2 cmp r5, r6 itt ne addne r0, r0, r5 movne r3, #1 - b .L172 -.L181: + b .L169 +.L178: .align 2 -.L180: +.L177: + .word .LANCHOR57 + .word .LANCHOR4 + .word .LANCHOR41 .word .LANCHOR58 - .word .LANCHOR5 - .word .LANCHOR42 - .word .LANCHOR59 .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn - .section .text.ftl_set_blk_mode,"ax",%progbits - .align 1 - .global ftl_set_blk_mode - .syntax unified - .thumb - .thumb_func - .fpu softvfp - .type ftl_set_blk_mode, %function -ftl_set_blk_mode: - @ args = 0, pretend = 0, frame = 0 - @ frame_needed = 0, uses_anonymous_args = 0 - @ link register save eliminated. - mov r3, r0 - cbz r1, .L183 - b ftl_set_blk_mode.part.6 -.L183: - ldr r2, .L184 - lsrs r0, r0, #5 - and r3, r3, #31 - ldr r1, [r2] - movs r2, #1 - lsl r3, r2, r3 - ldr r2, [r1, r0, lsl #2] - bic r2, r2, r3 - str r2, [r1, r0, lsl #2] - bx lr -.L185: - .align 2 -.L184: - .word .LANCHOR1 - .size ftl_set_blk_mode, .-ftl_set_blk_mode - .section .text.ftl_get_blk_mode,"ax",%progbits - .align 1 - .global ftl_get_blk_mode - .syntax unified - .thumb - .thumb_func - .fpu softvfp - .type ftl_get_blk_mode, %function -ftl_get_blk_mode: - @ args = 0, pretend = 0, frame = 0 - @ frame_needed = 0, uses_anonymous_args = 0 - @ link register save eliminated. - ldr r3, .L187 - lsrs r2, r0, #5 - and r0, r0, #31 - ldr r3, [r3] - ldr r3, [r3, r2, lsl #2] - lsr r0, r3, r0 - and r0, r0, #1 - bx lr -.L188: - .align 2 -.L187: - .word .LANCHOR1 - .size ftl_get_blk_mode, .-ftl_get_blk_mode .section .text.ftl_sb_update_avl_pages,"ax",%progbits .align 1 .global ftl_sb_update_avl_pages @@ -1592,14 +1510,14 @@ ftl_sb_update_avl_pages: push {r4, r5, r6, lr} strh r3, [r0, #4] @ movhi movw r6, #65535 - ldr r3, .L196 + ldr r3, .L186 ldrh r4, [r3] add r3, r0, r2, lsl #1 adds r3, r3, #14 -.L190: +.L180: cmp r2, r4 - bcc .L192 - ldr r3, .L196+4 + bcc .L182 + ldr r3, .L186+4 add r5, r0, #16 movw r6, #65535 ldrh r3, [r3] @@ -1607,12 +1525,12 @@ ftl_sb_update_avl_pages: subs r1, r3, r1 movs r3, #0 uxth r1, r1 -.L193: +.L183: uxth r2, r3 cmp r4, r2 - bhi .L195 + bhi .L185 pop {r4, r5, r6, pc} -.L192: +.L182: ldrh r5, [r3, #2]! adds r2, r2, #1 uxth r2, r2 @@ -1621,8 +1539,8 @@ ftl_sb_update_avl_pages: ldrhne r5, [r0, #4] addne r5, r5, #1 strhne r5, [r0, #4] @ movhi - b .L190 -.L195: + b .L180 +.L185: ldrh r2, [r5], #2 adds r3, r3, #1 cmp r2, r6 @@ -1630,12 +1548,12 @@ ftl_sb_update_avl_pages: ldrhne r2, [r0, #4] addne r2, r2, r1 strhne r2, [r0, #4] @ movhi - b .L193 -.L197: + b .L183 +.L187: .align 2 -.L196: - .word .LANCHOR3 - .word .LANCHOR19 +.L186: + .word .LANCHOR2 + .word .LANCHOR18 .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages .section .text.FtlSlcSuperblockCheck,"ax",%progbits .align 1 @@ -1650,24 +1568,24 @@ FtlSlcSuperblockCheck: @ frame_needed = 0, uses_anonymous_args = 0 ldrh r3, [r0, #4] push {r4, r5, lr} - cbz r3, .L198 + cbz r3, .L188 ldrh r2, [r0] movw r3, #65535 cmp r2, r3 - beq .L198 + beq .L188 ldrb r2, [r0, #6] @ zero_extendqisi2 movs r5, #0 adds r2, r2, #8 ldrh r1, [r0, r2, lsl #1] - ldr r2, .L204 + ldr r2, .L194 ldrh r4, [r2] mov r2, r3 -.L201: +.L191: cmp r1, r2 - beq .L203 -.L198: + beq .L193 +.L188: pop {r4, r5, pc} -.L203: +.L193: ldrb r3, [r0, #6] @ zero_extendqisi2 adds r3, r3, #1 uxtb r3, r3 @@ -1681,11 +1599,11 @@ FtlSlcSuperblockCheck: ldrb r3, [r0, #6] @ zero_extendqisi2 adds r3, r3, #8 ldrh r1, [r0, r3, lsl #1] - b .L201 -.L205: + b .L191 +.L195: .align 2 -.L204: - .word .LANCHOR3 +.L194: + .word .LANCHOR2 .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck .section .text.make_superblock,"ax",%progbits .align 1 @@ -1698,32 +1616,32 @@ FtlSlcSuperblockCheck: make_superblock: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L212 + ldr r3, .L202 ldrh r2, [r0] push {r4, r5, r6, r7, r8, r10, fp, lr} mov r4, r0 ldrh r3, [r3] cmp r2, r3 - bcc .L207 - movw r2, #2148 - ldr r1, .L212+4 - ldr r0, .L212+8 + bcc .L197 + movw r2, #2150 + ldr r1, .L202+4 + ldr r0, .L202+8 bl printf -.L207: - ldr r3, .L212+12 +.L197: + ldr r3, .L202+12 add r6, r4, #16 - ldr r10, .L212+24 + ldr r10, .L202+24 movw r7, #65535 movs r5, #0 ldrh r8, [r3] strh r5, [r4, #4] @ movhi strb r5, [r4, #7] -.L208: +.L198: uxth r3, r5 ldrh r1, [r4] cmp r8, r3 - bhi .L210 - ldr r2, .L212+16 + bhi .L200 + ldr r2, .L202+16 movs r0, #0 ldrb r3, [r4, #7] @ zero_extendqisi2 ldrh r2, [r2] @@ -1731,7 +1649,7 @@ make_superblock: strh r3, [r4, #4] @ movhi movs r3, #0 strb r3, [r4, #9] - ldr r3, .L212+20 + ldr r3, .L202+20 ldr r3, [r3] ldrh r2, [r3, r1, lsl #1] movw r3, #10000 @@ -1740,31 +1658,31 @@ make_superblock: movhi r3, #1 strbhi r3, [r4, #9] pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L210: +.L200: ldrb r0, [r10, r5] @ zero_extendqisi2 bl V2P_block strh r7, [r6] @ movhi mov fp, r0 bl FtlBbmIsBadBlock - cbnz r0, .L209 + cbnz r0, .L199 strh fp, [r6] @ movhi ldrb r3, [r4, #7] @ zero_extendqisi2 adds r3, r3, #1 strb r3, [r4, #7] -.L209: +.L199: adds r5, r5, #1 adds r6, r6, #2 - b .L208 -.L213: + b .L198 +.L203: .align 2 -.L212: - .word .LANCHOR5 - .word .LANCHOR60 +.L202: + .word .LANCHOR4 + .word .LANCHOR59 .word .LC1 - .word .LANCHOR3 - .word .LANCHOR19 - .word .LANCHOR47 - .word .LANCHOR13 + .word .LANCHOR2 + .word .LANCHOR18 + .word .LANCHOR46 + .word .LANCHOR12 .size make_superblock, .-make_superblock .section .text.update_multiplier_value,"ax",%progbits .align 1 @@ -1779,50 +1697,50 @@ update_multiplier_value: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, r8, r10, lr} movs r5, #0 - ldr r3, .L220 + ldr r3, .L210 mov r6, r0 mov r4, r5 - ldr r10, .L220+12 + ldr r10, .L210+12 ldrh r7, [r3] - ldr r3, .L220+4 + ldr r3, .L210+4 ldrh r8, [r3] -.L215: +.L205: uxth r3, r5 cmp r7, r3 - bhi .L217 - cbz r4, .L219 + bhi .L207 + cbz r4, .L209 mov r1, r4 mov r0, #32768 bl __aeabi_idiv -.L218: - ldr r3, .L220+8 +.L208: + ldr r3, .L210+8 movs r2, #6 ldr r3, [r3] mla r6, r2, r6, r3 strh r0, [r6, #4] @ movhi movs r0, #0 pop {r3, r4, r5, r6, r7, r8, r10, pc} -.L217: +.L207: mov r1, r6 ldrb r0, [r10, r5] @ zero_extendqisi2 bl V2P_block bl FtlBbmIsBadBlock - cbnz r0, .L216 + cbnz r0, .L206 add r4, r4, r8 uxth r4, r4 -.L216: +.L206: adds r5, r5, #1 - b .L215 -.L219: + b .L205 +.L209: mov r0, r4 - b .L218 -.L221: + b .L208 +.L211: .align 2 -.L220: - .word .LANCHOR3 - .word .LANCHOR19 - .word .LANCHOR40 - .word .LANCHOR13 +.L210: + .word .LANCHOR2 + .word .LANCHOR18 + .word .LANCHOR39 + .word .LANCHOR12 .size update_multiplier_value, .-update_multiplier_value .section .text.GetFreeBlockMinEraseCount,"ax",%progbits .align 1 @@ -1836,28 +1754,28 @@ GetFreeBlockMinEraseCount: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L225 + ldr r3, .L215 ldr r0, [r3] - cbz r0, .L223 - ldr r3, .L225+4 + cbz r0, .L213 + ldr r3, .L215+4 ldr r3, [r3] subs r0, r0, r3 - ldr r3, .L225+8 + ldr r3, .L215+8 asrs r0, r0, #1 muls r0, r3, r0 - ldr r3, .L225+12 + ldr r3, .L215+12 ldr r3, [r3] uxth r0, r0 ldrh r0, [r3, r0, lsl #1] -.L223: +.L213: bx lr -.L226: +.L216: .align 2 -.L225: - .word .LANCHOR46 - .word .LANCHOR40 +.L215: + .word .LANCHOR45 + .word .LANCHOR39 .word -1431655765 - .word .LANCHOR47 + .word .LANCHOR46 .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount .section .text.GetFreeBlockMaxEraseCount,"ax",%progbits .align 1 @@ -1870,11 +1788,11 @@ GetFreeBlockMinEraseCount: GetFreeBlockMaxEraseCount: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L235 + ldr r3, .L225 push {r4, r5, r6, lr} ldr r3, [r3] - cbz r3, .L233 - ldr r2, .L235+4 + cbz r3, .L223 + ldr r2, .L225+4 movs r5, #6 movw r6, #65535 ldrh r2, [r2] @@ -1883,42 +1801,42 @@ GetFreeBlockMaxEraseCount: cmp r0, r2 it gt uxthgt r0, r2 - ldr r2, .L235+8 + ldr r2, .L225+8 ldr r1, [r2] - ldr r2, .L235+12 + ldr r2, .L225+12 subs r3, r3, r1 asrs r3, r3, #1 muls r3, r2, r3 movs r2, #0 uxth r3, r3 -.L230: +.L220: uxth r4, r2 cmp r0, r4 - bls .L232 + bls .L222 mul r4, r5, r3 adds r2, r2, #1 ldrh r4, [r1, r4] cmp r4, r6 - bne .L234 -.L232: - ldr r2, .L235+16 + bne .L224 +.L222: + ldr r2, .L225+16 ldr r2, [r2] ldrh r0, [r2, r3, lsl #1] pop {r4, r5, r6, pc} -.L234: +.L224: mov r3, r4 - b .L230 -.L233: + b .L220 +.L223: mov r0, r3 pop {r4, r5, r6, pc} -.L236: +.L226: .align 2 -.L235: - .word .LANCHOR46 - .word .LANCHOR48 - .word .LANCHOR40 - .word -1431655765 +.L225: + .word .LANCHOR45 .word .LANCHOR47 + .word .LANCHOR39 + .word -1431655765 + .word .LANCHOR46 .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount .section .text.free_data_superblock,"ax",%progbits .align 1 @@ -1934,19 +1852,19 @@ free_data_superblock: movw r2, #65535 push {r3, lr} cmp r0, r2 - beq .L238 - ldr r2, .L239 + beq .L228 + ldr r2, .L229 movs r1, #0 ldr r2, [r2] strh r1, [r2, r0, lsl #1] @ movhi bl INSERT_FREE_LIST -.L238: +.L228: movs r0, #0 pop {r3, pc} -.L240: +.L230: .align 2 -.L239: - .word .LANCHOR42 +.L229: + .word .LANCHOR41 .size free_data_superblock, .-free_data_superblock .section .text.get_new_active_ppa,"ax",%progbits .align 1 @@ -1964,45 +1882,45 @@ get_new_active_ppa: movw r3, #65535 mov r4, r0 cmp r2, r3 - bne .L242 - movw r2, #2781 - ldr r1, .L256 - ldr r0, .L256+4 + bne .L232 + movw r2, #2785 + ldr r1, .L246 + ldr r0, .L246+4 bl printf -.L242: - ldr r6, .L256+8 +.L232: + ldr r6, .L246+8 ldrh r2, [r4, #2] ldrh r3, [r6] cmp r2, r3 - bne .L243 - movw r2, #2782 - ldr r1, .L256 - ldr r0, .L256+4 + bne .L233 + movw r2, #2786 + ldr r1, .L246 + ldr r0, .L246+4 bl printf -.L243: +.L233: ldrh r3, [r4, #4] - cbnz r3, .L244 - movw r2, #2783 - ldr r1, .L256 - ldr r0, .L256+4 + cbnz r3, .L234 + movw r2, #2787 + ldr r1, .L246 + ldr r0, .L246+4 bl printf -.L244: +.L234: ldrb r2, [r4, #6] @ zero_extendqisi2 movs r3, #0 strb r3, [r4, #10] movw r5, #65535 adds r2, r2, #8 ldrh r0, [r4, r2, lsl #1] - ldr r2, .L256+12 + ldr r2, .L246+12 ldrh r1, [r2] mov r2, r3 -.L245: +.L235: cmp r0, r5 - beq .L247 + beq .L237 ldrh r5, [r4, #2] ldrh r6, [r6] cmp r5, r6 - bcs .L251 + bcs .L241 ldrh r2, [r4, #4] orr r5, r5, r0, lsl #10 ldrb r3, [r4, #6] @ zero_extendqisi2 @@ -2010,7 +1928,7 @@ get_new_active_ppa: subs r2, r2, #1 uxth r2, r2 strh r2, [r4, #4] @ movhi -.L250: +.L240: adds r3, r3, #1 uxtb r3, r3 cmp r1, r3 @@ -2022,20 +1940,20 @@ get_new_active_ppa: add r7, r3, #8 ldrh r7, [r4, r7, lsl #1] cmp r7, r0 - beq .L250 + beq .L240 strb r3, [r4, #6] ldrh r3, [r4, #2] cmp r3, r6 - bne .L241 - cbz r2, .L241 - movw r2, #2806 - ldr r1, .L256 - ldr r0, .L256+4 + bne .L231 + cbz r2, .L231 + movw r2, #2810 + ldr r1, .L246 + ldr r0, .L246+4 bl printf -.L241: +.L231: mov r0, r5 pop {r3, r4, r5, r6, r7, pc} -.L247: +.L237: ldrb r3, [r4, #6] @ zero_extendqisi2 adds r3, r3, #1 uxtb r3, r3 @@ -2049,17 +1967,17 @@ get_new_active_ppa: ldrb r3, [r4, #6] @ zero_extendqisi2 adds r3, r3, #8 ldrh r0, [r4, r3, lsl #1] - b .L245 -.L251: + b .L235 +.L241: movw r5, #65535 - b .L241 -.L257: + b .L231 +.L247: .align 2 -.L256: - .word .LANCHOR61 +.L246: + .word .LANCHOR60 .word .LC1 - .word .LANCHOR19 - .word .LANCHOR3 + .word .LANCHOR18 + .word .LANCHOR2 .size get_new_active_ppa, .-get_new_active_ppa .section .text.FtlGcBufInit,"ax",%progbits .align 1 @@ -2074,54 +1992,54 @@ FtlGcBufInit: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} movs r3, #0 - ldr r1, .L263 + ldr r1, .L253 mov fp, #1 - ldr r2, .L263+4 + ldr r2, .L253+4 ldr r5, [r1] - ldr r1, .L263+8 + ldr r1, .L253+8 str r3, [r2] - ldr r2, .L263+12 + ldr r2, .L253+12 mov r0, r5 ldr r1, [r1] ldrh r2, [r2] str r1, [sp, #4] - ldr r1, .L263+16 + ldr r1, .L253+16 ldrh r1, [r1] str r1, [sp] - ldr r1, .L263+20 + ldr r1, .L253+20 ldr r10, [r1] - ldr r1, .L263+24 + ldr r1, .L253+24 ldrh r7, [r1] - ldr r1, .L263+28 + ldr r1, .L253+28 ldr r4, [r1] movs r1, #12 mla r1, r2, r1, r1 adds r4, r4, #8 add r8, r5, r1 mov r1, r3 -.L259: +.L249: adds r0, r0, #12 ldr r6, [sp] cmp r0, r8 add ip, r3, r7 add r4, r4, #20 add lr, r1, r6 - bne .L260 - ldr r3, .L263+32 + bne .L250 + ldr r3, .L253+32 mov lr, #12 mov r8, #0 ldr r0, [r3] - ldr r3, .L263+8 + ldr r3, .L253+8 ldr r4, [r3] - ldr r3, .L263+20 + ldr r3, .L253+20 ldr ip, [r3] -.L261: +.L251: cmp r2, r0 - bcc .L262 + bcc .L252 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L260: +.L250: bic r1, r1, #3 bic r3, r3, #3 mov r6, r1 @@ -2135,8 +2053,8 @@ FtlGcBufInit: str r3, [r4, #-16] mov r3, ip str r6, [r4, #-20] - b .L259 -.L262: + b .L249 +.L252: ldr r3, [sp] mul r10, lr, r2 muls r3, r2, r3 @@ -2151,19 +2069,19 @@ FtlGcBufInit: bic r3, r3, #3 add r3, r3, ip str r3, [r1, #4] - b .L261 -.L264: + b .L251 +.L254: .align 2 -.L263: - .word .LANCHOR63 +.L253: .word .LANCHOR62 + .word .LANCHOR61 + .word .LANCHOR63 + .word .LANCHOR2 + .word .LANCHOR22 .word .LANCHOR64 - .word .LANCHOR3 .word .LANCHOR23 .word .LANCHOR65 - .word .LANCHOR24 .word .LANCHOR66 - .word .LANCHOR67 .size FtlGcBufInit, .-FtlGcBufInit .section .text.FtlGcBufFree,"ax",%progbits .align 1 @@ -2176,43 +2094,43 @@ FtlGcBufInit: FtlGcBufFree: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L272 + ldr r3, .L262 mov ip, #12 push {r4, r5, r6, r7, r8, r10, fp, lr} movs r4, #0 mov fp, #20 mov lr, r4 ldr r7, [r3] - ldr r3, .L272+4 + ldr r3, .L262+4 ldr r5, [r3] -.L266: +.L256: uxth r3, r4 cmp r1, r3 - bls .L265 + bls .L255 mla r8, fp, r3, r0 movs r2, #0 -.L267: +.L257: uxth r3, r2 cmp r7, r3 - bls .L268 + bls .L258 mul r3, ip, r3 ldr r6, [r8, #8] adds r2, r2, #1 add r10, r5, r3 ldr r3, [r5, r3] cmp r3, r6 - bne .L267 + bne .L257 str lr, [r10, #8] -.L268: +.L258: adds r4, r4, #1 - b .L266 -.L265: + b .L256 +.L255: pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L273: +.L263: .align 2 -.L272: - .word .LANCHOR67 - .word .LANCHOR63 +.L262: + .word .LANCHOR66 + .word .LANCHOR62 .size FtlGcBufFree, .-FtlGcBufFree .section .text.FtlGcBufAlloc,"ax",%progbits .align 1 @@ -2225,45 +2143,45 @@ FtlGcBufFree: FtlGcBufAlloc: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L281 + ldr r3, .L271 movs r2, #0 push {r4, r5, r6, r7, r8, r10, lr} mov ip, #12 movs r7, #1 mov lr, #20 ldr r4, [r3] - ldr r3, .L281+4 + ldr r3, .L271+4 ldr r5, [r3] -.L275: +.L265: uxth r8, r2 cmp r1, r8 - bhi .L279 + bhi .L269 pop {r4, r5, r6, r7, r8, r10, pc} -.L279: +.L269: mov r10, #0 -.L276: +.L266: uxth r3, r10 cmp r4, r3 - bls .L277 + bls .L267 mla r3, ip, r3, r5 add r10, r10, #1 ldr r6, [r3, #8] cmp r6, #0 - bne .L276 + bne .L266 mla r8, lr, r8, r0 str r7, [r3, #8] ldr r6, [r3] ldr r3, [r3, #4] str r6, [r8, #8] str r3, [r8, #12] -.L277: +.L267: adds r2, r2, #1 - b .L275 -.L282: + b .L265 +.L272: .align 2 -.L281: - .word .LANCHOR67 - .word .LANCHOR63 +.L271: + .word .LANCHOR66 + .word .LANCHOR62 .size FtlGcBufAlloc, .-FtlGcBufAlloc .section .text.IsBlkInGcList,"ax",%progbits .align 1 @@ -2277,27 +2195,27 @@ IsBlkInGcList: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r3, .L288 - ldr r2, .L288+4 + ldr r3, .L278 + ldr r2, .L278+4 ldr r3, [r3] ldrh r2, [r2] add r2, r3, r2, lsl #1 -.L284: +.L274: cmp r3, r2 - bne .L286 + bne .L276 movs r0, #0 bx lr -.L286: +.L276: ldrh r1, [r3], #2 cmp r1, r0 - bne .L284 + bne .L274 movs r0, #1 bx lr -.L289: +.L279: .align 2 -.L288: +.L278: + .word .LANCHOR67 .word .LANCHOR68 - .word .LANCHOR69 .size IsBlkInGcList, .-IsBlkInGcList .section .text.FtlGcUpdatePage,"ax",%progbits .align 1 @@ -2312,35 +2230,35 @@ FtlGcUpdatePage: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, lr} mov r5, r0 - ldr r4, .L294 + ldr r4, .L284 ubfx r0, r0, #10, #16 mov r6, r1 mov r7, r2 bl P2V_block_in_plane - ldr r3, .L294+4 + ldr r3, .L284+4 ldrh r1, [r4] ldr r2, [r3] movs r3, #0 -.L291: +.L281: uxth ip, r3 cmp ip, r1 - bcc .L293 - bne .L292 + bcc .L283 + bne .L282 strh r0, [r2, ip, lsl #1] @ movhi ldrh r3, [r4] adds r3, r3, #1 strh r3, [r4] @ movhi - b .L292 -.L293: + b .L282 +.L283: adds r3, r3, #1 add ip, r2, r3, lsl #1 ldrh ip, [ip, #-2] cmp ip, r0 - bne .L291 -.L292: - ldr r2, .L294+8 + bne .L281 +.L282: + ldr r2, .L284+8 movs r0, #12 - ldr r1, .L294+12 + ldr r1, .L284+12 ldrh r3, [r2] ldr r1, [r1] muls r0, r3, r0 @@ -2351,13 +2269,13 @@ FtlGcUpdatePage: str r5, [r1, r0] strh r3, [r2] @ movhi pop {r3, r4, r5, r6, r7, pc} -.L295: +.L285: .align 2 -.L294: - .word .LANCHOR69 +.L284: .word .LANCHOR68 + .word .LANCHOR67 + .word .LANCHOR69 .word .LANCHOR70 - .word .LANCHOR71 .size FtlGcUpdatePage, .-FtlGcUpdatePage .section .text.FtlGcRefreshBlock,"ax",%progbits .align 1 @@ -2371,31 +2289,31 @@ FtlGcRefreshBlock: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, lr} - ldr r4, .L299 + ldr r4, .L289 ldrh r5, [r4] cmp r5, r0 - beq .L297 - ldr r3, .L299+4 + beq .L287 + ldr r3, .L289+4 ldrh r1, [r3] cmp r0, r1 - beq .L297 + beq .L287 movw r2, #65535 cmp r5, r2 - bne .L298 + bne .L288 strh r0, [r4] @ movhi -.L297: +.L287: movs r0, #0 pop {r4, r5, pc} -.L298: +.L288: cmp r1, r2 it eq strheq r0, [r3] @ movhi - b .L297 -.L300: + b .L287 +.L290: .align 2 -.L299: +.L289: + .word .LANCHOR71 .word .LANCHOR72 - .word .LANCHOR73 .size FtlGcRefreshBlock, .-FtlGcRefreshBlock .section .text.FtlGcMarkBadPhyBlk,"ax",%progbits .align 1 @@ -2412,35 +2330,35 @@ FtlGcMarkBadPhyBlk: mov r4, r0 bl P2V_block_in_plane bl FtlGcRefreshBlock - ldr r2, .L305 + ldr r2, .L295 movs r1, #0 - ldr r5, .L305+4 + ldr r5, .L295+4 ldrh r3, [r2] -.L302: +.L292: uxth r0, r1 cmp r3, r0 - bhi .L304 + bhi .L294 cmp r3, #15 itttt ls addls r1, r3, #1 strhls r1, [r2] @ movhi - ldrls r2, .L305+4 + ldrls r2, .L295+4 strhls r4, [r2, r3, lsl #1] @ movhi - b .L303 -.L304: + b .L293 +.L294: adds r1, r1, #1 add r0, r5, r1, lsl #1 ldrh r0, [r0, #-2] cmp r0, r4 - bne .L302 -.L303: + bne .L292 +.L293: movs r0, #0 pop {r3, r4, r5, pc} -.L306: +.L296: .align 2 -.L305: +.L295: + .word .LANCHOR73 .word .LANCHOR74 - .word .LANCHOR75 .size FtlGcMarkBadPhyBlk, .-FtlGcMarkBadPhyBlk .section .text.FtlGcReFreshBadBlk,"ax",%progbits .align 1 @@ -2453,22 +2371,22 @@ FtlGcMarkBadPhyBlk: FtlGcReFreshBadBlk: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L313 + ldr r3, .L303 push {r4, lr} ldrh r3, [r3] - cbz r3, .L308 - ldr r2, .L313+4 + cbz r3, .L298 + ldr r2, .L303+4 ldrh r1, [r2] movw r2, #65535 cmp r1, r2 - bne .L308 - ldr r4, .L313+8 + bne .L298 + ldr r4, .L303+8 ldrh r2, [r4] cmp r2, r3 itt cs movcs r3, #0 strhcs r3, [r4] @ movhi - ldr r3, .L313+12 + ldr r3, .L303+12 ldrh r2, [r4] ldrh r0, [r3, r2, lsl #1] bl P2V_block_in_plane @@ -2476,16 +2394,16 @@ FtlGcReFreshBadBlk: ldrh r3, [r4] adds r3, r3, #1 strh r3, [r4] @ movhi -.L308: +.L298: movs r0, #0 pop {r4, pc} -.L314: +.L304: .align 2 -.L313: - .word .LANCHOR74 - .word .LANCHOR72 - .word .LANCHOR76 +.L303: + .word .LANCHOR73 + .word .LANCHOR71 .word .LANCHOR75 + .word .LANCHOR74 .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk .section .text.ftl_malloc,"ax",%progbits .align 1 @@ -2535,48 +2453,48 @@ rknand_print_hex: mov r10, r3 mov r5, r6 mov r4, r6 -.L318: +.L308: cmp r4, r10 - bcc .L324 - ldr r0, .L327 + bcc .L314 + ldr r0, .L317 pop {r4, r5, r6, r7, r8, r10, fp, lr} b printf -.L324: - cbnz r5, .L319 +.L314: + cbnz r5, .L309 mov r2, r6 mov r1, fp - ldr r0, .L327+4 + ldr r0, .L317+4 bl printf -.L319: +.L309: cmp r8, #4 - bne .L320 + bne .L310 ldr r1, [r7, r4, lsl #2] -.L326: - ldr r0, .L327+8 -.L325: +.L316: + ldr r0, .L317+8 +.L315: adds r5, r5, #1 bl printf cmp r5, #15 - bls .L323 + bls .L313 movs r5, #0 - ldr r0, .L327 + ldr r0, .L317 bl printf -.L323: +.L313: adds r4, r4, #1 add r6, r6, r8 - b .L318 -.L320: + b .L308 +.L310: cmp r8, #2 - bne .L322 + bne .L312 ldrh r1, [r7, r4, lsl #1] - b .L326 -.L322: + b .L316 +.L312: ldrb r1, [r7, r4] @ zero_extendqisi2 - ldr r0, .L327+12 - b .L325 -.L328: + ldr r0, .L317+12 + b .L315 +.L318: .align 2 -.L327: +.L317: .word .LC5 .word .LC2 .word .LC3 @@ -2595,41 +2513,41 @@ FlashEraseBlocks: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} mov r4, r0 - ldr r6, .L345 + ldr r6, .L335 add r8, r0, #4 movs r7, #0 - ldr fp, .L345+20 + ldr fp, .L335+20 ldrh r10, [r6, #12] str r2, [sp] lsl r3, r10, #3 str r3, [sp, #4] -.L330: +.L320: ldr r3, [sp] cmp r7, r3 - beq .L344 + beq .L334 add r2, sp, #8 add r1, sp, #12 ldr r0, [r8] bl l2p_addr_tran.isra.0 ldr r5, [sp, #8] - cbnz r5, .L331 + cbnz r5, .L321 ldr r2, [sp, #12] ldr r3, [sp, #4] cmp r3, r2 - bls .L331 - ldr r6, .L345+4 - ldr r7, .L345+8 -.L332: + bls .L321 + ldr r6, .L335+4 + ldr r7, .L335+8 +.L322: ldr r3, [sp] adds r4, r4, #20 cmp r5, r3 - bne .L333 -.L344: + bne .L323 +.L334: movs r0, #0 add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L333: +.L323: mov r3, #-1 ldr r2, [sp, #12] str r3, [r4, #-20] @@ -2640,50 +2558,50 @@ FlashEraseBlocks: movs r3, #16 movs r2, #4 ldr r1, [r4, #-12] - ldr r0, .L345+12 + ldr r0, .L335+12 bl rknand_print_hex movs r3, #4 ldr r1, [r4, #-8] mov r2, r3 - ldr r0, .L345+16 + ldr r0, .L335+16 bl rknand_print_hex - b .L332 -.L331: + b .L322 +.L321: ldr r2, [fp, #4] uxtb r0, r5 ldr r1, [sp, #12] blx r2 - cbnz r0, .L334 + cbnz r0, .L324 str r0, [r8, #-4] -.L335: +.L325: ldrh r2, [r6, #14] cmp r2, #4 - bne .L337 + bne .L327 ldr r1, [sp, #12] ldr r2, [fp, #4] ldrb r0, [sp, #8] @ zero_extendqisi2 add r1, r1, r10 blx r2 - cbz r0, .L337 + cbz r0, .L327 mov r2, #-1 str r2, [r8, #-4] -.L337: +.L327: adds r7, r7, #1 add r8, r8, #20 - b .L330 -.L334: + b .L320 +.L324: mov r2, #-1 str r2, [r8, #-4] - b .L335 -.L346: + b .L325 +.L336: .align 2 -.L345: +.L335: .word .LANCHOR0 - .word .LANCHOR77 + .word .LANCHOR76 .word .LC6 .word .LC7 .word .LC8 - .word .LANCHOR78 + .word .LANCHOR77 .size FlashEraseBlocks, .-FlashEraseBlocks .section .text.FtlFreeSysBlkQueueIn,"ax",%progbits .align 1 @@ -2702,14 +2620,14 @@ FtlFreeSysBlkQueueIn: push {r4, r5, r6, lr} mov r5, r0 cmp r3, r2 - bhi .L347 - ldr r4, .L356 + bhi .L337 + ldr r4, .L346 ldrh r3, [r4, #6] cmp r3, #1024 - beq .L347 - cbz r1, .L349 + beq .L337 + cbz r1, .L339 bl P2V_block_in_plane - ldr r3, .L356+4 + ldr r3, .L346+4 mov r6, r0 movs r2, #1 mov r1, r2 @@ -2717,16 +2635,16 @@ FtlFreeSysBlkQueueIn: lsls r3, r5, #10 str r3, [r0, #4] bl FlashEraseBlocks - ldr r3, .L356+8 + ldr r3, .L346+8 ldr r2, [r3] ldrh r3, [r2, r6, lsl #1] adds r3, r3, #1 strh r3, [r2, r6, lsl #1] @ movhi - ldr r2, .L356+12 + ldr r2, .L346+12 ldr r3, [r2] adds r3, r3, #1 str r3, [r2] -.L349: +.L339: ldrh r3, [r4, #6] adds r3, r3, #1 strh r3, [r4, #6] @ movhi @@ -2736,15 +2654,15 @@ FtlFreeSysBlkQueueIn: ubfx r3, r3, #0, #10 strh r5, [r4, r2, lsl #1] @ movhi strh r3, [r4, #4] @ movhi -.L347: +.L337: pop {r4, r5, r6, pc} -.L357: +.L347: .align 2 -.L356: - .word .LANCHOR38 +.L346: + .word .LANCHOR37 + .word .LANCHOR78 + .word .LANCHOR46 .word .LANCHOR79 - .word .LANCHOR47 - .word .LANCHOR80 .size FtlFreeSysBlkQueueIn, .-FtlFreeSysBlkQueueIn .section .text.FtlFreeSysBlkQueueOut,"ax",%progbits .align 1 @@ -2758,9 +2676,9 @@ FtlFreeSysBlkQueueOut: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} - ldr r4, .L363 + ldr r4, .L353 ldrh r2, [r4, #6] - cbz r2, .L362 + cbz r2, .L352 ldrh r3, [r4, #2] subs r2, r2, #1 strh r2, [r4, #6] @ movhi @@ -2771,39 +2689,39 @@ FtlFreeSysBlkQueueOut: ldrh r5, [r4, r1, lsl #1] strh r3, [r4, #2] @ movhi mov r1, r2 - ldr r3, .L363+4 + ldr r3, .L353+4 ldr r0, [r3] lsls r3, r5, #10 str r3, [r0, #4] bl FlashEraseBlocks - ldr r2, .L363+8 + ldr r2, .L353+8 ldr r3, [r2] adds r3, r3, #1 str r3, [r2] -.L359: +.L349: subs r3, r5, #1 movw r2, #65533 uxth r3, r3 cmp r3, r2 - bls .L360 + bls .L350 ldrh r2, [r4, #6] mov r1, r5 - ldr r0, .L363+12 + ldr r0, .L353+12 bl printf -.L361: - b .L361 -.L362: +.L351: + b .L351 +.L352: movw r5, #65535 - b .L359 -.L360: + b .L349 +.L350: mov r0, r5 pop {r3, r4, r5, pc} -.L364: +.L354: .align 2 -.L363: - .word .LANCHOR38 +.L353: + .word .LANCHOR37 + .word .LANCHOR78 .word .LANCHOR79 - .word .LANCHOR80 .word .LC9 .size FtlFreeSysBlkQueueOut, .-FtlFreeSysBlkQueueOut .section .text.ftl_map_blk_alloc_new_blk,"ax",%progbits @@ -2822,16 +2740,16 @@ ftl_map_blk_alloc_new_blk: push {r3, r4, r5, r6, r7, lr} mov r4, r0 movs r3, #0 -.L366: +.L356: uxth r5, r3 cmp r5, r1 - bcs .L369 + bcs .L359 mov r7, r2 adds r3, r3, #1 ldrh r6, [r7] adds r2, r2, #2 cmp r6, #0 - bne .L366 + bne .L356 bl FtlFreeSysBlkQueueOut subs r3, r0, #1 movw r2, #65533 @@ -2839,14 +2757,14 @@ ftl_map_blk_alloc_new_blk: mov r1, r0 strh r0, [r7] @ movhi cmp r3, r2 - bls .L367 - ldr r3, .L373 - ldr r0, .L373+4 + bls .L357 + ldr r3, .L363 + ldr r0, .L363+4 ldrh r2, [r3, #6] bl printf -.L368: - b .L368 -.L367: +.L358: + b .L358 +.L357: ldr r3, [r4, #28] strh r6, [r4, #2] @ movhi strh r5, [r4] @ movhi @@ -2855,23 +2773,23 @@ ftl_map_blk_alloc_new_blk: ldrh r3, [r4, #8] adds r3, r3, #1 strh r3, [r4, #8] @ movhi -.L369: +.L359: ldrh r3, [r4, #10] cmp r3, r5 - bhi .L371 + bhi .L361 movw r2, #578 - ldr r1, .L373+8 - ldr r0, .L373+12 + ldr r1, .L363+8 + ldr r0, .L363+12 bl printf -.L371: +.L361: movs r0, #0 pop {r3, r4, r5, r6, r7, pc} -.L374: +.L364: .align 2 -.L373: - .word .LANCHOR38 +.L363: + .word .LANCHOR37 .word .LC10 - .word .LANCHOR81 + .word .LANCHOR80 .word .LC1 .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk .section .text.ftl_memset,"ax",%progbits @@ -2899,102 +2817,102 @@ ftl_memset: FtlMemInit: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L381 + ldr r3, .L371 push {r4, r5, r6, r7, r8, r10, fp, lr} movs r4, #0 - ldr r2, .L381+4 + ldr r2, .L371+4 movs r6, #12 str r4, [r3] - ldr r3, .L381+8 - ldr r5, .L381+12 - ldr r10, .L381+292 + ldr r3, .L371+8 + ldr r5, .L371+12 + ldr r10, .L371+292 str r4, [r3] - ldr r3, .L381+16 + ldr r3, .L371+16 ldrh r0, [r5] - ldr r8, .L381+296 + ldr r8, .L371+296 str r4, [r3] - ldr r3, .L381+20 + ldr r3, .L371+20 lsls r0, r0, #1 - ldr fp, .L381+300 + ldr fp, .L371+300 str r4, [r3] - ldr r3, .L381+24 + ldr r3, .L371+24 str r4, [r3] - ldr r3, .L381+28 + ldr r3, .L371+28 str r4, [r3] - ldr r3, .L381+32 + ldr r3, .L371+32 str r4, [r3] - ldr r3, .L381+36 + ldr r3, .L371+36 str r4, [r3] - ldr r3, .L381+40 + ldr r3, .L371+40 str r4, [r3] - ldr r3, .L381+44 + ldr r3, .L371+44 str r4, [r3] - ldr r3, .L381+48 + ldr r3, .L371+48 str r4, [r3] - ldr r3, .L381+52 + ldr r3, .L371+52 str r4, [r3] - ldr r3, .L381+56 + ldr r3, .L371+56 str r4, [r3] - ldr r3, .L381+60 + ldr r3, .L371+60 str r4, [r3] - ldr r3, .L381+64 + ldr r3, .L371+64 str r4, [r3] movw r3, #65535 str r3, [r2] - ldr r2, .L381+68 + ldr r2, .L371+68 str r4, [r2] - ldr r2, .L381+72 + ldr r2, .L371+72 str r4, [r2] - ldr r2, .L381+76 + ldr r2, .L371+76 str r4, [r2] - ldr r2, .L381+80 + ldr r2, .L371+80 strh r3, [r2] @ movhi - ldr r2, .L381+84 + ldr r2, .L371+84 strh r3, [r2] @ movhi movs r2, #32 - ldr r3, .L381+88 + ldr r3, .L371+88 strh r2, [r3] @ movhi movs r2, #128 - ldr r3, .L381+92 + ldr r3, .L371+92 strh r2, [r3] @ movhi - ldr r3, .L381+96 + ldr r3, .L371+96 strh r4, [r3] @ movhi - ldr r3, .L381+100 + ldr r3, .L371+100 strh r4, [r3] @ movhi - ldr r3, .L381+104 + ldr r3, .L371+104 strh r4, [r3] @ movhi bl ftl_malloc - ldr r3, .L381+108 + ldr r3, .L371+108 str r0, [r3] ldrh r0, [r5] movs r5, #20 muls r0, r6, r0 bl ftl_malloc - ldr r3, .L381+112 + ldr r3, .L371+112 str r0, [r3] ldrh r3, [r10] muls r5, r3, r5 lsls r7, r5, #2 mov r0, r7 bl ftl_malloc - ldr r3, .L381+116 + ldr r3, .L371+116 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+120 + ldr r3, .L371+120 str r0, [r3] mov r0, r7 bl ftl_malloc - ldr r3, .L381+124 - ldr r7, .L381+128 + ldr r3, .L371+124 + ldr r7, .L371+128 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+132 + ldr r3, .L371+132 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+136 + ldr r3, .L371+136 ldrh r5, [r7] str r0, [r3] ldrh r3, [r10] @@ -3003,166 +2921,160 @@ FtlMemInit: adds r3, r3, #1 str r3, [r8] bl ftl_malloc - ldr r3, .L381+140 + ldr r3, .L371+140 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+144 + ldr r3, .L371+144 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+148 + ldr r3, .L371+148 str r0, [r3] ldr r0, [r8] muls r0, r5, r0 bl ftl_malloc - ldr r3, .L381+152 + ldr r3, .L371+152 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+156 + ldr r3, .L371+156 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+160 + ldr r3, .L371+160 str r0, [r3] ldr r0, [r8] muls r0, r6, r0 bl ftl_malloc - ldr r3, .L381+164 + ldr r3, .L371+164 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+168 + ldr r3, .L371+168 str r0, [r3] mov r0, r5 bl ftl_malloc - ldr r3, .L381+172 + ldr r3, .L371+172 str r0, [r3] - ldr r3, .L381+176 + ldr r3, .L371+176 ldrh r0, [r3] lsls r0, r0, #2 bl ftl_malloc - ldr r3, .L381+180 + ldr r3, .L371+180 ldrh r5, [r10] - ldr r10, .L381+304 + ldr r10, .L371+304 str r0, [r3] ldrh r3, [fp] muls r5, r3, r5 mov r0, r5 bl ftl_malloc - ldr r3, .L381+184 + ldr r3, .L371+184 str r0, [r3] lsls r0, r5, #2 - ldr r5, .L381+188 + ldr r5, .L371+188 bl ftl_malloc - ldr r3, .L381+192 + ldr r3, .L371+192 str r0, [r3] ldrh r3, [fp] ldr r0, [r8] - ldr r8, .L381+308 + ldr r8, .L371+308 muls r0, r3, r0 bl ftl_malloc - ldr r3, .L381+196 + ldr r3, .L371+196 str r0, [r3] ldrh r0, [r5] lsls r0, r0, #1 uxth r0, r0 strh r0, [r8] @ movhi bl ftl_malloc - ldr r3, .L381+200 + ldr r3, .L371+200 str r0, [r3] ldrh r3, [r8] - ldr r0, .L381+204 + ldr r0, .L371+204 addw r3, r3, #547 lsrs r3, r3, #9 and r0, r0, r3, lsl #9 strh r3, [r8] @ movhi bl ftl_malloc - ldr r3, .L381+208 + ldr r3, .L371+208 str r0, [r3] adds r0, r0, #32 - ldr r3, .L381+212 + ldr r3, .L371+212 str r0, [r3] ldrh r0, [r5] lsls r0, r0, #1 bl ftl_malloc - ldr r3, .L381+216 + ldr r3, .L371+216 str r0, [r3] ldr r3, [r10] lsl r8, r3, #1 mov r0, r8 bl ftl_malloc - ldr r3, .L381+220 + ldr r3, .L371+220 str r0, [r3] mov r0, r8 bl ftl_malloc - ldr r3, .L381+224 - ldr r8, .L381+312 - str r0, [r3] - ldrh r0, [r5] - lsrs r0, r0, #3 - adds r0, r0, #4 - bl ftl_malloc - ldr r3, .L381+228 + ldr r8, .L371+312 + ldr r3, .L371+224 str r0, [r3] ldrh r0, [r8] lsls r0, r0, #1 bl ftl_malloc - ldr r3, .L381+232 + ldr r3, .L371+228 str r0, [r3] ldrh r0, [r8] lsls r0, r0, #1 bl ftl_malloc - ldr r3, .L381+236 + ldr r3, .L371+232 str r0, [r3] ldrh r0, [r8] - ldr r8, .L381+316 + ldr r8, .L371+316 lsls r0, r0, #2 bl ftl_malloc - ldr r3, .L381+240 + ldr r3, .L371+236 str r0, [r3] ldrh r0, [r8] lsls r0, r0, #2 bl ftl_malloc ldrh r2, [r8] mov r1, r4 - ldr r3, .L381+244 - ldr r4, .L381+248 + ldr r3, .L371+240 + ldr r4, .L371+244 lsls r2, r2, #2 str r0, [r3] bl ftl_memset - ldr r3, .L381+252 + ldr r3, .L371+248 ldrh r0, [r3] lsls r0, r0, #2 bl ftl_malloc - ldr r3, .L381+256 + ldr r3, .L371+252 str r0, [r3] ldr r0, [r10] lsls r0, r0, #2 bl ftl_malloc - ldr r3, .L381+260 + ldr r3, .L371+256 str r0, [r3] ldrh r0, [r4] muls r0, r6, r0 - ldr r6, .L381+264 + ldr r6, .L371+260 bl ftl_malloc - ldr r3, .L381+268 + ldr r3, .L371+264 str r0, [r3] ldrh r3, [r4] ldrh r0, [r7] muls r0, r3, r0 bl ftl_malloc - ldr r3, .L381+272 + ldr r3, .L371+268 str r0, [r3] movs r0, #6 ldrh r3, [r5] - ldr r5, .L381+276 + ldr r5, .L371+272 muls r0, r3, r0 bl ftl_malloc - ldr r3, .L381+280 + ldr r3, .L371+276 str r0, [r3] - ldr r3, .L381+284 + ldr r3, .L371+280 ldrh r0, [r3] ldrh r3, [r6] adds r0, r0, #31 @@ -3173,20 +3085,32 @@ FtlMemInit: bl ftl_malloc ldrh r1, [r5] movs r2, #1 - ldr r3, .L381+288 + ldr r3, .L371+284 ldrh r6, [r6] lsls r1, r1, #2 mov r4, r3 str r0, [r4, #28]! mov r0, r1 - b .L382 -.L383: +.L367: + cmp r2, r6 + bcc .L368 + add r3, r3, r2, lsl #2 + ldr r2, .L371+288 + movs r1, #0 + adds r3, r3, #24 +.L369: + cmp r3, r2 + bne .L370 + movs r0, #0 + pop {r4, r5, r6, r7, r8, r10, fp, pc} +.L372: .align 2 -.L381: +.L371: + .word .LANCHOR81 + .word .LANCHOR95 .word .LANCHOR82 - .word .LANCHOR96 + .word .LANCHOR20 .word .LANCHOR83 - .word .LANCHOR21 .word .LANCHOR84 .word .LANCHOR85 .word .LANCHOR86 @@ -3194,102 +3118,84 @@ FtlMemInit: .word .LANCHOR88 .word .LANCHOR89 .word .LANCHOR90 + .word .LANCHOR79 .word .LANCHOR91 - .word .LANCHOR80 .word .LANCHOR92 .word .LANCHOR93 .word .LANCHOR94 - .word .LANCHOR95 + .word .LANCHOR96 .word .LANCHOR97 .word .LANCHOR98 - .word .LANCHOR99 + .word .LANCHOR71 .word .LANCHOR72 - .word .LANCHOR73 + .word .LANCHOR99 .word .LANCHOR100 .word .LANCHOR101 + .word .LANCHOR73 + .word .LANCHOR75 + .word .LANCHOR67 + .word .LANCHOR70 .word .LANCHOR102 - .word .LANCHOR74 - .word .LANCHOR76 - .word .LANCHOR68 - .word .LANCHOR71 .word .LANCHOR103 .word .LANCHOR104 + .word .LANCHOR22 + .word .LANCHOR78 + .word .LANCHOR65 .word .LANCHOR105 - .word .LANCHOR23 - .word .LANCHOR79 - .word .LANCHOR66 .word .LANCHOR106 .word .LANCHOR107 - .word .LANCHOR108 - .word .LANCHOR64 - .word .LANCHOR109 - .word .LANCHOR110 .word .LANCHOR63 + .word .LANCHOR108 + .word .LANCHOR109 + .word .LANCHOR62 + .word .LANCHOR110 .word .LANCHOR111 + .word .LANCHOR11 .word .LANCHOR112 - .word .LANCHOR12 .word .LANCHOR113 + .word .LANCHOR5 .word .LANCHOR114 - .word .LANCHOR6 - .word .LANCHOR115 - .word .LANCHOR65 - .word .LANCHOR117 + .word .LANCHOR64 + .word .LANCHOR116 .word 33553920 + .word .LANCHOR117 + .word .LANCHOR46 + .word .LANCHOR41 .word .LANCHOR118 - .word .LANCHOR47 - .word .LANCHOR42 .word .LANCHOR119 + .word .LANCHOR35 .word .LANCHOR120 - .word .LANCHOR1 - .word .LANCHOR36 .word .LANCHOR121 .word .LANCHOR122 - .word .LANCHOR123 - .word .LANCHOR33 .word .LANCHOR32 + .word .LANCHOR31 + .word .LANCHOR123 .word .LANCHOR124 + .word .LANCHOR9 + .word .LANCHOR54 .word .LANCHOR125 - .word .LANCHOR10 - .word .LANCHOR55 .word .LANCHOR126 - .word .LANCHOR127 - .word .LANCHOR40 - .word .LANCHOR17 - .word .LANCHOR37 - .word .LANCHOR3 - .word .LANCHOR67 - .word .LANCHOR24 - .word .LANCHOR30 - .word .LANCHOR116 + .word .LANCHOR39 + .word .LANCHOR16 + .word .LANCHOR36 + .word .LANCHOR36+56 + .word .LANCHOR2 + .word .LANCHOR66 + .word .LANCHOR23 + .word .LANCHOR29 + .word .LANCHOR115 + .word .LANCHOR26 .word .LANCHOR27 - .word .LANCHOR28 -.L382: -.L377: - cmp r2, r6 - bcc .L378 - add r3, r3, r2, lsl #2 - ldr r2, .L384 - movs r1, #0 - adds r3, r3, #24 -.L379: - cmp r3, r2 - bne .L380 - movs r0, #0 - pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L378: +.L368: ldr r5, [r3, #28] adds r2, r2, #1 add r5, r5, r0 add r0, r0, r1 str r5, [r4, #4]! - b .L377 -.L380: + b .L367 +.L370: str r1, [r3, #4]! - b .L379 -.L385: - .align 2 -.L384: - .word .LANCHOR37+56 + b .L369 .size FtlMemInit, .-FtlMemInit .section .text.FtlBbt2Bitmap,"ax",%progbits .align 1 @@ -3302,32 +3208,32 @@ FtlMemInit: FtlBbt2Bitmap: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L392 + ldr r3, .L379 push {r4, r5, r6, r7, r8, lr} mov r5, r0 - ldr r7, .L392+4 + ldr r7, .L379+4 mov r6, r1 subs r4, r5, #2 addw r5, r5, #1022 ldrh r2, [r3] movs r1, #0 - ldr r8, .L392+12 + ldr r8, .L379+12 mov r0, r6 lsls r2, r2, #2 bl ftl_memset -.L389: +.L376: ldrh r3, [r4, #2] movw r2, #65535 cmp r3, r2 - beq .L386 + beq .L373 ldrh r2, [r7] cmp r2, r3 - bhi .L388 + bhi .L375 movs r2, #74 mov r1, r8 - ldr r0, .L392+8 + ldr r0, .L379+8 bl printf -.L388: +.L375: ldrh r3, [r4, #2]! movs r2, #1 cmp r5, r4 @@ -3337,16 +3243,16 @@ FtlBbt2Bitmap: ldr r2, [r6, r1, lsl #2] orr r2, r2, r3 str r2, [r6, r1, lsl #2] - bne .L389 -.L386: + bne .L376 +.L373: pop {r4, r5, r6, r7, r8, pc} -.L393: +.L380: .align 2 -.L392: - .word .LANCHOR127 - .word .LANCHOR17 +.L379: + .word .LANCHOR126 + .word .LANCHOR16 .word .LC1 - .word .LANCHOR128 + .word .LANCHOR127 .size FtlBbt2Bitmap, .-FtlBbt2Bitmap .section .text.FtlBbtMemInit,"ax",%progbits .align 1 @@ -3360,7 +3266,7 @@ FtlBbtMemInit: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r0, .L395 + ldr r0, .L382 movw r3, #65535 movs r2, #16 movs r1, #255 @@ -3369,10 +3275,10 @@ FtlBbtMemInit: strh r3, [r0, #6] @ movhi adds r0, r0, #12 b ftl_memset -.L396: +.L383: .align 2 -.L395: - .word .LANCHOR37 +.L382: + .word .LANCHOR36 .size FtlBbtMemInit, .-FtlBbtMemInit .section .text.FtlFreeSysBlkQueueInit,"ax",%progbits .align 1 @@ -3385,7 +3291,7 @@ FtlBbtMemInit: FtlFreeSysBlkQueueInit: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L398 + ldr r3, .L385 mov r2, #2048 push {r4, lr} movs r4, #0 @@ -3398,10 +3304,10 @@ FtlFreeSysBlkQueueInit: bl ftl_memset mov r0, r4 pop {r4, pc} -.L399: +.L386: .align 2 -.L398: - .word .LANCHOR38 +.L385: + .word .LANCHOR37 .size FtlFreeSysBlkQueueInit, .-FtlFreeSysBlkQueueInit .section .text.ftl_free_no_use_map_blk,"ax",%progbits .align 1 @@ -3425,12 +3331,12 @@ ftl_free_no_use_map_blk: mov r0, r5 bl ftl_memset movs r3, #0 -.L401: +.L388: ldrh r1, [r4, #6] uxth r2, r3 cmp r1, r2 - bhi .L405 - ldr r3, .L420 + bhi .L392 + ldr r3, .L407 movs r6, #0 mov r10, r6 ldrh r2, [r3] @@ -3438,59 +3344,59 @@ ftl_free_no_use_map_blk: strh r2, [r5, r3, lsl #1] @ movhi mov r2, r6 ldrh fp, [r5] -.L406: +.L393: ldrh r3, [r4, #10] uxth ip, r6 cmp r3, ip - bhi .L410 + bhi .L397 mov r0, r10 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L405: +.L392: uxth r2, r3 ldr r1, [r6, r2, lsl #2] movs r2, #0 ubfx r1, r1, #10, #16 -.L402: +.L389: ldrh ip, [r4, #10] uxth r0, r2 cmp ip, r0 - bhi .L404 + bhi .L391 adds r3, r3, #1 - b .L401 -.L404: + b .L388 +.L391: uxth r0, r2 ldrh ip, [r7, r0, lsl #1] cmp ip, r1 - bne .L403 - cbz r1, .L403 + bne .L390 + cbz r1, .L390 ldrh ip, [r5, r0, lsl #1] add ip, ip, #1 strh ip, [r5, r0, lsl #1] @ movhi -.L403: +.L390: adds r2, r2, #1 - b .L402 -.L410: + b .L389 +.L397: uxth r1, r6 ldrh r3, [r5, r1, lsl #1] lsl r8, r1, #1 cmp fp, r3 - bls .L407 + bls .L394 ldrh r0, [r7, r1, lsl #1] add r8, r8, r7 - cbnz r0, .L408 -.L409: + cbnz r0, .L395 +.L396: adds r6, r6, #1 - b .L406 -.L407: + b .L393 +.L394: cmp r3, #0 - bne .L409 + bne .L396 ldrh r0, [r7, r1, lsl #1] add r8, r8, r7 cmp r0, #0 - beq .L409 -.L411: + beq .L396 +.L398: movs r1, #1 str r2, [sp, #4] bl FtlFreeSysBlkQueueIn @@ -3499,17 +3405,17 @@ ftl_free_no_use_map_blk: ldrh r3, [r4, #8] subs r3, r3, #1 strh r3, [r4, #8] @ movhi - b .L409 -.L408: + b .L396 +.L395: mov r10, ip mov fp, r3 cmp r3, #0 - beq .L411 - b .L409 -.L421: + beq .L398 + b .L396 +.L408: .align 2 -.L420: - .word .LANCHOR20 +.L407: + .word .LANCHOR19 .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk .section .text.FtlL2PDataInit,"ax",%progbits .align 1 @@ -3524,14 +3430,14 @@ FtlL2PDataInit: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, r8, lr} movs r1, #0 - ldr r5, .L425 - ldr r4, .L425+4 + ldr r5, .L412 + ldr r4, .L412+4 ldr r2, [r5] - ldr r7, .L425+8 - ldr r6, .L425+12 + ldr r7, .L412+8 + ldr r6, .L412+12 ldr r0, [r4] lsls r2, r2, #1 - ldr r8, .L425+44 + ldr r8, .L412+44 bl ftl_memset ldrh r3, [r7] movs r1, #255 @@ -3539,7 +3445,7 @@ FtlL2PDataInit: ldr r0, [r8] muls r2, r3, r2 bl ftl_memset - ldr r3, .L425+16 + ldr r3, .L412+16 movw r0, #65535 ldrh r1, [r6] ldr ip, [r8] @@ -3550,59 +3456,59 @@ FtlL2PDataInit: adds r1, r2, r3 movs r3, #0 mov lr, r3 -.L423: +.L410: adds r2, r2, #12 adds r6, r3, r7 cmp r2, r1 - bne .L424 - ldr r3, .L425+20 + bne .L411 + ldr r3, .L412+20 ldr r2, [r5] strh r0, [r3, #2] @ movhi strh r2, [r3, #10] @ movhi movw r2, #61634 strh r2, [r3, #4] @ movhi - ldr r2, .L425+24 + ldr r2, .L412+24 strh r0, [r3] @ movhi ldrh r2, [r2] strh r2, [r3, #8] @ movhi - ldr r2, .L425+28 + ldr r2, .L412+28 ldrh r2, [r2] strh r2, [r3, #6] @ movhi - ldr r2, .L425+32 + ldr r2, .L412+32 ldr r2, [r2] str r2, [r3, #12] - ldr r2, .L425+36 + ldr r2, .L412+36 ldr r2, [r2] str r2, [r3, #16] ldr r2, [r4] str r2, [r3, #20] - ldr r2, .L425+40 + ldr r2, .L412+40 ldr r2, [r2] str r2, [r3, #24] pop {r4, r5, r6, r7, r8, pc} -.L424: +.L411: bic r3, r3, #3 str lr, [r2, #-8] add r3, r3, ip strh r0, [r2, #-12] @ movhi str r3, [r2, #-4] mov r3, r6 - b .L423 -.L426: + b .L410 +.L413: .align 2 -.L425: - .word .LANCHOR30 - .word .LANCHOR120 - .word .LANCHOR23 - .word .LANCHOR33 - .word .LANCHOR55 - .word .LANCHOR129 - .word .LANCHOR130 - .word .LANCHOR32 +.L412: + .word .LANCHOR29 .word .LANCHOR119 - .word .LANCHOR125 + .word .LANCHOR22 + .word .LANCHOR32 + .word .LANCHOR54 + .word .LANCHOR128 + .word .LANCHOR129 + .word .LANCHOR31 + .word .LANCHOR118 .word .LANCHOR124 - .word .LANCHOR126 + .word .LANCHOR123 + .word .LANCHOR125 .size FtlL2PDataInit, .-FtlL2PDataInit .section .text.FtlVariablesInit,"ax",%progbits .align 1 @@ -3617,65 +3523,65 @@ FtlVariablesInit: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} movw r2, #65535 - ldr r3, .L428 + ldr r3, .L415 movs r4, #0 mov r1, r4 - ldr r5, .L428+4 + ldr r5, .L415+4 strh r2, [r3] @ movhi mov r2, #-1 - ldr r3, .L428+8 + ldr r3, .L415+8 str r4, [r3] - ldr r3, .L428+12 + ldr r3, .L415+12 str r4, [r3] - ldr r3, .L428+16 + ldr r3, .L415+16 str r2, [r3] - ldr r3, .L428+20 + ldr r3, .L415+20 strh r4, [r3] @ movhi - ldr r3, .L428+24 + ldr r3, .L415+24 ldrh r2, [r3] - ldr r3, .L428+28 + ldr r3, .L415+28 lsls r2, r2, #1 ldr r0, [r3] bl ftl_memset ldrh r2, [r5] mov r1, r4 - ldr r3, .L428+32 + ldr r3, .L415+32 lsls r2, r2, #1 ldr r0, [r3] bl ftl_memset ldrh r2, [r5] mov r1, r4 - ldr r3, .L428+36 + ldr r3, .L415+36 lsls r2, r2, #1 ldr r0, [r3] bl ftl_memset mov r1, r4 movs r2, #48 - ldr r0, .L428+40 + ldr r0, .L415+40 bl ftl_memset mov r2, #512 mov r1, r4 - ldr r0, .L428+44 + ldr r0, .L415+44 bl ftl_memset bl FtlGcBufInit bl FtlL2PDataInit mov r0, r4 pop {r3, r4, r5, pc} -.L429: +.L416: .align 2 -.L428: +.L415: + .word .LANCHOR130 + .word .LANCHOR5 .word .LANCHOR131 - .word .LANCHOR6 .word .LANCHOR132 .word .LANCHOR133 - .word .LANCHOR134 + .word .LANCHOR34 + .word .LANCHOR26 .word .LANCHOR35 - .word .LANCHOR27 - .word .LANCHOR36 - .word .LANCHOR47 - .word .LANCHOR117 - .word .LANCHOR39 - .word .LANCHOR135 + .word .LANCHOR46 + .word .LANCHOR116 + .word .LANCHOR38 + .word .LANCHOR134 .size FtlVariablesInit, .-FtlVariablesInit .section .text.SupperBlkListInit,"ax",%progbits .align 1 @@ -3690,10 +3596,10 @@ SupperBlkListInit: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} movs r2, #6 - ldr r3, .L441 + ldr r3, .L428 movs r1, #0 movs r4, #0 - ldr r6, .L441+4 + ldr r6, .L428+4 mov r8, r4 ldrh r3, [r3] mov r5, r4 @@ -3701,135 +3607,135 @@ SupperBlkListInit: mov r10, r6 muls r2, r3, r2 bl ftl_memset - ldr r3, .L441+8 - ldr r2, .L441+12 + ldr r3, .L428+8 + ldr r2, .L428+12 str r4, [r3] - ldr r3, .L441+16 + ldr r3, .L428+16 strh r4, [r2] @ movhi str r2, [sp, #4] str r4, [r3] - ldr r3, .L441+20 + ldr r3, .L428+20 str r4, [r3] - ldr r3, .L441+24 + ldr r3, .L428+24 mov fp, r3 strh r4, [r3] @ movhi -.L431: - ldr r3, .L441+28 +.L418: + ldr r3, .L428+28 uxth r7, r4 ldrh r3, [r3] cmp r7, r3 - bcs .L438 - ldr r3, .L441+32 + bcs .L425 + ldr r3, .L428+32 ldrh r2, [r3] - ldr r3, .L441+36 + ldr r3, .L428+36 ldrh r3, [r3] str r3, [sp] movs r3, #0 mov r6, r3 - b .L439 -.L433: + b .L426 +.L420: str r2, [sp, #12] mov r1, r7 - ldr r2, .L441+40 + ldr r2, .L428+40 str r3, [sp, #8] ldrb r0, [r2, r3] @ zero_extendqisi2 bl V2P_block bl FtlBbmIsBadBlock ldr r3, [sp, #8] ldr r2, [sp, #12] - cbnz r0, .L432 + cbnz r0, .L419 ldr r1, [sp] add r6, r6, r1 uxth r6, r6 -.L432: +.L419: adds r3, r3, #1 -.L439: +.L426: uxth r1, r3 cmp r2, r1 - bhi .L433 + bhi .L420 uxth r3, r4 - cbz r6, .L434 + cbz r6, .L421 mov r1, r6 str r3, [sp] mov r0, #32768 bl __aeabi_idiv ldr r3, [sp] uxth r6, r0 -.L435: +.L422: ldr r1, [r10] movs r2, #6 mla r2, r2, r3, r1 strh r6, [r2, #4] @ movhi - ldr r2, .L441+44 + ldr r2, .L428+44 ldrh r2, [r2] cmp r2, r7 - beq .L436 - ldr r2, .L441+48 + beq .L423 + ldr r2, .L428+48 ldrh r2, [r2] cmp r2, r7 - beq .L436 - ldr r2, .L441+52 + beq .L423 + ldr r2, .L428+52 ldrh r2, [r2] cmp r2, r7 - beq .L436 - ldr r2, .L441+56 + beq .L423 + ldr r2, .L428+56 ldr r2, [r2] ldrh r3, [r2, r3, lsl #1] - cbnz r3, .L437 + cbnz r3, .L424 add r8, r8, #1 mov r0, r7 uxth r8, r8 bl INSERT_FREE_LIST -.L436: +.L423: adds r4, r4, #1 - b .L431 -.L434: - ldr r2, .L441+56 + b .L418 +.L421: + ldr r2, .L428+56 movw r1, #65535 ldr r2, [r2] strh r1, [r2, r3, lsl #1] @ movhi - b .L435 -.L437: + b .L422 +.L424: adds r5, r5, #1 mov r0, r7 uxth r5, r5 bl INSERT_DATA_LIST - b .L436 -.L438: + b .L423 +.L425: ldr r2, [sp, #4] strh r8, [fp] @ movhi strh r5, [r2] @ movhi add r5, r5, r8 cmp r5, r3 - ble .L440 - movw r2, #2210 - ldr r1, .L441+60 - ldr r0, .L441+64 + ble .L427 + movw r2, #2212 + ldr r1, .L428+60 + ldr r0, .L428+64 bl printf -.L440: +.L427: movs r0, #0 add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L442: +.L429: .align 2 -.L441: - .word .LANCHOR6 - .word .LANCHOR40 - .word .LANCHOR46 - .word .LANCHOR44 - .word .LANCHOR41 - .word .LANCHOR43 - .word .LANCHOR48 +.L428: .word .LANCHOR5 - .word .LANCHOR3 - .word .LANCHOR19 - .word .LANCHOR13 + .word .LANCHOR39 + .word .LANCHOR45 + .word .LANCHOR43 + .word .LANCHOR40 + .word .LANCHOR42 + .word .LANCHOR47 + .word .LANCHOR4 + .word .LANCHOR2 + .word .LANCHOR18 + .word .LANCHOR12 + .word .LANCHOR50 .word .LANCHOR51 .word .LANCHOR52 - .word .LANCHOR53 - .word .LANCHOR42 - .word .LANCHOR136 + .word .LANCHOR41 + .word .LANCHOR135 .word .LC1 .size SupperBlkListInit, .-SupperBlkListInit .section .text.FtlGcPageVarInit,"ax",%progbits @@ -3843,16 +3749,16 @@ SupperBlkListInit: FtlGcPageVarInit: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r2, .L444 + ldr r2, .L431 movs r3, #0 push {r4, lr} movs r1, #255 - ldr r4, .L444+4 + ldr r4, .L431+4 strh r3, [r2] @ movhi - ldr r2, .L444+8 + ldr r2, .L431+8 strh r3, [r2] @ movhi ldrh r2, [r4] - ldr r3, .L444+12 + ldr r3, .L431+12 lsls r2, r2, #1 ldr r0, [r3] bl ftl_memset @@ -3860,19 +3766,19 @@ FtlGcPageVarInit: movs r2, #12 movs r1, #255 muls r2, r3, r2 - ldr r3, .L444+16 + ldr r3, .L431+16 ldr r0, [r3] bl ftl_memset pop {r4, lr} b FtlGcBufInit -.L445: +.L432: .align 2 -.L444: - .word .LANCHOR69 - .word .LANCHOR21 - .word .LANCHOR70 +.L431: .word .LANCHOR68 - .word .LANCHOR71 + .word .LANCHOR20 + .word .LANCHOR69 + .word .LANCHOR67 + .word .LANCHOR70 .size FtlGcPageVarInit, .-FtlGcPageVarInit .section .text.FlashGetBadBlockList,"ax",%progbits .align 1 @@ -3891,40 +3797,40 @@ FlashGetBadBlockList: movs r1, #255 mov r4, r0 bl ftl_memset - ldr r3, .L453 + ldr r3, .L440 mov r1, r5 mov r0, r4 ldr r3, [r3] blx r3 uxth r0, r0 cmp r0, #50 - bls .L447 + bls .L434 mov r2, #256 movs r1, #255 mov r0, r4 bl ftl_memset movs r0, #0 -.L447: - ldr r3, .L453+4 +.L434: + ldr r3, .L440+4 ldrh r3, [r3, #14] cmp r3, #4 - bne .L452 + bne .L439 add r1, r4, r0, lsl #1 mov r3, r4 -.L449: +.L436: cmp r3, r1 - bne .L450 -.L452: + bne .L437 +.L439: pop {r3, r4, r5, pc} -.L450: +.L437: ldrh r2, [r3] lsrs r2, r2, #1 strh r2, [r3], #2 @ movhi - b .L449 -.L454: + b .L436 +.L441: .align 2 -.L453: - .word .LANCHOR78 +.L440: + .word .LANCHOR77 .word .LANCHOR0 .size FlashGetBadBlockList, .-FlashGetBadBlockList .section .text.ftl_memcpy,"ax",%progbits @@ -3954,48 +3860,48 @@ FlashReadPages: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} mov fp, r1 - ldr r3, .L496 + ldr r3, .L483 mov r4, r0 mov r10, #0 ldrh r2, [r3, #12] str r3, [sp, #4] str r2, [sp] -.L457: +.L444: cmp r10, fp - bne .L471 + bne .L458 movs r0, #0 add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L471: - ldr r3, [r4, #8] - cbz r3, .L458 - ldr r3, [r4, #12] - cbnz r3, .L459 .L458: + ldr r3, [r4, #8] + cbz r3, .L445 + ldr r3, [r4, #12] + cbnz r3, .L446 +.L445: movs r2, #90 - ldr r1, .L496+4 - ldr r0, .L496+8 + ldr r1, .L483+4 + ldr r0, .L483+8 bl printf -.L459: +.L446: add r2, sp, #8 add r1, sp, #12 ldr r0, [r4, #4] bl l2p_addr_tran.isra.0 ldr r0, [sp, #8] cmp r0, #3 - bls .L460 + bls .L447 mov r3, #-1 str r3, [r4] -.L461: +.L448: add r10, r10, #1 adds r4, r4, #20 - b .L457 -.L460: + b .L444 +.L447: ldr r5, [r4, #8] uxtb r0, r0 - ldr r8, .L496+32 - ldr r7, .L496+12 + ldr r8, .L483+32 + ldr r7, .L483+12 tst r5, #63 ldr r3, [r4, #12] it ne @@ -4008,7 +3914,7 @@ FlashReadPages: str r0, [r4] ldrh r3, [r3, #14] cmp r3, #4 - bne .L464 + bne .L451 ldr r0, [sp] add r2, r5, #2048 ldr r3, [r4, #12] @@ -4019,76 +3925,76 @@ FlashReadPages: ldrb r0, [sp, #8] @ zero_extendqisi2 blx r7 adds r1, r0, #1 - beq .L465 + beq .L452 ldr r3, [r4, #12] ldr r2, [r3, #12] adds r2, r2, #1 - bne .L466 + bne .L453 ldr r2, [r3, #8] adds r2, r2, #1 - bne .L466 + bne .L453 ldr r3, [r3] adds r3, r3, #1 - beq .L466 -.L465: + beq .L453 +.L452: mov r3, #-1 str r3, [r4] -.L466: +.L453: ldr r3, [r4] adds r3, r3, #1 - beq .L467 + beq .L454 cmp r0, #256 it eq streq r0, [r4] -.L467: +.L454: ldr r3, [r4] adds r2, r3, #1 - beq .L468 + beq .L455 cmp r3, #256 - bne .L464 -.L468: + bne .L451 +.L455: ldr r1, [r4, #4] ldr r2, [sp, #12] - ldr r0, .L496+16 + ldr r0, .L483+16 bl printf ldr r1, [r4, #8] - cbz r1, .L470 + cbz r1, .L457 movs r3, #4 - ldr r0, .L496+20 + ldr r0, .L483+20 mov r2, r3 bl rknand_print_hex -.L470: +.L457: ldr r1, [r4, #12] - cbz r1, .L464 + cbz r1, .L451 movs r3, #4 - ldr r0, .L496+24 + ldr r0, .L483+24 mov r2, r3 bl rknand_print_hex -.L464: +.L451: ldr r3, [r8] cmp r5, r3 - bne .L461 + bne .L448 ldr r0, [r4, #8] cmp r5, r0 - beq .L461 - ldr r3, .L496+28 + beq .L448 + ldr r3, .L483+28 mov r1, r5 ldrh r2, [r3] lsls r2, r2, #9 bl ftl_memcpy - b .L461 -.L497: + b .L448 +.L484: .align 2 -.L496: +.L483: .word .LANCHOR0 - .word .LANCHOR137 + .word .LANCHOR136 .word .LC1 - .word .LANCHOR78 + .word .LANCHOR77 .word .LC11 .word .LC12 .word .LC13 - .word .LANCHOR12 - .word .LANCHOR111 + .word .LANCHOR11 + .word .LANCHOR110 .size FlashReadPages, .-FlashReadPages .section .text.FtlLoadFactoryBbt,"ax",%progbits .align 1 @@ -4101,36 +4007,36 @@ FlashReadPages: FtlLoadFactoryBbt: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L508 + ldr r3, .L495 push {r4, r5, r6, r7, r8, r10, fp, lr} movs r6, #0 - ldr r5, .L508+4 + ldr r5, .L495+4 ldr r3, [r3] - ldr r7, .L508+8 - ldr r10, .L508+20 + ldr r7, .L495+8 + ldr r10, .L495+20 str r3, [r5, #8] - ldr r3, .L508+12 + ldr r3, .L495+12 ldr r8, [r3] str r8, [r5, #12] -.L499: - ldr r3, .L508+16 +.L486: + ldr r3, .L495+16 ldrh r3, [r3] cmp r6, r3 - bcc .L504 + bcc .L491 movs r0, #0 pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L504: +.L491: ldrh r4, [r10] movw r3, #65535 - ldr fp, .L508+4 + ldr fp, .L495+4 strh r3, [r7, #2]! @ movhi subs r4, r4, #1 uxth r4, r4 -.L500: +.L487: ldrh r3, [r10] sub r2, r3, #15 cmp r2, r4 - bgt .L502 + bgt .L489 mla r3, r6, r3, r4 movs r2, #1 mov r1, r2 @@ -4140,28 +4046,28 @@ FtlLoadFactoryBbt: bl FlashReadPages ldr r3, [r5] adds r3, r3, #1 - beq .L501 + beq .L488 ldrh r2, [r8] movw r3, #61664 cmp r2, r3 - bne .L501 + bne .L488 strh r4, [r7] @ movhi -.L502: +.L489: adds r6, r6, #1 - b .L499 -.L501: + b .L486 +.L488: subs r4, r4, #1 uxth r4, r4 - b .L500 -.L509: + b .L487 +.L496: .align 2 -.L508: - .word .LANCHOR106 - .word .LANCHOR138 - .word .LANCHOR37+10 - .word .LANCHOR114 - .word .LANCHOR10 - .word .LANCHOR17 +.L495: + .word .LANCHOR105 + .word .LANCHOR137 + .word .LANCHOR36+10 + .word .LANCHOR113 + .word .LANCHOR9 + .word .LANCHOR16 .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt .section .text.FtlGetLastWrittenPage,"ax",%progbits .align 1 @@ -4177,17 +4083,17 @@ FtlGetLastWrittenPage: cmp r1, #1 push {r4, r5, r6, r7, r8, lr} it eq - ldreq r3, .L522 + ldreq r3, .L509 sub sp, sp, #88 lsl r7, r0, #10 mov r2, r1 it ne - ldrne r3, .L522+4 + ldrne r3, .L509+4 mov r6, r1 add r0, sp, #4 movs r1, #1 ldrh r5, [r3] - ldr r3, .L522+8 + ldr r3, .L509+8 subs r5, r5, #1 ldr r3, [r3] sxth r5, r5 @@ -4199,17 +4105,17 @@ FtlGetLastWrittenPage: bl FlashReadPages ldr r3, [sp, #24] adds r3, r3, #1 - bne .L513 + bne .L500 mov r8, #0 -.L514: +.L501: cmp r8, r5 - ble .L517 -.L513: + ble .L504 +.L500: mov r0, r5 add sp, sp, #88 @ sp needed pop {r4, r5, r6, r7, r8, pc} -.L517: +.L504: add r3, r8, r5 mov r2, r6 add r3, r3, r3, lsr #31 @@ -4222,26 +4128,26 @@ FtlGetLastWrittenPage: bl FlashReadPages ldr r3, [sp, #24] adds r3, r3, #1 - bne .L515 + bne .L502 ldr r3, [sp, #28] adds r3, r3, #1 - bne .L515 + bne .L502 ldr r3, [sp, #4] adds r3, r3, #1 - beq .L515 + beq .L502 subs r4, r4, #1 sxth r5, r4 - b .L514 -.L515: + b .L501 +.L502: adds r4, r4, #1 sxth r8, r4 - b .L514 -.L523: + b .L501 +.L510: .align 2 -.L522: - .word .LANCHOR20 +.L509: .word .LANCHOR19 - .word .LANCHOR112 + .word .LANCHOR18 + .word .LANCHOR111 .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage .section .text.FtlScanSysBlk,"ax",%progbits .align 1 @@ -4256,69 +4162,69 @@ FtlScanSysBlk: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, r8, r10, fp, lr} movs r4, #0 - ldr r5, .L605 + ldr r5, .L592 sub sp, sp, #32 mov r1, r4 - ldr r3, .L605+4 + ldr r3, .L592+4 ldr r2, [r5] - ldr r6, .L605+8 + ldr r6, .L592+8 strh r4, [r3] @ movhi - ldr r3, .L605+12 + ldr r3, .L592+12 lsls r2, r2, #2 strh r4, [r6] @ movhi - ldr r7, .L605+16 + ldr r7, .L592+16 ldr r0, [r3] bl ftl_memset ldr r2, [r5] mov r1, r4 - ldr r3, .L605+20 + ldr r3, .L592+20 lsls r2, r2, #1 ldr r0, [r3] bl ftl_memset ldrh r2, [r7] mov r1, r4 - ldr r3, .L605+24 + ldr r3, .L592+24 lsls r2, r2, #2 ldr r0, [r3] bl ftl_memset ldrh r2, [r7] mov r1, r4 - ldr r3, .L605+28 + ldr r3, .L592+28 lsls r2, r2, #1 ldr r0, [r3] bl ftl_memset movs r2, #16 movs r1, #255 - ldr r0, .L605+32 + ldr r0, .L592+32 bl ftl_memset - ldr r3, .L605+36 + ldr r3, .L592+36 str r6, [sp, #12] str r5, [sp, #16] ldrh r3, [r3] str r3, [sp, #4] -.L525: - ldr r3, .L605+40 +.L512: + ldr r3, .L592+40 ldr r2, [sp, #4] ldrh r3, [r3] cmp r3, r2 - bls .L566 - ldr r3, .L605+44 + bls .L553 + ldr r3, .L592+44 movs r5, #0 - ldr r1, .L605+48 + ldr r1, .L592+48 mov fp, r5 movs r7, #20 ldrh r8, [r3] - ldr r3, .L605+52 + ldr r3, .L592+52 ldr r2, [r1] - ldr r1, .L605+56 + ldr r1, .L592+56 ldr r6, [r3] - ldr r3, .L605+60 + ldr r3, .L592+60 str r2, [sp, #8] ldrh r10, [r1] ldr r3, [r3] - ldr r2, .L605+64 - b .L567 -.L527: + ldr r2, .L592+64 + b .L554 +.L514: ldrb r0, [r2, r5] @ zero_extendqisi2 ldr r1, [sp, #4] str r3, [sp, #28] @@ -4328,7 +4234,7 @@ FtlScanSysBlk: bl FtlBbmIsBadBlock ldr r2, [sp, #24] ldr r3, [sp, #28] - cbnz r0, .L526 + cbnz r0, .L513 ldr r1, [sp, #20] mla r0, r7, fp, r6 ldr r4, [sp, #8] @@ -4341,31 +4247,31 @@ FtlScanSysBlk: str r1, [r0, #12] add r1, fp, #1 uxth fp, r1 -.L526: +.L513: adds r5, r5, #1 -.L567: +.L554: uxth r1, r5 cmp r8, r1 - bhi .L527 + bhi .L514 cmp fp, #0 - bne .L528 -.L565: + bne .L515 +.L552: ldr r3, [sp, #4] adds r3, r3, #1 uxth r3, r3 str r3, [sp, #4] - b .L525 -.L528: + b .L512 +.L515: movs r7, #0 movs r2, #1 mov r1, fp mov r0, r6 bl FlashReadPages -.L529: +.L516: uxth r3, r7 cmp fp, r3 - bls .L565 - ldr r3, .L605+52 + bls .L552 + ldr r3, .L592+52 mov r8, #20 mul r8, r8, r7 ldr r3, [r3] @@ -4375,10 +4281,10 @@ FtlScanSysBlk: ldr r6, [r2, #12] adds r3, r3, #1 ubfx r5, r5, #10, #16 - bne .L532 + bne .L519 mov r10, #16 -.L534: - ldr r3, .L605+52 +.L521: + ldr r3, .L592+52 movs r2, #1 mov r1, r2 ldr r0, [r3] @@ -4390,83 +4296,83 @@ FtlScanSysBlk: ldrh r2, [r6] movw r3, #65535 cmp r2, r3 - ldr r3, .L605+52 + ldr r3, .L592+52 ldr r3, [r3] - bne .L531 + bne .L518 mov r2, #-1 str r2, [r3, r8] - ldr r3, .L605+52 + ldr r3, .L592+52 ldr r3, [r3] ldr r3, [r3, r8] cmp r3, r2 - bne .L532 -.L533: + bne .L519 +.L520: movs r1, #1 - b .L604 -.L531: + b .L591 +.L518: ldr r3, [r3, r8] adds r3, r3, #1 - bne .L532 + bne .L519 add r10, r10, #-1 uxth r10, r10 cmp r10, #0 - bne .L534 - b .L533 -.L532: - ldr r3, .L605+68 + bne .L521 + b .L520 +.L519: + ldr r3, .L592+68 ldr r2, [r3] ldr r3, [r6, #4] adds r1, r2, #1 - beq .L535 + beq .L522 cmp r2, r3 - bhi .L536 -.L535: + bhi .L523 +.L522: adds r2, r3, #1 ittt ne - ldrne r1, .L605+68 + ldrne r1, .L592+68 addne r2, r3, #1 strne r2, [r1] -.L536: +.L523: ldrh r2, [r6] movw r1, #61604 cmp r2, r1 - beq .L538 - bhi .L539 + beq .L525 + bhi .L526 movw r3, #61574 cmp r2, r3 - beq .L540 -.L537: + beq .L527 +.L524: adds r7, r7, #1 - b .L529 -.L539: + b .L516 +.L526: movw r3, #61634 cmp r2, r3 - beq .L541 + beq .L528 movw r3, #65535 cmp r2, r3 - bne .L537 + bne .L524 movs r1, #0 -.L604: +.L591: mov r0, r5 bl FtlFreeSysBlkQueueIn - b .L537 -.L541: - ldr r3, .L605+8 + b .L524 +.L528: + ldr r3, .L592+8 ldrh r2, [r3] - ldr r3, .L605 + ldr r3, .L592 ldr r3, [r3] cmp r2, r3 - bls .L543 + bls .L530 movw r2, #1225 - ldr r1, .L605+72 - ldr r0, .L605+76 + ldr r1, .L592+72 + ldr r0, .L592+76 bl printf -.L543: +.L530: ldr r3, [sp, #16] ldr r2, [sp, #12] ldr r1, [r3] ldrh r0, [r2] - ldr r2, .L605+12 + ldr r2, .L592+12 uxth r10, r1 ldr ip, [r2] add r3, r10, #-1 @@ -4474,61 +4380,61 @@ FtlScanSysBlk: add r10, r10, #-1 sxth r3, r3 sxth r10, r10 -.L544: +.L531: cmp r3, r10 - bgt .L550 + bgt .L537 cmp r3, #0 - bge .L582 - b .L537 -.L550: + bge .L569 + b .L524 +.L537: ldr r2, [ip, r3, lsl #2] add r8, ip, r3, lsl #2 ldr r4, [r6, #4] cmp r4, r2 - bls .L545 + bls .L532 ldr r2, [ip] - cbnz r2, .L546 + cbnz r2, .L533 cmp r1, r0 ittt ne - ldrne r2, .L605+8 + ldrne r2, .L592+8 addne r0, r0, #1 strhne r0, [r2] @ movhi -.L546: - ldr r2, .L605+20 +.L533: + ldr r2, .L592+20 uxth r10, r3 ldr r0, [r2] movs r2, #0 -.L547: +.L534: uxth lr, r2 sxth r1, r2 cmp r10, lr - bhi .L548 + bhi .L535 ldr r2, [r6, #4] cmp r3, #0 str r2, [r8] strh r5, [r0, r3, lsl #1] @ movhi - blt .L537 - ldr r2, .L605+8 + blt .L524 + ldr r2, .L592+8 ldrh r0, [r2] - ldr r2, .L605 + ldr r2, .L592 ldr r2, [r2] subs r2, r2, r0 subs r2, r2, #1 sxth r2, r2 cmp r3, r2 - bgt .L537 -.L582: - ldr r2, .L605+8 + bgt .L524 +.L569: + ldr r2, .L592+8 adds r0, r0, #1 strh r0, [r2] @ movhi ldr r2, [r6, #4] str r2, [ip, r3, lsl #2] - ldr r2, .L605+20 -.L602: + ldr r2, .L592+20 +.L589: ldr r2, [r2] strh r5, [r2, r3, lsl #1] @ movhi - b .L537 -.L548: + b .L524 +.L535: add lr, ip, r1, lsl #2 adds r2, r2, #1 ldr r4, [lr, #4] @@ -4536,100 +4442,100 @@ FtlScanSysBlk: ldrh lr, [lr, #2] str r4, [ip, r1, lsl #2] strh lr, [r0, r1, lsl #1] @ movhi - b .L547 -.L545: + b .L534 +.L532: subs r3, r3, #1 sxth r3, r3 - b .L544 -.L606: + b .L531 +.L593: .align 2 -.L605: - .word .LANCHOR30 +.L592: + .word .LANCHOR29 + .word .LANCHOR34 + .word .LANCHOR129 + .word .LANCHOR124 + .word .LANCHOR26 + .word .LANCHOR118 + .word .LANCHOR121 .word .LANCHOR35 - .word .LANCHOR130 - .word .LANCHOR125 - .word .LANCHOR27 - .word .LANCHOR119 - .word .LANCHOR122 - .word .LANCHOR36 - .word .LANCHOR139 + .word .LANCHOR138 + .word .LANCHOR4 .word .LANCHOR5 - .word .LANCHOR6 - .word .LANCHOR3 - .word .LANCHOR65 - .word .LANCHOR103 - .word .LANCHOR24 + .word .LANCHOR2 .word .LANCHOR64 - .word .LANCHOR13 - .word .LANCHOR82 - .word .LANCHOR140 + .word .LANCHOR102 + .word .LANCHOR23 + .word .LANCHOR63 + .word .LANCHOR12 + .word .LANCHOR81 + .word .LANCHOR139 .word .LC1 -.L540: - ldr r8, .L607+12 - ldr r10, .L607+20 +.L527: + ldr r8, .L594+12 + ldr r10, .L594+20 ldrh r2, [r8] ldrh r3, [r10] cmp r2, r3 - bls .L553 + bls .L540 movw r2, #1266 - ldr r1, .L607 - ldr r0, .L607+4 + ldr r1, .L594 + ldr r0, .L594+4 bl printf -.L553: - ldr r2, .L607+8 +.L540: + ldr r2, .L594+8 ldrh lr, [r10] ldrh ip, [r8] ldr r0, [r2] add r10, lr, #-1 sxth r3, r10 sub r10, r10, ip -.L554: +.L541: cmp r3, r10 - ble .L559 + ble .L546 ldr r1, [r6, #4] add r8, r0, r3, lsl #2 ldr r2, [r0, r3, lsl #2] cmp r1, r2 - bls .L555 + bls .L542 ldr r2, [r0] - cbnz r2, .L556 + cbnz r2, .L543 cmp lr, ip ittt ne - ldrne r2, .L607+12 + ldrne r2, .L594+12 addne ip, ip, #1 strhne ip, [r2] @ movhi -.L556: - ldr r2, .L607+16 +.L543: + ldr r2, .L594+16 uxth r10, r3 ldr ip, [r2] movs r2, #0 -.L557: +.L544: uxth lr, r2 sxth r1, r2 cmp r10, lr - bhi .L558 + bhi .L545 ldr r2, [r6, #4] str r2, [r8] strh r5, [ip, r3, lsl #1] @ movhi -.L559: +.L546: cmp r3, #0 - blt .L537 - ldr r2, .L607+20 - ldr ip, .L607+12 + blt .L524 + ldr r2, .L594+20 + ldr ip, .L594+12 ldrh r2, [r2] ldrh r1, [ip] subs r2, r2, #1 subs r2, r2, r1 sxth r2, r2 cmp r3, r2 - bgt .L537 + bgt .L524 ldr r2, [r6, #4] adds r1, r1, #1 strh r1, [ip] @ movhi str r2, [r0, r3, lsl #2] - ldr r2, .L607+16 - b .L602 -.L558: + ldr r2, .L594+16 + b .L589 +.L545: add lr, r0, r1, lsl #2 adds r2, r2, #1 ldr r4, [lr, #4] @@ -4637,88 +4543,88 @@ FtlScanSysBlk: ldrh lr, [lr, #2] str r4, [r0, r1, lsl #2] strh lr, [ip, r1, lsl #1] @ movhi - b .L557 -.L555: + b .L544 +.L542: subs r3, r3, #1 sxth r3, r3 - b .L554 -.L538: - ldr r8, .L607+40 + b .L541 +.L525: + ldr r8, .L594+40 movw r2, #65535 ldrh r1, [r8] cmp r1, r2 - bne .L561 -.L603: + bne .L548 +.L590: strh r5, [r8] @ movhi str r3, [r8, #8] - b .L537 -.L561: + b .L524 +.L548: ldrh r0, [r8, #4] cmp r0, r2 - beq .L562 + beq .L549 movs r1, #1 bl FtlFreeSysBlkQueueIn -.L562: +.L549: ldr r3, [r6, #4] ldr r2, [r8, #8] cmp r2, r3 - bcs .L563 + bcs .L550 ldrh r2, [r8] strh r2, [r8, #4] @ movhi - b .L603 -.L563: + b .L590 +.L550: strh r5, [r8, #4] @ movhi - b .L537 -.L566: - ldr r3, .L607+24 + b .L524 +.L553: + ldr r3, .L594+24 ldr r2, [r3] ldrh r3, [r2] - cbz r3, .L568 -.L571: - ldr r3, .L607+16 + cbz r3, .L555 +.L558: + ldr r3, .L594+16 ldr r4, [r3] ldrh r2, [r4] cmp r2, #0 - beq .L569 -.L570: - ldr r3, .L607+28 + beq .L556 +.L557: + ldr r3, .L594+28 ldrh r2, [r3] - ldr r3, .L607+32 + ldr r3, .L594+32 ldr r3, [r3] cmp r2, r3 - bls .L601 + bls .L588 movw r2, #1391 - ldr r1, .L607 - ldr r0, .L607+4 + ldr r1, .L594 + ldr r0, .L594+4 bl printf -.L601: +.L588: movs r0, #0 add sp, sp, #32 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L568: - ldr r1, .L607+28 +.L555: + ldr r1, .L594+28 ldrh r1, [r1] cmp r1, #0 - beq .L571 - ldr r5, .L607+32 + beq .L558 + ldr r5, .L594+32 ldr r0, [r5] -.L572: +.L559: sxth r1, r3 cmp r1, r0 - bcs .L571 + bcs .L558 ldrh r4, [r2, r1, lsl #1] adds r3, r3, #1 cmp r4, #0 - beq .L572 - ldr r3, .L607+36 + beq .L559 + ldr r3, .L594+36 movs r6, #0 ldr r0, [r3] mov r3, r1 -.L573: +.L560: ldr r4, [r5] cmp r3, r4 - bcs .L571 + bcs .L558 ldrh r7, [r2, r3, lsl #1] subs r4, r3, r1 strh r7, [r2, r4, lsl #1] @ movhi @@ -4727,30 +4633,30 @@ FtlScanSysBlk: strh r6, [r2, r3, lsl #1] @ movhi adds r3, r3, #1 sxth r3, r3 - b .L573 -.L569: - ldr r3, .L607+12 + b .L560 +.L556: + ldr r3, .L594+12 ldrh r3, [r3] cmp r3, #0 - beq .L570 - ldr r5, .L607+20 + beq .L557 + ldr r5, .L594+20 ldrh r1, [r5] -.L578: +.L565: sxth r3, r2 cmp r3, r1 mov r6, r3 - bge .L570 + bge .L557 ldrh r0, [r4, r3, lsl #1] adds r2, r2, #1 cmp r0, #0 - beq .L578 - ldr r2, .L607+8 + beq .L565 + ldr r2, .L594+8 movs r0, #0 ldr r2, [r2] -.L579: +.L566: ldrh r1, [r5] cmp r3, r1 - bge .L570 + bge .L557 ldrh r7, [r4, r3, lsl #1] subs r1, r3, r6 strh r7, [r4, r1, lsl #1] @ movhi @@ -4759,21 +4665,21 @@ FtlScanSysBlk: adds r1, r3, #1 strh r0, [r4, r3, lsl #1] @ movhi sxth r3, r1 - b .L579 -.L608: + b .L566 +.L595: .align 2 -.L607: - .word .LANCHOR140 - .word .LC1 - .word .LANCHOR122 - .word .LANCHOR35 - .word .LANCHOR36 - .word .LANCHOR27 - .word .LANCHOR119 - .word .LANCHOR130 - .word .LANCHOR30 - .word .LANCHOR125 +.L594: .word .LANCHOR139 + .word .LC1 + .word .LANCHOR121 + .word .LANCHOR34 + .word .LANCHOR35 + .word .LANCHOR26 + .word .LANCHOR118 + .word .LANCHOR129 + .word .LANCHOR29 + .word .LANCHOR124 + .word .LANCHOR138 .size FtlScanSysBlk, .-FtlScanSysBlk .section .text.FtlLoadBbt,"ax",%progbits .align 1 @@ -4787,24 +4693,24 @@ FtlLoadBbt: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, r8, r10, lr} - ldr r8, .L638+40 - ldr r4, .L638 + ldr r8, .L625+40 + ldr r4, .L625 ldr r3, [r8] - ldr r7, .L638+4 + ldr r7, .L625+4 mov r10, r4 str r3, [r4, #8] - ldr r3, .L638+8 + ldr r3, .L625+8 ldr r6, [r3] str r6, [r4, #12] bl FtlBbtMemInit ldrh r5, [r7] subs r5, r5, #1 uxth r5, r5 -.L610: +.L597: ldrh r3, [r7] subs r3, r3, #15 cmp r3, r5 - bgt .L613 + bgt .L600 lsls r3, r5, #10 movs r2, #1 mov r1, r2 @@ -4813,7 +4719,7 @@ FtlLoadBbt: bl FlashReadPages ldr r3, [r4] adds r3, r3, #1 - bne .L611 + bne .L598 ldr r3, [r4, #4] movs r2, #1 mov r1, r2 @@ -4821,101 +4727,101 @@ FtlLoadBbt: adds r3, r3, #1 str r3, [r4, #4] bl FlashReadPages -.L611: +.L598: ldr r3, [r4] adds r3, r3, #1 - beq .L612 + beq .L599 ldrh r2, [r6] movw r3, #61649 cmp r2, r3 - bne .L612 - ldr r3, .L638+12 + bne .L599 + ldr r3, .L625+12 ldr r2, [r6, #4] strh r5, [r3] @ movhi str r2, [r3, #8] ldrh r2, [r6, #8] strh r2, [r3, #4] @ movhi -.L613: - ldr r5, .L638+12 +.L600: + ldr r5, .L625+12 movw r2, #65535 ldrh r3, [r5] cmp r3, r2 - beq .L627 + beq .L614 ldrh r3, [r5, #4] cmp r3, r2 - beq .L617 + beq .L604 lsls r3, r3, #10 movs r2, #1 mov r1, r2 - ldr r0, .L638 + ldr r0, .L625 str r3, [r4, #4] bl FlashReadPages ldr r3, [r4] adds r3, r3, #1 - beq .L617 + beq .L604 ldrh r2, [r6] movw r3, #61649 cmp r2, r3 - bne .L617 + bne .L604 ldr r3, [r6, #4] ldr r2, [r5, #8] cmp r3, r2 - bls .L617 + bls .L604 ldrh r2, [r5, #4] str r3, [r5, #8] ldrh r3, [r6, #8] strh r2, [r5] @ movhi strh r3, [r5, #4] @ movhi -.L617: - ldr r10, .L638 +.L604: + ldr r10, .L625 movs r1, #1 ldrh r0, [r5] bl FtlGetLastWrittenPage sxth r7, r0 adds r0, r0, #1 strh r0, [r5, #2] @ movhi -.L619: +.L606: cmp r7, #0 - bge .L622 + bge .L609 movs r2, #251 - ldr r1, .L638+16 - ldr r0, .L638+20 + ldr r1, .L625+16 + ldr r0, .L625+20 bl printf -.L621: +.L608: ldrh r3, [r6, #10] ldrh r0, [r6, #12] strh r3, [r5, #6] @ movhi movw r3, #65535 cmp r0, r3 - beq .L624 - ldr r3, .L638+24 + beq .L611 + ldr r3, .L625+24 ldr r2, [r3] cmp r0, r2 - beq .L624 - ldr r3, .L638+28 + beq .L611 + ldr r3, .L625+28 ldrh r3, [r3] lsrs r3, r3, #2 cmp r2, r3 - bcs .L624 + bcs .L611 cmp r0, r3 - bcs .L624 + bcs .L611 bl FtlSysBlkNumInit -.L624: - ldr r6, .L638+32 +.L611: + ldr r6, .L625+32 movs r5, #0 - ldr r7, .L638+36 - ldr r8, .L638+44 -.L625: + ldr r7, .L625+36 + ldr r8, .L625+44 +.L612: ldrh r3, [r7] cmp r5, r3 - bcc .L626 + bcc .L613 movs r0, #0 pop {r3, r4, r5, r6, r7, r8, r10, pc} -.L612: +.L599: subs r5, r5, #1 uxth r5, r5 - b .L610 -.L622: + b .L597 +.L609: ldrh r3, [r5] movs r2, #1 mov r1, r2 @@ -4927,16 +4833,16 @@ FtlLoadBbt: bl FlashReadPages ldr r3, [r4] adds r3, r3, #1 - beq .L620 + beq .L607 ldrh r2, [r6] movw r3, #61649 cmp r2, r3 - beq .L621 -.L620: + beq .L608 +.L607: subs r7, r7, #1 sxth r7, r7 - b .L619 -.L626: + b .L606 +.L613: ldrh r2, [r8] ldr r1, [r4, #8] ldr r0, [r6, #4]! @@ -4944,25 +4850,25 @@ FtlLoadBbt: mla r1, r5, r2, r1 adds r5, r5, #1 bl ftl_memcpy - b .L625 -.L627: + b .L612 +.L614: mov r0, #-1 pop {r3, r4, r5, r6, r7, r8, r10, pc} -.L639: +.L626: .align 2 -.L638: - .word .LANCHOR138 - .word .LANCHOR17 - .word .LANCHOR114 - .word .LANCHOR37 - .word .LANCHOR141 +.L625: + .word .LANCHOR137 + .word .LANCHOR16 + .word .LANCHOR113 + .word .LANCHOR36 + .word .LANCHOR140 .word .LC1 - .word .LANCHOR2 - .word .LANCHOR6 - .word .LANCHOR37+24 - .word .LANCHOR10 - .word .LANCHOR106 - .word .LANCHOR127 + .word .LANCHOR1 + .word .LANCHOR5 + .word .LANCHOR36+24 + .word .LANCHOR9 + .word .LANCHOR105 + .word .LANCHOR126 .size FtlLoadBbt, .-FtlLoadBbt .section .text.FlashProgPages,"ax",%progbits .align 1 @@ -4975,32 +4881,28 @@ FtlLoadBbt: FlashProgPages: @ args = 0, pretend = 0, frame = 48 @ frame_needed = 0, uses_anonymous_args = 0 + ldr r3, .L665 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #48 - str r3, [sp, #12] + ldr fp, .L665+52 mov r10, r1 mov r4, r0 mov r5, r0 - ldr r3, .L681 - mov r8, #0 - ldr fp, .L681+52 - str r2, [sp, #8] ldrh r3, [r3, #12] - str r3, [sp] - lsls r3, r3, #3 + mov r8, #0 + str r2, [sp, #12] str r3, [sp, #4] -.L641: + lsls r3, r3, #3 + str r3, [sp, #8] +.L628: cmp r8, r10 - bne .L654 - ldr r3, [sp, #12] - cmp r3, #0 - beq .L673 - ldr r6, .L681+4 + bne .L641 + ldr r6, .L665+4 movs r5, #0 -.L656: +.L642: cmp r8, r5 - beq .L673 - ldr r7, .L681+8 + beq .L663 + ldr r7, .L665+8 movs r1, #0 ldr r2, [r6] add r0, sp, #28 @@ -5009,88 +4911,88 @@ FlashProgPages: str r1, [r3] ldr r1, [r4, #4] str r2, [sp, #36] - ldr r2, [sp, #8] + ldr r2, [sp, #12] str r1, [sp, #32] movs r1, #1 str r3, [sp, #40] bl FlashReadPages ldr r10, [sp, #28] cmp r10, #-1 - bne .L657 + bne .L643 ldr r1, [r4, #4] - ldr r0, .L681+12 + ldr r0, .L665+12 bl printf str r10, [r4] -.L657: +.L643: ldr r10, [sp, #28] cmp r10, #256 - bne .L658 + bne .L644 ldr r1, [r4, #4] - ldr r0, .L681+16 + ldr r0, .L665+16 bl printf str r10, [r4] -.L658: +.L644: ldr r3, [r4, #12] - cbz r3, .L659 + cbz r3, .L645 ldr r2, [r3] ldr r3, [r7] ldr r3, [r3] cmp r2, r3 - beq .L659 + beq .L645 ldr r1, [r4, #4] - ldr r0, .L681+20 + ldr r0, .L665+20 bl printf mov r3, #-1 str r3, [r4] -.L659: +.L645: ldr r3, [r4, #8] - cbz r3, .L660 + cbz r3, .L646 ldr r2, [r3] ldr r3, [r6] ldr r3, [r3] cmp r2, r3 - beq .L660 + beq .L646 ldr r1, [r4, #4] - ldr r0, .L681+24 + ldr r0, .L665+24 bl printf mov r3, #-1 str r3, [r4] -.L660: +.L646: adds r5, r5, #1 adds r4, r4, #20 - b .L656 -.L654: + b .L642 +.L641: ldr r3, [r5, #8] - cbz r3, .L642 + cbz r3, .L629 ldr r3, [r5, #12] - cbnz r3, .L643 -.L642: + cbnz r3, .L630 +.L629: movs r2, #142 - ldr r1, .L681+28 - ldr r0, .L681+32 + ldr r1, .L665+28 + ldr r0, .L665+32 bl printf -.L643: +.L630: add r2, sp, #20 add r1, sp, #24 ldr r0, [r5, #4] bl l2p_addr_tran.isra.0 ldr r6, [sp, #20] cmp r6, #3 - bls .L644 -.L680: + bls .L631 +.L664: mov r3, #-1 str r3, [r5] - b .L645 -.L644: - cbnz r6, .L646 + b .L632 +.L631: + cbnz r6, .L633 ldr r3, [sp, #24] - ldr r2, [sp, #4] + ldr r2, [sp, #8] cmp r2, r3 - bls .L646 - ldr r5, .L681+28 - ldr r7, .L681+36 - b .L679 -.L648: + bls .L633 + ldr r5, .L665+28 + ldr r7, .L665+36 + b .L662 +.L635: mov r3, #-1 ldr r2, [r4, #-16] str r3, [r4, #-20] @@ -5101,50 +5003,50 @@ FlashProgPages: movs r3, #16 movs r2, #4 ldr r1, [r4, #-12] - ldr r0, .L681+40 + ldr r0, .L665+40 bl rknand_print_hex movs r3, #4 ldr r1, [r4, #-8] mov r2, r3 - ldr r0, .L681+44 + ldr r0, .L665+44 bl rknand_print_hex -.L679: +.L662: cmp r6, r10 add r4, r4, #20 - bne .L648 -.L673: + bne .L635 +.L663: movs r0, #0 add sp, sp, #48 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L646: +.L633: ldr r1, [r5, #8] lsls r3, r1, #26 - beq .L662 - ldr r3, .L681+4 + beq .L649 + ldr r3, .L665+4 ldr r6, [r3] cmp r1, r6 - beq .L649 - ldr r3, .L681+48 + beq .L636 + ldr r3, .L665+48 mov r0, r6 ldrh r2, [r3] lsls r2, r2, #9 bl ftl_memcpy -.L649: +.L636: ldr r3, [r5, #12] mov r2, r6 ldr r1, [sp, #24] ldrb r0, [sp, #20] @ zero_extendqisi2 ldr r7, [fp, #8] blx r7 - cbnz r0, .L650 + cbnz r0, .L637 str r0, [r5] -.L651: - ldr r3, .L681 +.L638: + ldr r3, .L665 ldrh r3, [r3, #14] cmp r3, #4 - bne .L645 - ldr r0, [sp] + bne .L632 + ldr r0, [sp, #4] add r2, r6, #2048 ldr r3, [r5, #12] ldr r1, [sp, #24] @@ -5154,35 +5056,35 @@ FlashProgPages: ldrb r0, [sp, #20] @ zero_extendqisi2 blx r6 cmp r0, #0 - bne .L680 -.L645: + bne .L664 +.L632: add r8, r8, #1 adds r5, r5, #20 - b .L641 -.L662: + b .L628 +.L649: mov r6, r1 - b .L649 -.L650: + b .L636 +.L637: mov r3, #-1 str r3, [r5] - b .L651 -.L682: + b .L638 +.L666: .align 2 -.L681: +.L665: .word .LANCHOR0 - .word .LANCHOR111 - .word .LANCHOR113 + .word .LANCHOR110 + .word .LANCHOR112 .word .LC14 .word .LC15 .word .LC16 .word .LC17 - .word .LANCHOR142 + .word .LANCHOR141 .word .LC1 .word .LC6 .word .LC7 .word .LC8 - .word .LANCHOR12 - .word .LANCHOR78 + .word .LANCHOR11 + .word .LANCHOR77 .size FlashProgPages, .-FlashProgPages .section .text.FtlLowFormatEraseBlock,"ax",%progbits .align 1 @@ -5195,133 +5097,133 @@ FlashProgPages: FtlLowFormatEraseBlock: @ args = 0, pretend = 0, frame = 32 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L726 + ldr r3, .L710 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #32 - ldr r7, .L726+4 + ldr r7, .L710+4 mov r8, #0 mov r6, r1 mov r5, r8 str r0, [r3] mov r4, r8 - ldr r3, .L726+8 + ldr r3, .L710+8 mov fp, #20 ldr r10, [r7] str r0, [sp, #4] ldrh r3, [r3] str r3, [sp, #12] - ldr r3, .L726+12 + ldr r3, .L710+12 ldr r3, [r3] str r3, [sp, #16] - ldr r3, .L726+16 + ldr r3, .L710+16 ldr r3, [r3] str r3, [sp, #20] - ldr r3, .L726+20 + ldr r3, .L710+20 ldrh r3, [r3] str r3, [sp, #24] -.L684: +.L668: ldr r3, [sp, #12] uxth r2, r8 cmp r3, r2 - bhi .L688 + bhi .L672 cmp r5, #0 - beq .L683 + beq .L667 mov r0, r10 mov r8, #0 mov r10, #20 mov r2, r5 movs r1, #0 bl FlashEraseBlocks -.L691: +.L675: uxth r3, r8 cmp r5, r3 - bhi .L693 + bhi .L677 cmp r6, #0 - beq .L709 - ldr r3, .L726+24 + beq .L693 + ldr r3, .L710+24 mov r10, #1 ldrh r3, [r3] str r3, [sp, #8] -.L694: +.L678: movs r7, #0 -.L703: - ldr r3, .L726+8 +.L687: + ldr r3, .L710+8 mov r8, #0 mov r5, r8 ldrh r3, [r3] str r3, [sp, #16] - ldr r3, .L726+4 + ldr r3, .L710+4 ldr fp, [r3] - ldr r3, .L726+28 + ldr r3, .L710+28 ldr r3, [r3] str r3, [sp, #20] - ldr r3, .L726+12 + ldr r3, .L710+12 ldr r3, [r3] str r3, [sp, #24] - ldr r3, .L726+20 + ldr r3, .L710+20 ldrh r3, [r3] str r3, [sp, #28] -.L695: +.L679: ldr r3, [sp, #16] uxth r2, r8 cmp r3, r2 - bhi .L698 - cbz r5, .L683 + bhi .L682 + cbz r5, .L667 mov r0, fp - ldr fp, .L726+4 + ldr fp, .L710+4 movs r3, #1 mov r2, r10 mov r1, r5 mov r8, #0 bl FlashProgPages movs r3, #20 -.L700: +.L684: uxth r2, r8 cmp r5, r2 - bhi .L702 + bhi .L686 adds r7, r7, #1 ldr r2, [sp, #8] uxth r3, r7 cmp r2, r3 - bhi .L703 - ldr r8, .L726+4 + bhi .L687 + ldr r8, .L710+4 movs r7, #0 mov fp, #20 -.L704: +.L688: uxth r3, r7 cmp r5, r3 - bhi .L706 + bhi .L690 ldr r3, [sp, #4] cmp r3, #63 - bls .L707 - cbz r6, .L683 -.L707: - ldr r3, .L726+4 + bls .L691 + cbz r6, .L667 +.L691: + ldr r3, .L710+4 mov r2, r5 mov r1, r10 ldr r0, [r3] bl FlashEraseBlocks -.L683: +.L667: mov r0, r4 add sp, sp, #32 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L688: +.L672: mul r2, fp, r8 movs r3, #0 ldr r1, [sp, #4] str r3, [r10, r2] - ldr r3, .L726+32 + ldr r3, .L710+32 ldrb r0, [r3, r8] @ zero_extendqisi2 bl V2P_block str r0, [sp, #8] - cbz r6, .L685 + cbz r6, .L669 bl IsBlkInVendorPart - cbnz r0, .L686 -.L685: + cbnz r0, .L670 +.L669: ldr r0, [sp, #8] bl FtlBbmIsBadBlock - cbnz r0, .L687 + cbnz r0, .L671 ldr r3, [sp, #8] mla r1, fp, r5, r10 lsls r2, r3, #10 @@ -5336,50 +5238,50 @@ FtlLowFormatEraseBlock: bic r2, r2, #3 add r2, r2, r3 str r2, [r1, #12] -.L686: +.L670: add r8, r8, #1 - b .L684 -.L687: + b .L668 +.L671: adds r4, r4, #1 uxth r4, r4 - b .L686 -.L693: + b .L670 +.L677: mul r3, r10, r8 ldr r2, [r7] adds r1, r2, r3 ldr r3, [r2, r3] adds r3, r3, #1 - bne .L692 + bne .L676 ldr r0, [r1, #4] adds r4, r4, #1 uxth r4, r4 ubfx r0, r0, #10, #16 bl FtlBbmMapBadBlock -.L692: +.L676: add r8, r8, #1 - b .L691 -.L709: + b .L675 +.L693: movs r3, #2 mov r10, r6 str r3, [sp, #8] - b .L694 -.L698: + b .L678 +.L682: movs r3, #20 ldr r1, [sp, #4] mul r2, r3, r8 movs r3, #0 str r3, [fp, r2] - ldr r3, .L726+32 + ldr r3, .L710+32 ldrb r0, [r3, r8] @ zero_extendqisi2 bl V2P_block str r0, [sp, #12] - cbz r6, .L696 + cbz r6, .L680 bl IsBlkInVendorPart - cbnz r0, .L697 -.L696: + cbnz r0, .L681 +.L680: ldr r0, [sp, #12] bl FtlBbmIsBadBlock - cbnz r0, .L697 + cbnz r0, .L681 movs r3, #20 mla r1, r3, r5, fp ldr r3, [sp, #12] @@ -5395,15 +5297,15 @@ FtlLowFormatEraseBlock: bic r2, r2, #3 add r2, r2, r3 str r2, [r1, #12] -.L697: +.L681: add r8, r8, #1 - b .L695 -.L702: + b .L679 +.L686: mul r2, r3, r8 ldr r1, [fp] adds r0, r1, r2 ldr r2, [r1, r2] - cbz r2, .L701 + cbz r2, .L685 ldr r0, [r0, #4] adds r4, r4, #1 str r3, [sp, #12] @@ -5411,35 +5313,35 @@ FtlLowFormatEraseBlock: ubfx r0, r0, #10, #16 bl FtlBbmMapBadBlock ldr r3, [sp, #12] -.L701: +.L685: add r8, r8, #1 - b .L700 -.L706: - cbz r6, .L705 + b .L684 +.L690: + cbz r6, .L689 mul r3, fp, r7 ldr r2, [r8] adds r1, r2, r3 ldr r3, [r2, r3] - cbnz r3, .L705 + cbnz r3, .L689 ldr r0, [r1, #4] movs r1, #1 ubfx r0, r0, #10, #16 bl FtlFreeSysBlkQueueIn -.L705: +.L689: adds r7, r7, #1 - b .L704 -.L727: + b .L688 +.L711: .align 2 -.L726: - .word .LANCHOR99 - .word .LANCHOR79 - .word .LANCHOR3 - .word .LANCHOR110 - .word .LANCHOR115 - .word .LANCHOR24 - .word .LANCHOR20 +.L710: + .word .LANCHOR98 + .word .LANCHOR78 + .word .LANCHOR2 .word .LANCHOR109 - .word .LANCHOR13 + .word .LANCHOR114 + .word .LANCHOR23 + .word .LANCHOR19 + .word .LANCHOR108 + .word .LANCHOR12 .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock .section .text.FlashTestBlk,"ax",%progbits .align 1 @@ -5456,8 +5358,8 @@ FlashTestBlk: push {r4, r5, lr} mov r5, r0 sub sp, sp, #92 - bls .L731 - ldr r4, .L733 + bls .L715 + ldr r4, .L717 add r0, sp, #24 movs r2, #32 movs r1, #165 @@ -5481,7 +5383,7 @@ FlashTestBlk: mov r1, r3 bl FlashProgPages ldr r3, [sp, #4] - cbnz r3, .L732 + cbnz r3, .L716 adds r3, r5, #1 add r0, sp, #4 str r3, [sp, #8] @@ -5494,27 +5396,27 @@ FlashTestBlk: it ne movne r4, #1 negs r4, r4 -.L730: +.L714: movs r2, #1 movs r1, #0 add r0, sp, #4 str r5, [sp, #8] bl FlashEraseBlocks -.L728: +.L712: mov r0, r4 add sp, sp, #92 @ sp needed pop {r4, r5, pc} -.L732: +.L716: mov r4, #-1 - b .L730 -.L731: + b .L714 +.L715: movs r4, #0 - b .L728 -.L734: + b .L712 +.L718: .align 2 -.L733: - .word .LANCHOR112 +.L717: + .word .LANCHOR111 .size FlashTestBlk, .-FlashTestBlk .section .text.FtlBbmTblFlush,"ax",%progbits .align 1 @@ -5529,28 +5431,28 @@ FtlBbmTblFlush: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} movs r1, #0 - ldr r7, .L749 + ldr r7, .L733 movs r4, #0 - ldr r5, .L749+4 + ldr r5, .L733+4 ldr r3, [r7] - ldr fp, .L749+52 - ldr r6, .L749+8 + ldr fp, .L733+52 + ldr r6, .L733+8 str r3, [r5, #12] - ldr r3, .L749+12 + ldr r3, .L733+12 ldr r0, [fp] - ldr r8, .L749+56 + ldr r8, .L733+56 ldrh r2, [r3] str r0, [r5, #8] bl ftl_memset str r7, [sp, #12] - ldr r7, .L749+16 -.L736: + ldr r7, .L733+16 +.L720: ldrh r3, [r7] cmp r4, r3 - blt .L737 + blt .L721 ldr r6, [r5, #12] movs r2, #16 - ldr r4, .L749+20 + ldr r4, .L733+20 movs r1, #255 movs r7, #0 mov r0, r6 @@ -5567,13 +5469,13 @@ FtlBbmTblFlush: strh r3, [r6, #8] @ movhi ldrh r3, [r4, #6] strh r3, [r6, #10] @ movhi - ldr r3, .L749+24 + ldr r3, .L733+24 ldr r3, [r3] strh r3, [r6, #12] @ movhi - ldr r3, .L749+28 + ldr r3, .L733+28 ldr r3, [r3] strh r3, [r6, #14] @ movhi -.L738: +.L722: ldr r3, [fp] ldrh r2, [r4, #2] ldrh r1, [r4] @@ -5588,14 +5490,14 @@ FtlBbmTblFlush: str r3, [r5, #4] ldrh r3, [r4, #4] str r0, [sp] - ldr r0, .L749+32 + ldr r0, .L733+32 bl printf - ldr r3, .L749+36 + ldr r3, .L733+36 ldrh r2, [r4, #2] ldrh r3, [r3] subs r3, r3, #1 cmp r2, r3 - blt .L739 + blt .L723 ldr r3, [r4, #8] mov r1, #0 @ movhi ldrh r2, [r4] @@ -5606,7 +5508,7 @@ FtlBbmTblFlush: strh r2, [r6, #8] @ movhi ldrh r3, [r4, #4] strh r2, [r4, #4] @ movhi - ldr r2, .L749+40 + ldr r2, .L733+40 strh r3, [r4] @ movhi lsls r3, r3, #10 ldr r0, [r2] @@ -5615,9 +5517,9 @@ FtlBbmTblFlush: mov r1, r2 str r3, [r0, #4] bl FlashEraseBlocks -.L739: +.L723: movs r3, #1 - ldr r0, .L749+4 + ldr r0, .L733+4 mov r2, r3 mov r1, r3 bl FlashProgPages @@ -5626,21 +5528,21 @@ FtlBbmTblFlush: strh r3, [r10, #2] @ movhi ldr r3, [r5] adds r2, r3, #1 - bne .L740 + bne .L724 adds r7, r7, #1 ldr r1, [r5, #4] uxth r7, r7 - ldr r0, .L749+44 + ldr r0, .L733+44 bl printf cmp r7, #3 - bls .L738 + bls .L722 mov r2, r7 ldr r1, [r5, #4] - ldr r0, .L749+48 + ldr r0, .L733+48 bl printf -.L742: - b .L742 -.L737: +.L726: + b .L726 +.L721: ldrh r2, [r8] ldr r3, [r5, #8] ldr r1, [r6, #4]! @@ -5649,35 +5551,35 @@ FtlBbmTblFlush: adds r4, r4, #1 add r0, r3, r0, lsl #2 bl ftl_memcpy - b .L736 -.L740: + b .L720 +.L724: add r8, r8, #1 cmp r8, #1 - beq .L738 + beq .L722 cmp r3, #256 - beq .L738 + beq .L722 movs r0, #0 add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L750: +.L734: .align 2 -.L749: - .word .LANCHOR114 - .word .LANCHOR138 - .word .LANCHOR37+24 - .word .LANCHOR23 - .word .LANCHOR10 - .word .LANCHOR37 - .word .LANCHOR2 - .word .LANCHOR143 +.L733: + .word .LANCHOR113 + .word .LANCHOR137 + .word .LANCHOR36+24 + .word .LANCHOR22 + .word .LANCHOR9 + .word .LANCHOR36 + .word .LANCHOR1 + .word .LANCHOR142 .word .LC18 - .word .LANCHOR20 - .word .LANCHOR79 + .word .LANCHOR19 + .word .LANCHOR78 .word .LC19 .word .LC20 - .word .LANCHOR106 - .word .LANCHOR127 + .word .LANCHOR105 + .word .LANCHOR126 .size FtlBbmTblFlush, .-FtlBbmTblFlush .section .text.allocate_data_superblock,"ax",%progbits .align 1 @@ -5692,272 +5594,260 @@ allocate_data_superblock: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} mov r4, r0 -.L752: - ldr r3, .L791 - ldr r8, .L791+68 + ldr r10, .L774 +.L736: + ldr r3, .L774 + ldr r8, .L774+80 + ldr r7, .L774+4 ldrh r3, [r3] - ldr r10, .L791+72 ldrh r2, [r8] add r3, r3, r2 - ldrh r2, [r10] + ldrh r2, [r7] cmp r3, r2 - ble .L753 - mov r2, #2656 - ldr r1, .L791+4 - ldr r0, .L791+8 + ble .L737 + movw r2, #2660 + ldr r1, .L774+8 + ldr r0, .L774+12 bl printf -.L753: - ldr r3, .L791+12 +.L737: + ldr r3, .L774+16 cmp r4, r3 - bne .L779 - ldr r3, .L791 - ldr r2, .L791+16 - ldrh r3, [r3] + bne .L763 + ldr r2, .L774+20 + ldrh r3, [r10] ldr r2, [r2] lsrs r1, r3, #1 muls r2, r3, r2 adds r1, r1, #1 add r1, r1, r2, lsr #2 uxth r1, r1 - cbz r1, .L754 + cbz r1, .L738 subs r1, r1, #1 uxth r1, r1 -.L754: - ldr r0, .L791+20 +.L738: + ldr r0, .L774+24 bl List_pop_index_node - ldr r3, .L791 - mov r5, r0 - uxth r7, r0 - ldrh r3, [r3] - cbnz r3, .L755 - movw r2, #2665 - ldr r1, .L791+4 - ldr r0, .L791+8 - bl printf -.L755: - ldr r3, .L791 - ldr r2, .L791 - ldrh r3, [r3] - subs r3, r3, #1 - strh r3, [r2] @ movhi ldrh r3, [r10] - cmp r3, r7 - bls .L752 + mov r5, r0 + uxth fp, r0 + cbnz r3, .L739 + movw r2, #2669 + ldr r1, .L774+8 + ldr r0, .L774+12 + bl printf +.L739: + ldrh r3, [r10] + subs r3, r3, #1 + strh r3, [r10] @ movhi + ldrh r3, [r7] + cmp r3, fp + bls .L736 uxth r5, r5 lsls r3, r5, #1 str r3, [sp] - ldr r3, .L791+24 + ldr r3, .L774+28 ldr r3, [r3] ldrh r6, [r3, r5, lsl #1] cmp r6, #0 - bne .L752 - strh r7, [r4] @ movhi + bne .L736 + strh fp, [r4] @ movhi mov r0, r4 bl make_superblock ldrb r3, [r4, #7] @ zero_extendqisi2 - cbnz r3, .L757 - ldr r3, .L791+24 + cbnz r3, .L741 + ldr r3, .L774+28 movw r2, #65535 - mov r0, r7 + mov r0, fp ldr r3, [r3] strh r2, [r3, r5, lsl #1] @ movhi bl INSERT_DATA_LIST - ldr r3, .L791 ldrh r2, [r8] - ldrh r3, [r3] + ldrh r3, [r10] add r3, r3, r2 - ldrh r2, [r10] + ldrh r2, [r7] cmp r3, r2 - ble .L752 - movw r2, #2679 - ldr r1, .L791+4 - ldr r0, .L791+8 + ble .L736 + movw r2, #2683 + ldr r1, .L774+8 + ldr r0, .L774+12 bl printf - b .L752 -.L779: + b .L736 +.L763: movs r1, #0 - b .L754 -.L757: - ldr r3, .L791 + b .L738 +.L741: ldrh r2, [r8] - ldrh r3, [r3] + ldrh r3, [r10] add r3, r3, r2 - ldrh r2, [r10] + ldrh r2, [r7] cmp r3, r2 - ble .L759 - movw r2, #2682 - ldr r1, .L791+4 - ldr r0, .L791+8 + ble .L743 + movw r2, #2686 + ldr r1, .L774+8 + ldr r0, .L774+12 bl printf -.L759: - ldr r3, .L791+28 +.L743: + ldr r3, .L774+32 add lr, r4, #16 - ldr r2, .L791+32 + ldr r2, .L774+36 mov r8, #0 ldr ip, [r3] ldrh r0, [r2] movs r2, #20 + str r2, [sp, #4] mov r3, ip mla r0, r2, r0, ip -.L760: +.L744: cmp r0, r3 - bne .L762 - cbnz r6, .L763 - movw r2, #2693 - ldr r1, .L791+4 - ldr r0, .L791+8 + bne .L746 + cbnz r6, .L747 + movw r2, #2697 + ldr r1, .L774+8 + ldr r0, .L774+12 bl printf -.L763: - ldr r3, .L791+36 +.L747: + ldr r3, .L774+40 ldrh r3, [r3] - cmp r3, r7 - bne .L764 - movw r2, #2695 - ldr r1, .L791+4 - ldr r0, .L791+8 + cmp r3, fp + bne .L748 + movw r2, #2699 + ldr r1, .L774+8 + ldr r0, .L774+12 bl printf -.L764: - ldrb r2, [r4, #8] @ zero_extendqisi2 - ldr r3, .L791+40 - ldr fp, .L791+76 - ldr r8, .L791+80 - ldr r1, [r3] - cmp r2, #0 - bne .L765 - ldrh r2, [r1, r5, lsl #1] - cmp r2, #0 - beq .L766 - ldr r0, .L791+44 - ldrh r0, [r0] - add r2, r2, r0 -.L789: - strh r2, [r1, r5, lsl #1] @ movhi - mov r0, r7 - ldr r2, [fp] - movs r1, #0 - str r3, [sp, #4] - adds r2, r2, #1 - str r2, [fp] - bl ftl_set_blk_mode -.L790: - ldr r3, [sp, #4] - ldr r0, [fp] - ldr r3, [r3] - ldrh r1, [r3, r5, lsl #1] - ldr r3, .L791+48 - ldr r2, [r3] - cmp r1, r2 +.L748: + ldrb r3, [r4, #8] @ zero_extendqisi2 + ldr r0, .L774+44 + ldr ip, .L774+84 + ldr r1, .L774+48 + ldr r2, .L774+52 + ldr lr, [r0] + cmp r3, #0 + bne .L749 + ldrh r3, [lr, r5, lsl #1] + cmp r3, #0 + beq .L750 + ldrh r8, [ip] + add r3, r3, r8 +.L773: + strh r3, [lr, r5, lsl #1] @ movhi + ldr r3, [r1] + adds r3, r3, #1 + str r3, [r1] +.L752: + ldr r3, [r0] + ldr r0, .L774+56 + ldrh lr, [r3, r5, lsl #1] + ldr r3, [r0] + cmp lr, r3 + ldr r3, [r2] it hi - strhi r1, [r3] - ldr r3, .L791+44 - ldrh r1, [r10] - ldrh r2, [r3] - ldr r3, [r8] - mla r0, r0, r2, r3 + strhi lr, [r0] + ldrh r0, [ip] + ldr ip, [r1] + ldrh r1, [r7] + ldr r7, .L774+60 + mla r0, ip, r0, r3 bl __aeabi_uidiv - ldr r3, .L791+52 - ldr ip, .L791+84 + ldr r3, .L774+64 str r0, [r3] - ldr r3, .L791+56 + ldr r3, .L774+68 ldr r2, [r3] ldr r3, [r2, #16] adds r3, r3, #1 str r3, [r2, #16] movs r2, #20 - ldr r3, .L791+28 + ldr r3, .L774+32 ldr r0, [r3] adds r3, r0, #4 mla r2, r2, r6, r0 adds r2, r2, #24 -.L770: +.L754: adds r3, r3, #20 cmp r2, r3 - bne .L771 + bne .L755 + movs r7, #0 mov r2, r6 + mov r8, r7 ldrb r1, [r4, #8] @ zero_extendqisi2 - mov r8, #0 bl FlashEraseBlocks - mov r10, r8 - movs r3, #20 -.L772: - uxth r2, r8 - cmp r6, r2 - bhi .L774 - cmp r10, #0 - beq .L775 - mov r0, r7 +.L756: + uxth r3, r7 + cmp r6, r3 + bhi .L758 + cmp r8, #0 + beq .L759 + mov r0, fp bl update_multiplier_value bl FtlBbmTblFlush -.L775: +.L759: ldrb r2, [r4, #7] @ zero_extendqisi2 cmp r2, #0 - bne .L776 - ldr r3, .L791+24 + bne .L760 + ldr r3, .L774+28 movw r2, #65535 ldr r3, [r3] strh r2, [r3, r5, lsl #1] @ movhi - b .L752 -.L762: + b .L736 +.L746: ldrh r1, [lr], #2 - movw fp, #65535 + movw r2, #65535 str r8, [r3, #8] str r8, [r3, #12] - cmp r1, fp - beq .L761 - mla fp, r2, r6, ip - adds r6, r6, #1 + cmp r1, r2 + beq .L745 + ldr r2, [sp, #4] lsls r1, r1, #10 + mla r2, r2, r6, ip + adds r6, r6, #1 uxth r6, r6 - str r1, [fp, #4] -.L761: + str r1, [r2, #4] +.L745: adds r3, r3, #20 - b .L760 -.L766: - movs r2, #2 - b .L789 -.L765: - ldrh r2, [r1, r5, lsl #1] - mov r0, r7 - str r3, [sp, #4] - adds r2, r2, #1 - strh r2, [r1, r5, lsl #1] @ movhi - ldr r2, [r8] - adds r2, r2, #1 - str r2, [r8] - bl ftl_set_blk_mode.part.6 - b .L790 -.L771: + b .L744 +.L750: + movs r3, #2 + b .L773 +.L749: + ldrh r3, [lr, r5, lsl #1] + adds r3, r3, #1 + strh r3, [lr, r5, lsl #1] @ movhi + ldr r3, [r2] + adds r3, r3, #1 + str r3, [r2] + b .L752 +.L755: ldr r1, [r3, #-20] - and r1, r1, ip + ands r1, r1, r7 str r1, [r3, #-20] - b .L770 -.L774: - ldr r1, .L791+28 - mul r2, r3, r8 - ldr r1, [r1] - ldr fp, [r1, r2] - adds r0, r1, r2 - cmp fp, #-1 - bne .L773 - ldr r0, [r0, #4] - add r10, r10, #1 - str r3, [sp, #4] + b .L754 +.L758: + ldr r2, .L774+32 + movs r3, #20 + muls r3, r7, r3 + ldr r2, [r2] + adds r1, r2, r3 + ldr r2, [r2, r3] + adds r3, r2, #1 + bne .L757 + ldr r0, [r1, #4] + add r8, r8, #1 + str r2, [sp, #4] ubfx r0, r0, #10, #16 bl FtlBbmMapBadBlock - add r2, r4, r8, lsl #1 - ldr r3, [sp, #4] - strh fp, [r2, #16] @ movhi - ldrb r2, [r4, #7] @ zero_extendqisi2 - subs r2, r2, #1 - strb r2, [r4, #7] -.L773: - add r8, r8, #1 - b .L772 -.L776: - ldr r3, .L791+60 - ldr r1, .L791+64 + ldr r2, [sp, #4] + add r3, r4, r7, lsl #1 + strh r2, [r3, #16] @ movhi + ldrb r3, [r4, #7] @ zero_extendqisi2 + subs r3, r3, #1 + strb r3, [r4, #7] +.L757: + adds r7, r7, #1 + b .L756 +.L760: + ldr r3, .L774+72 + ldr r1, .L774+76 ldrh r3, [r3] - strh r7, [r4] @ movhi + strh fp, [r4] @ movhi smulbb r3, r3, r2 movs r2, #0 strh r2, [r4, #2] @ movhi @@ -5968,49 +5858,49 @@ allocate_data_superblock: str r2, [r4, #12] adds r2, r2, #1 str r2, [r1] - ldr r2, .L791+24 + ldr r2, .L774+28 ldr r1, [sp] ldr r2, [r2] strh r3, [r2, r1] @ movhi ldrh r3, [r4, #4] - cbz r3, .L777 + cbz r3, .L761 ldrb r3, [r4, #7] @ zero_extendqisi2 - cbnz r3, .L778 -.L777: - movw r2, #2748 - ldr r1, .L791+4 - ldr r0, .L791+8 + cbnz r3, .L762 +.L761: + mov r2, #2752 + ldr r1, .L774+8 + ldr r0, .L774+12 bl printf -.L778: +.L762: movs r0, #0 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L792: +.L775: .align 2 -.L791: - .word .LANCHOR48 - .word .LANCHOR144 - .word .LC1 - .word .LANCHOR53 - .word .LANCHOR95 - .word .LANCHOR46 - .word .LANCHOR42 - .word .LANCHOR79 - .word .LANCHOR3 - .word .LANCHOR145 +.L774: .word .LANCHOR47 - .word .LANCHOR14 - .word .LANCHOR92 + .word .LANCHOR4 .word .LANCHOR143 - .word .LANCHOR118 - .word .LANCHOR19 - .word .LANCHOR82 - .word .LANCHOR44 - .word .LANCHOR5 + .word .LC1 + .word .LANCHOR52 + .word .LANCHOR94 + .word .LANCHOR45 + .word .LANCHOR41 + .word .LANCHOR78 + .word .LANCHOR2 + .word .LANCHOR144 + .word .LANCHOR46 + .word .LANCHOR89 .word .LANCHOR90 .word .LANCHOR91 .word -1024 + .word .LANCHOR142 + .word .LANCHOR117 + .word .LANCHOR18 + .word .LANCHOR81 + .word .LANCHOR43 + .word .LANCHOR13 .size allocate_data_superblock, .-allocate_data_superblock .section .text.FtlGcFreeBadSuperBlk,"ax",%progbits .align 1 @@ -6025,43 +5915,43 @@ FtlGcFreeBadSuperBlk: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} mov r10, r0 - ldr r4, .L805 + ldr r4, .L788 ldrh r3, [r4] - cbz r3, .L794 - ldr r8, .L805+12 + cbz r3, .L777 + ldr r8, .L788+12 movs r7, #0 -.L795: - ldr r3, .L805+4 +.L778: + ldr r3, .L788+4 ldrh r2, [r3] uxth r3, r7 cmp r2, r3 - bhi .L801 + bhi .L784 bl FtlGcReFreshBadBlk -.L794: +.L777: movs r0, #0 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L801: - ldr r2, .L805+8 +.L784: + ldr r2, .L788+8 uxth r3, r7 mov r1, r10 mov fp, #0 ldrb r0, [r2, r3] @ zero_extendqisi2 bl V2P_block mov r1, r0 -.L796: +.L779: ldrh r3, [r4] uxth r5, fp cmp r3, r5 - bhi .L800 + bhi .L783 adds r7, r7, #1 - b .L795 -.L800: + b .L778 +.L783: uxth r6, fp ldrh r3, [r8, r6, lsl #1] cmp r3, r1 - bne .L797 + bne .L780 mov r0, r1 str r1, [sp, #4] bl FtlBbmMapBadBlock @@ -6069,27 +5959,27 @@ FtlGcFreeBadSuperBlk: ldrh r2, [r4] add r3, r8, r6, lsl #1 ldr r1, [sp, #4] -.L798: +.L781: cmp r5, r2 - bcc .L799 + bcc .L782 subs r2, r2, #1 strh r2, [r4] @ movhi -.L797: +.L780: add fp, fp, #1 - b .L796 -.L799: + b .L779 +.L782: ldrh r0, [r3, #2]! adds r5, r5, #1 uxth r5, r5 strh r0, [r3, #-2] @ movhi - b .L798 -.L806: + b .L781 +.L789: .align 2 -.L805: +.L788: + .word .LANCHOR73 + .word .LANCHOR2 + .word .LANCHOR12 .word .LANCHOR74 - .word .LANCHOR3 - .word .LANCHOR13 - .word .LANCHOR75 .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk .section .text.update_vpc_list,"ax",%progbits .align 1 @@ -6104,41 +5994,41 @@ update_vpc_list: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} mov r4, r0 - ldr r3, .L819 + ldr r3, .L802 ldr r3, [r3] ldrh r3, [r3, r0, lsl #1] cmp r3, #0 - bne .L808 - ldr r3, .L819+4 + bne .L791 + ldr r3, .L802+4 ldrh r2, [r3] cmp r2, r0 itt eq movweq r2, #65535 strheq r2, [r3] @ movhi - ldr r3, .L819+8 + ldr r3, .L802+8 ldrh r2, [r3] cmp r2, r0 itt eq movweq r2, #65535 strheq r2, [r3] @ movhi - ldr r3, .L819+12 + ldr r3, .L802+12 ldrh r2, [r3] cmp r2, r0 - bne .L811 + bne .L794 movw r2, #65535 strh r2, [r3] @ movhi -.L812: - ldr r5, .L819+16 +.L795: + ldr r5, .L802+16 mov r1, r4 - ldr r0, .L819+20 + ldr r0, .L802+20 bl List_remove_node ldrh r3, [r5] - cbnz r3, .L814 - movw r2, #2824 - ldr r1, .L819+24 - ldr r0, .L819+28 + cbnz r3, .L797 + movw r2, #2828 + ldr r1, .L802+24 + ldr r0, .L802+28 bl printf -.L814: +.L797: ldrh r3, [r5] mov r0, r4 subs r3, r3, #1 @@ -6146,56 +6036,56 @@ update_vpc_list: bl free_data_superblock mov r0, r4 bl FtlGcFreeBadSuperBlk - ldr r3, .L819+32 + ldr r3, .L802+32 ldrh r2, [r5] ldrh r3, [r3] add r3, r3, r2 - ldr r2, .L819+36 + ldr r2, .L802+36 ldrh r2, [r2] cmp r3, r2 - ble .L818 - movw r2, #2827 - ldr r1, .L819+24 - ldr r0, .L819+28 + ble .L801 + movw r2, #2831 + ldr r1, .L802+24 + ldr r0, .L802+28 bl printf -.L818: +.L801: movs r0, #1 pop {r3, r4, r5, pc} -.L811: - ldr r3, .L819+40 +.L794: + ldr r3, .L802+40 ldrh r3, [r3] cmp r3, r0 - beq .L817 - ldr r3, .L819+44 + beq .L800 + ldr r3, .L802+44 ldrh r3, [r3] cmp r3, r0 - beq .L817 - ldr r3, .L819+48 + beq .L800 + ldr r3, .L802+48 ldrh r3, [r3] cmp r3, r0 - bne .L812 -.L817: + bne .L795 +.L800: movs r0, #0 pop {r3, r4, r5, pc} -.L808: +.L791: bl List_update_data_list - b .L817 -.L820: + b .L800 +.L803: .align 2 -.L819: - .word .LANCHOR42 - .word .LANCHOR72 - .word .LANCHOR73 - .word .LANCHOR145 - .word .LANCHOR44 +.L802: .word .LANCHOR41 - .word .LANCHOR146 + .word .LANCHOR71 + .word .LANCHOR72 + .word .LANCHOR144 + .word .LANCHOR43 + .word .LANCHOR40 + .word .LANCHOR145 .word .LC1 - .word .LANCHOR48 - .word .LANCHOR5 + .word .LANCHOR47 + .word .LANCHOR4 + .word .LANCHOR50 .word .LANCHOR51 .word .LANCHOR52 - .word .LANCHOR53 .size update_vpc_list, .-update_vpc_list .section .text.decrement_vpc_count,"ax",%progbits .align 1 @@ -6212,47 +6102,47 @@ decrement_vpc_count: push {r4, r5, r6, lr} cmp r0, r3 mov r4, r0 - beq .L822 - ldr r5, .L830 + beq .L805 + ldr r5, .L813 ldr r3, [r5] ldrh r2, [r3, r0, lsl #1] - cbnz r2, .L823 + cbnz r2, .L806 mov r1, r0 - ldr r0, .L830+4 + ldr r0, .L813+4 bl printf ldr r3, [r5] ldrh r5, [r3, r4, lsl #1] - cbz r5, .L824 -.L828: + cbz r5, .L807 +.L811: movs r5, #0 -.L821: +.L804: mov r0, r5 pop {r4, r5, r6, pc} -.L824: - movw r2, #2842 -.L829: - ldr r1, .L830+8 - ldr r0, .L830+12 +.L807: + movw r2, #2846 +.L812: + ldr r1, .L813+8 + ldr r0, .L813+12 bl printf - b .L821 -.L823: + b .L804 +.L806: subs r2, r2, #1 strh r2, [r3, r0, lsl #1] @ movhi -.L822: - ldr r6, .L830+16 +.L805: + ldr r6, .L813+16 movw r3, #65535 ldrh r0, [r6] cmp r0, r3 - bne .L826 + bne .L809 strh r4, [r6] @ movhi - b .L828 -.L826: + b .L811 +.L809: cmp r4, r0 - beq .L828 + beq .L811 bl update_vpc_list - ldr r3, .L830+20 + ldr r3, .L813+20 adds r5, r0, #0 - ldr r2, .L830+24 + ldr r2, .L813+24 it ne movne r5, #1 strh r4, [r6] @ movhi @@ -6260,28 +6150,28 @@ decrement_vpc_count: ldr r2, [r2] subs r3, r3, r2 asrs r2, r3, #1 - ldr r3, .L830+28 + ldr r3, .L813+28 muls r3, r2, r3 - ldr r2, .L830 + ldr r2, .L813 ldr r2, [r2] uxth r1, r3 ldrh r2, [r2, r1, lsl #1] cmp r2, #0 - bne .L821 + bne .L804 cmp r4, r1 - beq .L821 - movw r2, #2858 - b .L829 -.L831: + beq .L804 + movw r2, #2862 + b .L812 +.L814: .align 2 -.L830: - .word .LANCHOR42 - .word .LC21 - .word .LANCHOR147 - .word .LC1 - .word .LANCHOR131 +.L813: .word .LANCHOR41 + .word .LC21 + .word .LANCHOR146 + .word .LC1 + .word .LANCHOR130 .word .LANCHOR40 + .word .LANCHOR39 .word -1431655765 .size decrement_vpc_count, .-decrement_vpc_count .section .text.FtlSuperblockPowerLostFix,"ax",%progbits @@ -6298,14 +6188,14 @@ FtlSuperblockPowerLostFix: push {r4, r5, r6, r7, r8, lr} mov r3, #-1 sub sp, sp, #24 - ldr r2, .L845 + ldr r2, .L828 movs r6, #0 mov r4, r0 str r3, [sp, #20] - ldr r3, .L845+4 + ldr r3, .L828+4 ldr r5, [r2] mvn r2, #2 - ldr r8, .L845+16 + ldr r8, .L828+16 ldr r3, [r3] str r5, [sp, #16] str r3, [sp, #12] @@ -6326,18 +6216,18 @@ FtlSuperblockPowerLostFix: ite eq moveq r7, #6 movne r7, #7 -.L838: +.L821: ldrh r3, [r4, #4] - cbnz r3, .L834 -.L835: - ldr r3, .L845+8 + cbnz r3, .L817 +.L818: + ldr r3, .L828+8 ldrh r1, [r4] ldrh r0, [r4, #4] ldr r2, [r3] ldrh r3, [r2, r1, lsl #1] subs r3, r3, r0 strh r3, [r2, r1, lsl #1] @ movhi - ldr r3, .L845+12 + ldr r3, .L828+12 ldrh r3, [r3] strh r3, [r4, #2] @ movhi movs r3, #0 @@ -6346,12 +6236,12 @@ FtlSuperblockPowerLostFix: add sp, sp, #24 @ sp needed pop {r4, r5, r6, r7, r8, pc} -.L834: +.L817: mov r0, r4 bl get_new_active_ppa str r0, [sp, #8] adds r0, r0, #1 - beq .L835 + beq .L818 ldr r3, [r8] movs r1, #1 add r0, sp, #4 @@ -6367,16 +6257,16 @@ FtlSuperblockPowerLostFix: ldrh r0, [r4] bl decrement_vpc_count subs r7, r7, #1 - bne .L838 - b .L835 -.L846: + bne .L821 + b .L818 +.L829: .align 2 -.L845: - .word .LANCHOR114 - .word .LANCHOR106 - .word .LANCHOR42 - .word .LANCHOR19 - .word .LANCHOR83 +.L828: + .word .LANCHOR113 + .word .LANCHOR105 + .word .LANCHOR41 + .word .LANCHOR18 + .word .LANCHOR82 .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix .section .text.FtlMakeBbt,"ax",%progbits .align 1 @@ -6391,61 +6281,61 @@ FtlMakeBbt: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} movs r6, #0 - ldr r7, .L866 + ldr r7, .L849 bl FtlBbtMemInit sub r8, r7, #18 bl FtlLoadFactoryBbt -.L848: - ldr r3, .L866+4 +.L831: + ldr r3, .L849+4 ldrh r3, [r3] cmp r6, r3 - bcc .L854 - ldr r5, .L866+8 + bcc .L837 + ldr r5, .L849+8 movs r4, #0 -.L855: +.L838: ldrh r3, [r5] uxth r0, r4 adds r4, r4, #1 cmp r3, r0 - bhi .L856 - ldr r4, .L866+12 + bhi .L839 + ldr r4, .L849+12 movw r6, #65535 ldrh r5, [r4, #12] subs r5, r5, #1 uxth r5, r5 -.L857: +.L840: ldrh r3, [r4, #12] subs r3, r3, #47 cmp r3, r5 - bgt .L861 + bgt .L844 mov r0, r5 bl FtlBbmIsBadBlock cmp r0, #1 - beq .L858 + beq .L841 mov r0, r5 bl FlashTestBlk cmp r0, #0 - beq .L859 + beq .L842 mov r0, r5 bl FtlBbmMapBadBlock -.L858: +.L841: subs r5, r5, #1 uxth r5, r5 - b .L857 -.L854: - ldr r3, .L866+16 - ldr r5, .L866+20 + b .L840 +.L837: + ldr r3, .L849+16 + ldr r5, .L849+20 ldrh r2, [r8, #2]! - ldr r4, .L866+24 + ldr r4, .L849+24 ldr r0, [r3] movw r3, #65535 ldr r10, [r5] cmp r2, r3 mov fp, r4 - ldr r3, .L866+28 + ldr r3, .L849+28 str r0, [r4, #8] str r10, [r4, #12] - beq .L849 + beq .L832 ldrh r5, [r3] mov r0, r4 str r3, [sp] @@ -6462,13 +6352,13 @@ FtlMakeBbt: adds r2, r2, #7 asrs r2, r2, #3 bl ftl_memcpy -.L850: +.L833: uxth r0, r5 adds r6, r6, #1 adds r7, r7, #4 bl FtlBbmMapBadBlock - b .L848 -.L849: + b .L831 +.L832: mov r1, r6 str r3, [sp] bl FlashGetBadBlockList @@ -6480,21 +6370,21 @@ FtlMakeBbt: ldrh r4, [r3] subs r4, r4, #1 uxth r4, r4 -.L851: +.L834: ldr r3, [sp] ldrh r0, [r3] smlabb r0, r0, r6, r4 uxth r0, r0 bl FtlBbmIsBadBlock cmp r0, #1 - beq .L852 + beq .L835 ldr r3, [sp, #4] movs r2, #16 movs r1, #0 strh r4, [r8] @ movhi ldr r0, [r3] bl ftl_memset - ldr r3, .L866+16 + ldr r3, .L849+16 mov r2, #4096 movs r1, #0 ldr r0, [r3] @@ -6512,42 +6402,42 @@ FtlMakeBbt: mla r5, r6, r5, r3 lsls r3, r5, #10 str r3, [fp, #4] - ldr r3, .L866+32 + ldr r3, .L849+32 ldrh r2, [r3] lsls r2, r2, #2 bl ftl_memcpy movs r2, #1 - ldr r0, .L866+24 + ldr r0, .L849+24 mov r1, r2 bl FlashEraseBlocks movs r3, #1 - ldr r0, .L866+24 + ldr r0, .L849+24 mov r2, r3 mov r1, r3 bl FlashProgPages ldr r3, [fp] adds r3, r3, #1 - bne .L850 + bne .L833 uxth r0, r5 bl FtlBbmMapBadBlock - b .L851 -.L852: + b .L834 +.L835: subs r4, r4, #1 uxth r4, r4 - b .L851 -.L856: + b .L834 +.L839: bl FtlBbmMapBadBlock - b .L855 -.L859: + b .L838 +.L842: ldrh r3, [r4] cmp r3, r6 - bne .L860 + bne .L843 strh r5, [r4] @ movhi - b .L858 -.L860: + b .L841 +.L843: strh r5, [r4, #4] @ movhi -.L861: - ldr r3, .L866+36 +.L844: + ldr r3, .L849+36 movs r5, #0 str r5, [r4, #8] movs r1, #1 @@ -6579,19 +6469,19 @@ FtlMakeBbt: add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L867: +.L850: .align 2 -.L866: - .word .LANCHOR37+28 - .word .LANCHOR10 - .word .LANCHOR25 - .word .LANCHOR37 - .word .LANCHOR106 - .word .LANCHOR114 - .word .LANCHOR138 - .word .LANCHOR17 - .word .LANCHOR127 - .word .LANCHOR79 +.L849: + .word .LANCHOR36+28 + .word .LANCHOR9 + .word .LANCHOR24 + .word .LANCHOR36 + .word .LANCHOR105 + .word .LANCHOR113 + .word .LANCHOR137 + .word .LANCHOR16 + .word .LANCHOR126 + .word .LANCHOR78 .size FtlMakeBbt, .-FtlMakeBbt .section .text.ftl_memcmp,"ax",%progbits .align 1 @@ -6618,24 +6508,24 @@ ftl_memcmp: js_hash: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L872 + ldr r3, .L855 add r1, r1, r0 push {r4, lr} -.L870: +.L853: cmp r0, r1 - bne .L871 + bne .L854 mov r0, r3 pop {r4, pc} -.L871: +.L854: lsrs r2, r3, #2 ldrb r4, [r0], #1 @ zero_extendqisi2 add r2, r2, r3, lsl #5 add r2, r2, r4 eors r3, r3, r2 - b .L870 -.L873: + b .L853 +.L856: .align 2 -.L872: +.L855: .word 1204201446 .size js_hash, .-js_hash .section .text.Ftl_write_map_blk_to_last_page,"ax",%progbits @@ -6655,14 +6545,14 @@ Ftl_write_map_blk_to_last_page: mov r4, r0 ldr r5, [r0, #12] cmp r3, r2 - bne .L875 + bne .L858 ldrh r3, [r0, #8] - cbz r3, .L876 + cbz r3, .L859 movw r2, #641 - ldr r1, .L884 - ldr r0, .L884+4 + ldr r1, .L867 + ldr r0, .L867+4 bl printf -.L876: +.L859: ldrh r3, [r4, #8] adds r3, r3, #1 strh r3, [r4, #8] @ movhi @@ -6674,20 +6564,20 @@ Ftl_write_map_blk_to_last_page: ldr r3, [r4, #28] adds r3, r3, #1 str r3, [r4, #28] -.L877: +.L860: movs r0, #0 pop {r3, r4, r5, r6, r7, r8, r10, pc} -.L875: +.L858: ldrh r7, [r5, r3, lsl #1] movs r1, #255 ldrh r3, [r0, #2] - ldr r6, .L884+8 - ldr r10, .L884+24 + ldr r6, .L867+8 + ldr r10, .L867+24 ldr r8, [r0, #24] orr r3, r3, r7, lsl #10 ldr r0, [r10] str r3, [r6, #4] - ldr r3, .L884+12 + ldr r3, .L867+12 str r0, [r6, #8] ldr r5, [r3] ldr r3, [r4, #28] @@ -6698,7 +6588,7 @@ Ftl_write_map_blk_to_last_page: ldrh r3, [r4, #4] strh r7, [r5, #2] @ movhi strh r3, [r5] @ movhi - ldr r3, .L884+16 + ldr r3, .L867+16 ldrh r2, [r3] lsls r2, r2, #3 bl ftl_memset @@ -6706,11 +6596,11 @@ Ftl_write_map_blk_to_last_page: movs r3, #0 ldr r1, [r10] mov r2, r3 -.L878: +.L861: uxth r0, r3 cmp ip, r0 - bhi .L880 - ldr r3, .L884+20 + bhi .L863 + ldr r3, .L867+20 ldr r0, [r6, #8] ldrh r1, [r3] bl js_hash @@ -6718,37 +6608,37 @@ Ftl_write_map_blk_to_last_page: str r0, [r5, #12] movs r3, #0 mov r1, r2 - ldr r0, .L884+8 + ldr r0, .L867+8 bl FlashProgPages ldrh r3, [r4, #2] mov r0, r4 adds r3, r3, #1 strh r3, [r4, #2] @ movhi bl ftl_map_blk_gc - b .L877 -.L880: + b .L860 +.L863: ldr r0, [r8, r3, lsl #2] cmp r7, r0, lsr #10 - bne .L879 + bne .L862 adds r2, r2, #1 uxth r2, r2 str r3, [r1, r2, lsl #3] add lr, r1, r2, lsl #3 ldr r0, [r8, r3, lsl #2] str r0, [lr, #4] -.L879: +.L862: adds r3, r3, #1 - b .L878 -.L885: + b .L861 +.L868: .align 2 -.L884: - .word .LANCHOR148 +.L867: + .word .LANCHOR147 .word .LC1 - .word .LANCHOR138 - .word .LANCHOR114 - .word .LANCHOR20 - .word .LANCHOR23 - .word .LANCHOR106 + .word .LANCHOR137 + .word .LANCHOR113 + .word .LANCHOR19 + .word .LANCHOR22 + .word .LANCHOR105 .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page .section .text.FtlMapWritePage,"ax",%progbits .align 1 @@ -6763,13 +6653,13 @@ FtlMapWritePage: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} mov r4, r0 - ldr r8, .L910+32 + ldr r8, .L893+32 mov r7, r1 movs r6, #0 str r2, [sp] mov fp, r8 -.L887: - ldr r2, .L910 +.L870: + ldr r2, .L893 ldr r3, [r2] adds r3, r3, #1 str r3, [r2] @@ -6777,44 +6667,44 @@ FtlMapWritePage: ldrh r2, [r4, #2] subs r3, r3, #1 cmp r2, r3 - bge .L888 + bge .L871 ldrh r2, [r4] movw r3, #65535 cmp r2, r3 - bne .L889 -.L888: + bne .L872 +.L871: mov r0, r4 bl Ftl_write_map_blk_to_last_page -.L889: +.L872: ldrh r2, [r4] ldr r3, [r4, #12] ldrh r3, [r3, r2, lsl #1] - cbnz r3, .L890 + cbnz r3, .L873 mov r2, #700 - ldr r1, .L910+4 - ldr r0, .L910+8 + ldr r1, .L893+4 + ldr r0, .L893+8 bl printf -.L890: +.L873: ldrh r2, [r4] ldrh r3, [r4, #10] cmp r2, r3 - bcc .L891 + bcc .L874 movw r2, #701 - ldr r1, .L910+4 - ldr r0, .L910+8 + ldr r1, .L893+4 + ldr r0, .L893+8 bl printf -.L891: +.L874: ldrh r2, [r4] movs r1, #0 ldr r3, [r4, #12] - ldr r5, .L910+12 + ldr r5, .L893+12 ldrh r3, [r3, r2, lsl #1] ldrh r2, [r4, #2] str r3, [sp, #4] orr r2, r2, r3, lsl #10 ldr r3, [sp] str r2, [r5, #4] - ldr r2, .L910+16 + ldr r2, .L893+16 str r3, [r5, #8] ldr r0, [r2] movs r2, #16 @@ -6827,7 +6717,7 @@ FtlMapWritePage: str r1, [r10, #4] ldrh r1, [r4, #4] strh r3, [r10, #2] @ movhi - ldr r3, .L910+20 + ldr r3, .L893+20 strh r1, [r10] @ movhi strh r7, [r10, #8] @ movhi ldrh r1, [r3] @@ -6844,10 +6734,10 @@ FtlMapWritePage: uxth r2, r2 adds r3, r1, #1 strh r2, [r4, #2] @ movhi - bne .L892 + bne .L875 ldr r1, [r5, #4] adds r6, r6, #1 - ldr r0, .L910+24 + ldr r0, .L893+24 uxth r6, r6 bl printf ldrh r2, [r4, #2] @@ -6857,49 +6747,49 @@ FtlMapWritePage: addls r2, r2, #-1 strhls r2, [r4, #2] @ movhi cmp r6, #3 - bls .L894 + bls .L877 mov r2, r6 ldr r1, [r5, #4] - ldr r0, .L910+28 + ldr r0, .L893+28 bl printf -.L895: - b .L895 -.L894: +.L878: + b .L878 +.L877: ldr r3, [r4, #32] cmp r3, #0 - beq .L887 -.L909: - b .L909 + beq .L870 .L892: + b .L892 +.L875: cmp r2, #1 - beq .L898 + beq .L881 cmp r1, #256 - beq .L898 + beq .L881 ldr r0, [r4, #36] - cbz r0, .L899 -.L898: + cbz r0, .L882 +.L881: movs r3, #0 str r3, [r4, #36] - b .L887 -.L899: + b .L870 +.L882: ldr r2, [r5, #4] ldr r3, [r4, #24] str r2, [r3, r7, lsl #2] add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L911: +.L894: .align 2 -.L910: - .word .LANCHOR88 - .word .LANCHOR149 +.L893: + .word .LANCHOR87 + .word .LANCHOR148 .word .LC1 - .word .LANCHOR138 - .word .LANCHOR114 - .word .LANCHOR23 + .word .LANCHOR137 + .word .LANCHOR113 + .word .LANCHOR22 .word .LC22 .word .LC23 - .word .LANCHOR20 + .word .LANCHOR19 .size FtlMapWritePage, .-FtlMapWritePage .section .text.load_l2p_region,"ax",%progbits .align 1 @@ -6912,31 +6802,31 @@ FtlMapWritePage: load_l2p_region: @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L919 + ldr r3, .L902 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} mov r5, r0 mov r10, r1 ldrh r2, [r3] str r3, [sp, #4] cmp r2, r0 - bcs .L913 + bcs .L896 movw r2, #485 - ldr r1, .L919+4 - ldr r0, .L919+8 + ldr r1, .L902+4 + ldr r0, .L902+8 bl printf -.L913: - ldr fp, .L919+48 +.L896: + ldr fp, .L902+48 movs r4, #12 - ldr r7, .L919+12 + ldr r7, .L902+12 ldr r3, [fp] ldr r8, [r3, r5, lsl #2] cmp r8, #0 - bne .L914 + bne .L897 mul r4, r4, r10 ldr r2, [r7] movs r1, #255 adds r0, r2, r4 - ldr r2, .L919+16 + ldr r2, .L902+16 ldr r0, [r0, #8] ldrh r2, [r2] bl ftl_memset @@ -6944,21 +6834,21 @@ load_l2p_region: adds r1, r2, r4 strh r5, [r2, r4] @ movhi str r8, [r1, #4] -.L915: +.L898: movs r0, #0 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L914: +.L897: mul r4, r4, r10 ldr r2, [r7] - ldr r6, .L919+20 + ldr r6, .L902+20 add r2, r2, r4 mov r0, r6 ldr r2, [r2, #8] str r8, [r6, #4] str r2, [r6, #8] - ldr r2, .L919+24 + ldr r2, .L902+24 ldr r2, [r2] str r2, [r6, #12] movs r2, #1 @@ -6967,68 +6857,68 @@ load_l2p_region: ldr r10, [r6, #12] ldrh r2, [r10, #8] cmp r2, r5 - beq .L916 + beq .L899 mov r2, r8 mov r1, r5 - ldr r0, .L919+28 + ldr r0, .L902+28 bl printf movs r3, #4 ldr r1, [r6, #12] mov r2, r3 - ldr r0, .L919+32 + ldr r0, .L902+32 bl rknand_print_hex ldr r3, [sp, #4] movs r2, #4 ldr r1, [fp] - ldr r0, .L919+36 + ldr r0, .L902+36 ldrh r3, [r3] bl rknand_print_hex -.L917: +.L900: ldrh r3, [r10, #8] cmp r3, r5 - beq .L918 + beq .L901 mov r2, #508 - ldr r1, .L919+4 - ldr r0, .L919+8 + ldr r1, .L902+4 + ldr r0, .L902+8 bl printf -.L918: +.L901: ldr r3, [r7] movs r1, #0 adds r2, r3, r4 str r1, [r2, #4] strh r5, [r3, r4] @ movhi - b .L915 -.L916: + b .L898 +.L899: ldr r2, [r6] cmp r2, #256 - bne .L917 + bne .L900 mov r2, r8 mov r1, r5 - ldr r0, .L919+40 + ldr r0, .L902+40 bl printf ldr r3, [r7] mov r1, r5 - ldr r0, .L919+44 + ldr r0, .L902+44 add r3, r3, r4 ldr r2, [r3, #8] bl FtlMapWritePage - b .L917 -.L920: + b .L900 +.L903: .align 2 -.L919: - .word .LANCHOR32 - .word .LANCHOR150 +.L902: + .word .LANCHOR31 + .word .LANCHOR149 .word .LC1 - .word .LANCHOR55 - .word .LANCHOR23 - .word .LANCHOR138 - .word .LANCHOR114 + .word .LANCHOR54 + .word .LANCHOR22 + .word .LANCHOR137 + .word .LANCHOR113 .word .LC24 .word .LC13 .word .LC25 .word .LC26 - .word .LANCHOR129 - .word .LANCHOR124 + .word .LANCHOR128 + .word .LANCHOR123 .size load_l2p_region, .-load_l2p_region .section .text.ftl_map_blk_gc,"ax",%progbits .align 1 @@ -7051,13 +6941,13 @@ ftl_map_blk_gc: ldrh r2, [r4, #8] subs r3, r3, #5 cmp r2, r3 - blt .L922 + blt .L905 uxth r0, r0 ldrh r8, [r5, r0, lsl #1] cmp r8, #0 - beq .L922 + beq .L905 ldr r3, [r4, #32] - cbnz r3, .L922 + cbnz r3, .L905 movs r2, #1 str r2, [r4, #32] strh r3, [r5, r0, lsl #1] @ movhi @@ -7065,39 +6955,39 @@ ftl_map_blk_gc: ldrh r2, [r4, #2] subs r3, r3, #1 strh r3, [r4, #8] @ movhi - ldr r3, .L937 + ldr r3, .L920 ldrh r3, [r3] cmp r2, r3 - bcc .L923 + bcc .L906 mov r0, r4 bl ftl_map_blk_alloc_new_blk -.L923: - ldr r5, .L937+4 +.L906: + ldr r5, .L920+4 movs r6, #0 -.L924: +.L907: ldrh r3, [r4, #6] uxth r10, r6 cmp r3, r10 - bhi .L931 + bhi .L914 movs r1, #1 mov r0, r8 bl FtlFreeSysBlkQueueIn movs r3, #0 str r3, [r4, #32] -.L922: - ldr r3, .L937 +.L905: + ldr r3, .L920 ldrh r2, [r4, #2] ldrh r3, [r3] cmp r2, r3 - bcc .L932 + bcc .L915 mov r0, r4 bl ftl_map_blk_alloc_new_blk -.L932: +.L915: movs r0, #0 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L931: +.L914: ldr r3, [sp] uxth fp, r6 add r3, r3, fp, lsl #2 @@ -7105,58 +6995,58 @@ ftl_map_blk_gc: ldr r3, [sp] ldr r2, [r3, fp, lsl #2] cmp r8, r2, lsr #10 - bne .L925 - ldr r3, .L937+8 + bne .L908 + ldr r3, .L920+8 str r2, [r5, #4] movs r2, #1 - ldr r0, .L937+4 + ldr r0, .L920+4 ldr r1, [r3] str r1, [r5, #8] - ldr r1, .L937+12 + ldr r1, .L920+12 ldr r7, [r1] mov r1, r2 str r7, [r5, #12] bl FlashReadPages ldrh r2, [r7, #8] cmp r2, r10 - beq .L926 + beq .L909 movw r2, #611 - ldr r1, .L937+16 - ldr r0, .L937+20 + ldr r1, .L920+16 + ldr r0, .L920+20 bl printf -.L926: +.L909: ldr r2, [r5] adds r2, r2, #1 - bne .L927 -.L929: + bne .L910 +.L912: ldr r2, [sp, #4] movs r3, #0 str r3, [r2] -.L928: - b .L928 -.L927: +.L911: + b .L911 +.L910: ldrh r2, [r7, #8] cmp r2, r10 - bne .L929 + bne .L912 ldrh r1, [r7] ldrh r2, [r4, #4] cmp r1, r2 - bne .L929 + bne .L912 ldr r2, [r5, #8] mov r1, fp mov r0, r4 bl FtlMapWritePage -.L925: +.L908: adds r6, r6, #1 - b .L924 -.L938: + b .L907 +.L921: .align 2 -.L937: - .word .LANCHOR20 - .word .LANCHOR138 - .word .LANCHOR107 - .word .LANCHOR114 - .word .LANCHOR151 +.L920: + .word .LANCHOR19 + .word .LANCHOR137 + .word .LANCHOR106 + .word .LANCHOR113 + .word .LANCHOR150 .word .LC1 .size ftl_map_blk_gc, .-ftl_map_blk_gc .section .text.flush_l2p_region,"ax",%progbits @@ -7172,9 +7062,9 @@ flush_l2p_region: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} movs r4, #12 - ldr r5, .L940 + ldr r5, .L923 muls r4, r0, r4 - ldr r0, .L940+4 + ldr r0, .L923+4 ldr r3, [r5] adds r2, r3, r4 ldrh r1, [r3, r4] @@ -7187,11 +7077,11 @@ flush_l2p_region: bic r3, r3, #-2147483648 str r3, [r4, #4] pop {r3, r4, r5, pc} -.L941: +.L924: .align 2 -.L940: - .word .LANCHOR55 - .word .LANCHOR129 +.L923: + .word .LANCHOR54 + .word .LANCHOR128 .size flush_l2p_region, .-flush_l2p_region .section .text.l2p_flush,"ax",%progbits .align 1 @@ -7206,32 +7096,32 @@ l2p_flush: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, lr} movs r4, #0 - ldr r5, .L946 - ldr r6, .L946+4 -.L943: + ldr r5, .L929 + ldr r6, .L929+4 +.L926: ldrh r3, [r5] uxth r0, r4 cmp r3, r0 - bhi .L945 + bhi .L928 movs r0, #0 pop {r4, r5, r6, pc} -.L945: +.L928: ldr r2, [r6] uxth r3, r4 movs r1, #12 mla r3, r1, r3, r2 ldr r3, [r3, #4] cmp r3, #0 - bge .L944 + bge .L927 bl flush_l2p_region -.L944: +.L927: adds r4, r4, #1 - b .L943 -.L947: + b .L926 +.L930: .align 2 -.L946: - .word .LANCHOR33 - .word .LANCHOR55 +.L929: + .word .LANCHOR32 + .word .LANCHOR54 .size l2p_flush, .-l2p_flush .section .text.log2phys,"ax",%progbits .align 1 @@ -7246,36 +7136,36 @@ log2phys: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} mov r7, r2 - ldr r4, .L961 + ldr r4, .L944 mov r10, r0 mov r5, r1 - ldr r3, .L961+4 + ldr r3, .L944+4 ldr r2, [r4] ldrh fp, [r3] cmp r0, r2 - bcc .L949 + bcc .L932 movw r2, #813 - ldr r1, .L961+8 - ldr r0, .L961+12 + ldr r1, .L944+8 + ldr r0, .L944+12 bl printf -.L949: +.L932: ldr r3, [r4] cmp r10, r3 - bcs .L950 - ldr r3, .L961+16 + bcs .L933 + ldr r3, .L944+16 add fp, fp, #7 lsr r6, r10, fp movs r2, #0 ldrh r1, [r3] uxth r6, r6 - ldr r3, .L961+20 + ldr r3, .L944+20 ldr r0, [r3] mov r8, r3 movs r3, #12 -.L951: +.L934: uxth r4, r2 cmp r4, r1 - bcc .L956 + bcc .L939 str r3, [sp, #4] bl select_l2p_ram_region ldr r3, [sp, #4] @@ -7286,31 +7176,31 @@ log2phys: ldrh r2, [r2, r3] movw r3, #65535 cmp r2, r3 - beq .L957 + beq .L940 ldr r3, [r1, #4] cmp r3, #0 - bge .L957 + bge .L940 bl flush_l2p_region -.L957: +.L940: mov r1, r4 mov r0, r6 bl load_l2p_region - b .L953 -.L950: + b .L936 +.L933: mov r0, #-1 - cbnz r7, .L948 + cbnz r7, .L931 str r0, [r5] -.L948: +.L931: add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L956: +.L939: adds r2, r2, #1 mla ip, r3, r2, r0 ldrh ip, [ip, #-12] cmp ip, r6 - bne .L951 -.L953: + bne .L934 +.L936: movs r0, #1 ldr r2, [r8] lsl r0, r0, fp @@ -7319,42 +7209,42 @@ log2phys: and r0, r0, r10 uxth r0, r0 mla r3, r3, r4, r2 - cbnz r7, .L954 + cbnz r7, .L937 ldr r3, [r3, #8] ldr r3, [r3, r0, lsl #2] str r3, [r5] -.L955: +.L938: ldr r2, [r8] movs r3, #12 mla r4, r3, r4, r2 ldr r3, [r4, #4] adds r2, r3, #1 - beq .L959 + beq .L942 adds r3, r3, #1 str r3, [r4, #4] -.L959: +.L942: movs r0, #0 - b .L948 -.L954: + b .L931 +.L937: ldr r1, [r5] ldr r2, [r3, #8] str r1, [r2, r0, lsl #2] ldr r2, [r3, #4] orr r2, r2, #-2147483648 str r2, [r3, #4] - ldr r3, .L961+24 + ldr r3, .L944+24 strh r6, [r3] @ movhi - b .L955 -.L962: + b .L938 +.L945: .align 2 -.L961: +.L944: + .word .LANCHOR151 + .word .LANCHOR21 .word .LANCHOR152 - .word .LANCHOR22 - .word .LANCHOR153 .word .LC1 - .word .LANCHOR33 + .word .LANCHOR32 + .word .LANCHOR54 .word .LANCHOR55 - .word .LANCHOR56 .size log2phys, .-log2phys .section .text.FtlReUsePrevPpa,"ax",%progbits .align 1 @@ -7369,22 +7259,22 @@ FtlReUsePrevPpa: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, lr} mov r6, r0 - ldr r5, .L973 + ldr r5, .L956 ubfx r0, r1, #10, #16 str r1, [sp, #4] bl P2V_block_in_plane ldr r2, [r5] mov r7, r0 ldrh r3, [r2, r0, lsl #1] - cbnz r3, .L964 - ldr r2, .L973+4 + cbnz r3, .L947 + ldr r2, .L956+4 ldr r4, [r2] cmp r4, #0 - beq .L965 - ldr r2, .L973+8 + beq .L948 + ldr r2, .L956+8 movw lr, #65535 - ldr ip, .L973+24 - ldr r0, .L973+12 + ldr ip, .L956+24 + ldr r0, .L956+12 ldr r2, [r2] ldrh r1, [r0] mov r8, r0 @@ -7393,22 +7283,22 @@ FtlReUsePrevPpa: mul r4, ip, r4 mov ip, #6 uxth r4, r4 -.L966: +.L949: uxth r0, r3 cmp r1, r0 - bls .L965 + bls .L948 cmp r4, r7 - bne .L967 + bne .L950 mov r1, r4 - ldr r0, .L973+4 + ldr r0, .L956+4 bl List_remove_node ldrh r3, [r8] - cbnz r3, .L968 - movw r2, #1733 - ldr r1, .L973+16 - ldr r0, .L973+20 + cbnz r3, .L951 + movw r2, #1735 + ldr r1, .L956+16 + ldr r0, .L956+20 bl printf -.L968: +.L951: ldrh r3, [r8] mov r0, r4 subs r3, r3, #1 @@ -7416,17 +7306,17 @@ FtlReUsePrevPpa: bl INSERT_DATA_LIST ldr r2, [r5] ldrh r3, [r2, r7, lsl #1] -.L964: +.L947: adds r3, r3, #1 strh r3, [r2, r7, lsl #1] @ movhi - b .L965 -.L967: + b .L948 +.L950: mul r4, ip, r4 adds r3, r3, #1 ldrh r4, [r2, r4] cmp r4, lr - bne .L966 -.L965: + bne .L949 +.L948: movs r2, #1 add r1, sp, #4 mov r0, r6 @@ -7434,14 +7324,14 @@ FtlReUsePrevPpa: add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, pc} -.L974: +.L957: .align 2 -.L973: - .word .LANCHOR42 - .word .LANCHOR46 - .word .LANCHOR40 - .word .LANCHOR48 - .word .LANCHOR154 +.L956: + .word .LANCHOR41 + .word .LANCHOR45 + .word .LANCHOR39 + .word .LANCHOR47 + .word .LANCHOR153 .word .LC1 .word -1431655765 .size FtlReUsePrevPpa, .-FtlReUsePrevPpa @@ -7462,144 +7352,144 @@ FtlRecoverySuperblock: mov r8, r0 sub sp, sp, #48 cmp r3, r2 - beq .L1107 + beq .L1090 ldrh r3, [r0, #2] str r3, [sp, #4] ldrb r3, [r0, #6] @ zero_extendqisi2 ldr r1, [sp, #4] str r3, [sp, #20] - ldr r3, .L1116 + ldr r3, .L1099 ldrh r3, [r3] cmp r3, r1 mov r3, #0 - bne .L978 + bne .L961 strh r3, [r0, #4] @ movhi -.L1114: +.L1097: strb r3, [r8, #6] -.L1107: +.L1090: movs r0, #0 add sp, sp, #48 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L978: +.L961: ldrh r0, [r0, #16] -.L979: +.L962: cmp r0, r2 uxth r5, r3 add r3, r3, #1 - beq .L980 + beq .L963 movs r1, #1 bl FtlGetLastWrittenPage mov r4, r0 adds r0, r0, #1 - beq .L981 - ldr r3, .L1116+4 + beq .L964 + ldr r3, .L1099+4 movs r2, #0 mov r5, r2 movw fp, #65535 mov r10, #20 ldrh ip, [r3] - ldr r3, .L1116+8 + ldr r3, .L1099+8 ldr r0, [r3] - ldr r3, .L1116+12 + ldr r3, .L1099+12 ldr r3, [r3] str r3, [sp, #8] - ldr r3, .L1116+16 + ldr r3, .L1099+16 ldrh r7, [r3] - ldr r3, .L1116+20 + ldr r3, .L1099+20 ldr r3, [r3] str r3, [sp, #12] - ldr r3, .L1116+24 + ldr r3, .L1099+24 ldrh lr, [r3] add r3, r8, #16 str r3, [sp, #16] str r3, [sp] -.L982: +.L965: uxth r3, r2 cmp ip, r3 - bhi .L986 + bhi .L969 movs r2, #0 mov r1, r5 bl FlashReadPages - ldr r2, .L1116+28 + ldr r2, .L1099+28 uxth r1, r4 movw fp, #65535 str r1, [sp, #12] ldr r3, [r2] subs r3, r3, #1 str r3, [sp] - ldr r3, .L1116+8 + ldr r3, .L1099+8 ldr r10, [r3] movs r3, #0 mov r7, r10 -.L987: +.L970: uxth r1, r3 cmp r5, r1 - bhi .L992 - bne .L990 + bhi .L975 + bne .L973 adds r3, r4, #1 uxth r3, r3 str r3, [sp, #8] -.L1108: +.L1091: ldr r0, [r10, #4] ubfx r0, r0, #10, #16 bl P2V_plane - ldr r3, .L1116 + ldr r3, .L1099 mov r10, r0 ldr r2, [sp, #8] ldrh r3, [r3] cmp r3, r2 - bne .L994 + bne .L977 ldrh r3, [sp, #8] strh r3, [r8, #2] @ movhi movs r3, #0 strb r3, [r8, #6] strh r3, [r8, #4] @ movhi -.L994: +.L977: ldr r3, [sp, #8] ldr r2, [sp, #4] cmp r3, r2 - bne .L995 + bne .L978 ldr r3, [sp, #20] cmp r10, r3 - bne .L995 + bne .L978 ldr r1, [sp, #8] mov r2, r10 -.L1115: +.L1098: mov r0, r8 bl ftl_sb_update_avl_pages - b .L1107 -.L980: + b .L1090 +.L963: uxth r1, r3 adds r1, r1, #8 ldrh r0, [r8, r1, lsl #1] - b .L979 -.L981: + b .L962 +.L964: ldr r3, [sp, #4] - cbz r3, .L983 - mov r2, #1800 - ldr r1, .L1116+32 - ldr r0, .L1116+36 + cbz r3, .L966 + movw r2, #1802 + ldr r1, .L1099+32 + ldr r0, .L1099+36 bl printf -.L983: +.L966: ldr r3, [sp, #20] - cbz r3, .L984 + cbz r3, .L967 cmp r5, r3 - beq .L984 - movw r2, #1801 - ldr r1, .L1116+32 - ldr r0, .L1116+36 + beq .L967 + movw r2, #1803 + ldr r1, .L1099+32 + ldr r0, .L1099+36 bl printf -.L984: +.L967: movs r3, #0 strh r3, [r8, #2] @ movhi - b .L1114 -.L986: + b .L1097 +.L969: ldr r1, [sp] ldrh r3, [r1], #2 cmp r3, fp str r1, [sp] - beq .L985 + beq .L968 mla r1, r10, r5, r0 ldr r6, [sp, #8] orr r3, r4, r3, lsl #10 @@ -7615,53 +7505,53 @@ FtlRecoverySuperblock: bic r3, r3, #3 add r3, r3, r6 str r3, [r1, #12] -.L985: +.L968: adds r2, r2, #1 - b .L982 -.L992: + b .L965 +.L975: ldr r1, [r7] - cbnz r1, .L988 + cbnz r1, .L971 ldr r1, [r7, #12] ldr r6, [r1, #4] str r1, [sp, #8] adds r1, r6, #1 - beq .L989 + beq .L972 ldr r1, [r2] mov r0, r6 bl ftl_cmp_data_ver - cbz r0, .L989 + cbz r0, .L972 adds r6, r6, #1 str r6, [r2] -.L989: +.L972: ldr r1, [sp, #8] ldr r1, [r1] adds r1, r1, #1 - bne .L991 -.L990: + bne .L974 +.L973: uxth r2, r4 uxth r3, r3 str r2, [sp, #8] movs r2, #20 mla r10, r2, r3, r10 - b .L1108 -.L988: + b .L1091 +.L971: ldr fp, [sp, #12] -.L991: +.L974: adds r3, r3, #1 adds r7, r7, #20 - b .L987 -.L995: + b .L970 +.L978: movw r3, #65535 cmp fp, r3 - bne .L996 + bne .L979 ldrb r3, [r8, #8] @ zero_extendqisi2 cmp r3, #0 - bne .L997 -.L996: - ldr r3, .L1116+40 + bne .L980 +.L979: + ldr r3, .L1099+40 uxth r6, r4 uxth r4, r4 - ldr r7, .L1116+8 + ldr r7, .L1099+8 ldr r2, [r3] adds r2, r2, #1 itt eq @@ -7674,10 +7564,10 @@ FtlRecoverySuperblock: subgt r4, r6, #7 ldrle r4, [sp, #4] uxthgt r4, r4 -.L1000: +.L983: cmp r4, r6 - bhi .L1010 - ldr r3, .L1116+4 + bhi .L993 + ldr r3, .L1099+4 movw lr, #65535 ldr r0, [r7] mov ip, #20 @@ -7686,74 +7576,74 @@ FtlRecoverySuperblock: str r3, [sp, #12] movs r3, #0 mov r5, r3 - b .L1011 -.L1002: + b .L994 +.L985: ldr r1, [sp, #12] ldrh r2, [r1], #2 cmp r2, lr str r1, [sp, #12] - beq .L1001 + beq .L984 mla r1, ip, r5, r0 adds r5, r5, #1 orr r2, r4, r2, lsl #10 uxth r5, r5 str r2, [r1, #4] -.L1001: +.L984: adds r3, r3, #1 -.L1011: +.L994: uxth r2, r3 cmp fp, r2 - bhi .L1002 + bhi .L985 mov r1, r5 movs r2, #0 bl FlashReadPages - ldr r3, .L1116+40 + ldr r3, .L1099+40 movs r1, #20 movs r0, #0 movw ip, #65535 ldr r2, [r3] ldr r3, [r7] mla r5, r1, r5, r3 -.L1003: +.L986: cmp r5, r3 - bne .L1008 - cbz r0, .L1009 - ldr r3, .L1116+40 + bne .L991 + cbz r0, .L992 + ldr r3, .L1099+40 str r2, [r3] -.L1009: +.L992: adds r4, r4, #1 uxth r4, r4 - b .L1000 -.L1117: + b .L983 +.L1100: .align 2 -.L1116: - .word .LANCHOR19 - .word .LANCHOR3 - .word .LANCHOR103 +.L1099: + .word .LANCHOR18 + .word .LANCHOR2 + .word .LANCHOR102 + .word .LANCHOR63 + .word .LANCHOR22 .word .LANCHOR64 .word .LANCHOR23 - .word .LANCHOR65 - .word .LANCHOR24 - .word .LANCHOR83 - .word .LANCHOR155 + .word .LANCHOR82 + .word .LANCHOR154 .word .LC1 - .word .LANCHOR134 -.L1008: + .word .LANCHOR133 +.L991: ldr r1, [r3] cmp r1, #0 - beq .L1004 - cbz r0, .L997 -.L1109: - ldr r3, .L1118 + beq .L987 + cbz r0, .L980 +.L1092: + ldr r3, .L1101 str r2, [r3] -.L997: +.L980: ldr fp, [sp, #4] movs r2, #1 - ldr r6, .L1118+4 - ldr r3, .L1118+8 + ldr r6, .L1101+4 + ldr r3, .L1101+8 strh r2, [r3] @ movhi -.L1012: - ldr r3, .L1118+12 +.L995: + ldr r3, .L1101+12 movw lr, #65535 ldr r0, [r6] movs r7, #20 @@ -7761,64 +7651,64 @@ FtlRecoverySuperblock: ldrh r4, [r3] movs r3, #0 str r3, [sp, #12] -.L1013: +.L996: uxth r2, r3 cmp r4, r2 - bhi .L1015 + bhi .L998 movs r2, #0 ldr r1, [sp, #12] bl FlashReadPages movs r3, #0 -.L1113: +.L1096: str r3, [sp, #24] ldr r2, [sp, #12] ldrh r3, [sp, #24] cmp r2, r3 - bhi .L1044 - ldr r3, .L1118+16 + bhi .L1027 + ldr r3, .L1101+16 add fp, fp, #1 uxth fp, fp ldrh r3, [r3] cmp r3, fp - bne .L1012 - ldr r2, .L1118+12 + bne .L995 + ldr r2, .L1101+12 movw r0, #65535 movs r3, #0 strh fp, [r8, #2] @ movhi strh r3, [r8, #4] @ movhi ldrh r2, [r2] -.L1045: +.L1028: uxth r1, r3 cmp r1, r2 - bcs .L1107 + bcs .L1090 ldr r1, [sp, #16] ldrh r4, [r1], #2 cmp r4, r0 str r1, [sp, #16] add r1, r3, #1 - bne .L1114 + bne .L1097 mov r3, r1 - b .L1045 -.L1004: + b .L1028 +.L987: ldr r1, [r3, #12] ldrh lr, [r1] cmp lr, ip - beq .L1007 + beq .L990 ldr r1, [r1, #4] cmp r1, #-1 itt ne movne r2, r1 movne r0, #1 -.L1007: +.L990: adds r3, r3, #20 - b .L1003 -.L1010: + b .L986 +.L993: mov r2, #-1 - b .L1109 -.L1015: + b .L1092 +.L998: ldrh r2, [r1], #2 cmp r2, lr - beq .L1014 + beq .L997 ldr r5, [sp, #12] orr r2, fp, r2, lsl #10 mla ip, r7, r5, r0 @@ -7827,10 +7717,10 @@ FtlRecoverySuperblock: adds r2, r2, #1 uxth r2, r2 str r2, [sp, #12] -.L1014: +.L997: adds r3, r3, #1 - b .L1013 -.L1044: + b .L996 +.L1027: ldr r3, [sp, #24] movs r5, #20 muls r5, r3, r5 @@ -7843,45 +7733,45 @@ FtlRecoverySuperblock: bl P2V_plane ldr r3, [sp, #4] cmp fp, r3 - bcc .L1017 + bcc .L1000 ldr r3, [sp, #28] - bne .L1018 + bne .L1001 ldr r2, [sp, #20] cmp r2, r0 - bhi .L1017 -.L1018: + bhi .L1000 +.L1001: ldr r2, [sp, #8] cmp fp, r2 - bne .L1019 + bne .L1002 cmp r10, r0 - beq .L1020 -.L1019: + beq .L1003 +.L1002: ldr r3, [r3, r5] adds r3, r3, #1 - beq .L1021 + beq .L1004 ldr r3, [r7, #12] movw r2, #61589 ldrh r1, [r3] cmp r1, r2 - beq .L1022 + beq .L1005 ldrh r0, [r8] -.L1110: +.L1093: bl decrement_vpc_count - b .L1017 -.L1022: + b .L1000 +.L1005: ldr r2, [r3, #4] str r2, [sp] adds r2, r2, #1 - beq .L1023 - ldr r2, .L1118+20 + beq .L1006 + ldr r2, .L1101+20 ldr r0, [sp] ldr r1, [r2] bl ftl_cmp_data_ver - cbz r0, .L1023 + cbz r0, .L1006 ldr r1, [sp] adds r1, r1, #1 str r1, [r2] -.L1023: +.L1006: ldr r4, [r3, #8] add r1, sp, #40 ldr r3, [r3, #12] @@ -7889,17 +7779,17 @@ FtlRecoverySuperblock: mov r0, r4 str r3, [sp, #36] bl log2phys - ldr r3, .L1118 + ldr r3, .L1101 ldr r1, [r3] adds r3, r1, #1 - beq .L1024 + beq .L1007 ldr r0, [sp] bl ftl_cmp_data_ver cmp r0, #0 - beq .L1024 + beq .L1007 ldr r3, [sp, #36] adds r7, r3, #1 - beq .L1025 + beq .L1008 ldr r0, [r6] movs r2, #0 movs r1, #1 @@ -7911,157 +7801,157 @@ FtlRecoverySuperblock: ldr r1, [r2, r5] adds r3, r2, r5 adds r1, r1, #1 - bne .L1026 -.L1027: + bne .L1009 +.L1010: mov r3, #-1 str r3, [sp, #36] -.L1034: +.L1017: ldr r7, [sp, #36] adds r0, r7, #1 - beq .L1017 -.L1048: + beq .L1000 +.L1031: ubfx r0, r7, #10, #16 bl P2V_block_in_plane - ldr r3, .L1118+24 + ldr r3, .L1101+24 mov r4, r0 ldrh r3, [r3] cmp r3, r0 - bhi .L1040 - movw r2, #2057 - ldr r1, .L1118+28 - ldr r0, .L1118+32 + bhi .L1023 + movw r2, #2059 + ldr r1, .L1101+28 + ldr r0, .L1101+32 bl printf -.L1040: - ldr r3, .L1118+36 +.L1023: + ldr r3, .L1101+36 ldr r3, [r3] ldrh r3, [r3, r4, lsl #1] cmp r3, #0 - beq .L1041 + beq .L1024 mov r0, r4 - b .L1110 -.L1025: + b .L1093 +.L1008: ldr r3, [sp, #44] ldr r2, [sp, #40] cmp r2, r3 - bne .L1017 + bne .L1000 movs r2, #1 add r1, sp, #36 mov r0, r4 bl log2phys -.L1017: +.L1000: ldr r3, [sp, #24] adds r3, r3, #1 - b .L1113 -.L1026: + b .L1096 +.L1009: ldr r1, [r7, #8] cmp r4, r1 - bne .L1027 - ldr r0, .L1118 + bne .L1010 + ldr r0, .L1101 ldr r1, [r7, #4] ldr r0, [r0] str r1, [sp, #28] bl ftl_cmp_data_ver cmp r0, #0 - beq .L1027 + beq .L1010 ldr r1, [sp, #40] ldr r0, [sp, #44] cmp r1, r0 - bne .L1029 -.L1032: + bne .L1012 +.L1015: ldr r1, [sp, #36] mov r0, r4 bl FtlReUsePrevPpa - b .L1027 -.L1029: + b .L1010 +.L1012: ldr r0, [sp, #36] cmp r1, r0 - beq .L1027 + beq .L1010 adds r0, r1, #1 - beq .L1030 + beq .L1013 str r1, [r3, #4] movs r2, #0 movs r1, #1 mov r0, r3 ldr r7, [r3, #12] bl FlashReadPages -.L1031: +.L1014: ldr r3, [r6] ldr r3, [r3, r5] adds r3, r3, #1 - beq .L1032 + beq .L1015 ldr r3, [r7, #4] - ldr r2, .L1118 + ldr r2, .L1101 mov r1, r3 ldr r0, [r2] bl ftl_cmp_data_ver cmp r0, #0 - beq .L1032 + beq .L1015 mov r1, r3 ldr r0, [sp, #28] bl ftl_cmp_data_ver cmp r0, #0 - beq .L1027 - b .L1032 -.L1030: + beq .L1010 + b .L1015 +.L1013: str r1, [r2, r5] - b .L1031 -.L1024: + b .L1014 +.L1007: ldr r3, [sp, #44] ldr r2, [sp, #40] cmp r2, r3 - beq .L1034 + beq .L1017 ldr r1, [sp, #36] adds r7, r1, #1 - beq .L1036 - ldr r3, .L1118+40 + beq .L1019 + ldr r3, .L1101+40 ldr r3, [r3] cmp r3, r1, lsr #10 - bhi .L1036 - ldr r0, .L1118+44 -.L1112: + bhi .L1019 + ldr r0, .L1101+44 +.L1095: bl printf - b .L1017 -.L1119: + b .L1000 +.L1102: .align 2 -.L1118: - .word .LANCHOR134 - .word .LANCHOR103 - .word .LANCHOR156 - .word .LANCHOR3 - .word .LANCHOR19 - .word .LANCHOR83 - .word .LANCHOR5 +.L1101: + .word .LANCHOR133 + .word .LANCHOR102 .word .LANCHOR155 + .word .LANCHOR2 + .word .LANCHOR18 + .word .LANCHOR82 + .word .LANCHOR4 + .word .LANCHOR154 .word .LC1 - .word .LANCHOR42 - .word .LANCHOR8 + .word .LANCHOR41 + .word .LANCHOR7 .word .LC27 -.L1036: +.L1019: movs r2, #1 add r1, sp, #44 mov r0, r4 bl log2phys ldr r7, [sp, #40] adds r5, r7, #1 - beq .L1034 + beq .L1017 ldr r3, [sp, #36] cmp r7, r3 - beq .L1048 + beq .L1031 ubfx r0, r7, #10, #16 bl P2V_block_in_plane - ldr r3, .L1120 + ldr r3, .L1103 ldrh r3, [r3] cmp r3, r0 - beq .L1039 - ldr r3, .L1120+4 + beq .L1022 + ldr r3, .L1103+4 ldrh r3, [r3] cmp r3, r0 - beq .L1039 - ldr r3, .L1120+8 + beq .L1022 + ldr r3, .L1103+8 ldrh r3, [r3] cmp r3, r0 - bne .L1034 -.L1039: + bne .L1017 +.L1022: ldr r0, [r6] movs r2, #0 movs r1, #1 @@ -8071,64 +7961,64 @@ FtlRecoverySuperblock: ldr r3, [r6] ldr r3, [r3] adds r3, r3, #1 - beq .L1034 + beq .L1017 ldr r1, [r5, #4] ldr r0, [sp] bl ftl_cmp_data_ver cmp r0, #0 - bne .L1034 + bne .L1017 movs r2, #1 add r1, sp, #40 mov r0, r4 bl log2phys - b .L1034 -.L1041: + b .L1017 +.L1024: mov r1, r4 - ldr r0, .L1120+12 - b .L1112 -.L1021: - ldr r3, .L1120+16 + ldr r0, .L1103+12 + b .L1095 +.L1004: + ldr r3, .L1103+16 ldr r3, [r3] cmp r3, #31 - bhi .L1042 - ldr r2, .L1120+20 + bhi .L1025 + ldr r2, .L1103+20 str r4, [r2, r3, lsl #2] adds r3, r3, #1 - ldr r2, .L1120+16 + ldr r2, .L1103+16 str r3, [r2] -.L1042: +.L1025: ldrh r0, [r8] bl decrement_vpc_count - ldr r3, .L1120+24 + ldr r3, .L1103+24 ldr r2, [r3] adds r1, r2, #1 - bne .L1043 + bne .L1026 ldr r2, [sp] -.L1111: +.L1094: str r2, [r3] - b .L1017 -.L1043: + b .L1000 +.L1026: ldr r1, [sp] cmp r1, r2 - bcs .L1017 + bcs .L1000 mov r2, r1 - b .L1111 -.L1020: + b .L1094 +.L1003: strb r10, [r8, #6] mov r2, r10 strh fp, [r8, #2] @ movhi mov r1, fp - b .L1115 -.L1121: + b .L1098 +.L1104: .align 2 -.L1120: +.L1103: + .word .LANCHOR50 .word .LANCHOR51 .word .LANCHOR52 - .word .LANCHOR53 .word .LC28 + .word .LANCHOR156 .word .LANCHOR157 - .word .LANCHOR158 - .word .LANCHOR134 + .word .LANCHOR133 .size FtlRecoverySuperblock, .-FtlRecoverySuperblock .section .text.ftl_check_vpc,"ax",%progbits .align 1 @@ -8143,56 +8033,56 @@ ftl_check_vpc: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} movs r4, #0 - ldr r6, .L1146 - ldr r5, .L1146+4 - ldr r1, .L1146+8 - ldr r0, .L1146+12 + ldr r6, .L1129 + ldr r5, .L1129+4 + ldr r1, .L1129+8 + ldr r0, .L1129+12 bl printf mov r2, #8192 movs r1, #0 - ldr r0, .L1146+4 + ldr r0, .L1129+4 bl ftl_memset -.L1123: +.L1106: ldr r3, [r6] cmp r4, r3 - bcc .L1125 - ldr r10, .L1146+48 + bcc .L1108 + ldr r10, .L1129+48 movs r4, #0 - ldr r7, .L1146+16 + ldr r7, .L1129+16 mov r6, r4 -.L1126: +.L1109: ldrh r2, [r10] uxth r3, r4 cmp r2, r3 - bhi .L1128 - ldr r3, .L1146+20 + bhi .L1111 + ldr r3, .L1129+20 ldr r4, [r3] - cbz r4, .L1129 - ldr r3, .L1146+24 + cbz r4, .L1112 + ldr r3, .L1129+24 mov r8, #0 - ldr r5, .L1146+28 - ldr r10, .L1146+16 + ldr r5, .L1129+28 + ldr r10, .L1129+16 ldrh r7, [r3] ldr r3, [r5] - ldr fp, .L1146+4 + ldr fp, .L1129+4 subs r4, r4, r3 - ldr r3, .L1146+32 + ldr r3, .L1129+32 asrs r4, r4, #1 muls r4, r3, r4 uxth r4, r4 -.L1130: +.L1113: uxth r3, r8 cmp r7, r3 - bls .L1129 + bls .L1112 ldr r3, [r10] ldrh r2, [r3, r4, lsl #1] - cbz r2, .L1131 + cbz r2, .L1114 movs r6, #1 ldrh r3, [fp, r4, lsl #1] mov r1, r4 - ldr r0, .L1146+36 + ldr r0, .L1129+36 bl printf -.L1131: +.L1114: movs r3, #6 ldr r2, [r5] muls r4, r3, r4 @@ -8200,72 +8090,72 @@ ftl_check_vpc: add r8, r8, #1 ldrh r4, [r2, r4] cmp r4, r3 - bne .L1130 -.L1129: - cbz r6, .L1122 - movw r2, #2383 - ldr r1, .L1146+8 - ldr r0, .L1146+40 + bne .L1113 +.L1112: + cbz r6, .L1105 + movw r2, #2387 + ldr r1, .L1129+8 + ldr r0, .L1129+40 bl printf -.L1122: +.L1105: add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1125: +.L1108: movs r2, #0 add r1, sp, #4 mov r0, r4 bl log2phys ldr r0, [sp, #4] adds r3, r0, #1 - beq .L1124 + beq .L1107 ubfx r0, r0, #10, #16 bl P2V_block_in_plane ldrh r3, [r5, r0, lsl #1] adds r3, r3, #1 strh r3, [r5, r0, lsl #1] @ movhi -.L1124: +.L1107: adds r4, r4, #1 - b .L1123 -.L1128: + b .L1106 +.L1111: ldr r3, [r7] uxth r5, r4 - ldr r8, .L1146+4 + ldr r8, .L1129+4 ldrh r2, [r3, r5, lsl #1] ldrh r3, [r8, r5, lsl #1] cmp r2, r3 - beq .L1127 + beq .L1110 mov r1, r5 - ldr r0, .L1146+44 + ldr r0, .L1129+44 bl printf ldr r3, [r7] movw r2, #65535 ldrh r3, [r3, r5, lsl #1] cmp r3, r2 - beq .L1127 + beq .L1110 ldrh r2, [r8, r5, lsl #1] cmp r2, r3 it hi movhi r6, #1 -.L1127: +.L1110: adds r4, r4, #1 - b .L1126 -.L1147: + b .L1109 +.L1130: .align 2 -.L1146: - .word .LANCHOR152 +.L1129: + .word .LANCHOR151 .word check_vpc_table - .word .LANCHOR159 + .word .LANCHOR158 .word .LC29 - .word .LANCHOR42 - .word .LANCHOR46 - .word .LANCHOR48 - .word .LANCHOR40 + .word .LANCHOR41 + .word .LANCHOR45 + .word .LANCHOR47 + .word .LANCHOR39 .word -1431655765 .word .LC31 .word .LC1 .word .LC30 - .word .LANCHOR5 + .word .LANCHOR4 .size ftl_check_vpc, .-ftl_check_vpc .section .text.ftl_scan_all_data,"ax",%progbits .align 1 @@ -8280,60 +8170,60 @@ ftl_scan_all_data: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, r8, lr} movs r5, #0 - ldr r7, .L1162 + ldr r7, .L1145 sub sp, sp, #32 movs r1, #0 - ldr r8, .L1162+24 - ldr r0, .L1162+4 + ldr r8, .L1145+24 + ldr r0, .L1145+4 bl printf -.L1149: +.L1132: ldr r3, [r7] cmp r5, r3 - bcc .L1155 + bcc .L1138 add sp, sp, #32 @ sp needed pop {r4, r5, r6, r7, r8, pc} -.L1155: +.L1138: movs r2, #0 add r1, sp, #28 mov r0, r5 bl log2phys ubfx r3, r5, #0, #11 - cbnz r3, .L1150 + cbnz r3, .L1133 ldr r2, [sp, #28] mov r1, r5 mov r0, r8 bl printf -.L1150: +.L1133: ldr r3, [sp, #28] adds r2, r3, #1 - beq .L1152 - ldr r4, .L1162+8 + beq .L1135 + ldr r4, .L1145+8 movs r2, #0 movs r1, #1 str r3, [r4, #4] mov r0, r4 - ldr r3, .L1162+12 + ldr r3, .L1145+12 str r5, [r4, #16] str r2, [r4] ldr r3, [r3] str r3, [r4, #8] - ldr r3, .L1162+16 + ldr r3, .L1145+16 ldr r6, [r3] str r6, [r4, #12] bl FlashReadPages ldr r3, [r4] cmp r3, #256 - beq .L1153 + beq .L1136 adds r3, r3, #1 - beq .L1153 + beq .L1136 ldr r3, [r6, #8] cmp r5, r3 - beq .L1152 -.L1153: + beq .L1135 +.L1136: ldr r2, [r4, #8] ldr r3, [r4, #12] - ldr r0, .L1162+20 + ldr r0, .L1145+20 ldr r1, [r2, #4] str r1, [sp, #16] mov r1, r5 @@ -8348,17 +8238,17 @@ ftl_scan_all_data: ldr r2, [r4, #4] ldr r3, [r3] bl printf -.L1152: +.L1135: adds r5, r5, #1 - b .L1149 -.L1163: + b .L1132 +.L1146: .align 2 -.L1162: - .word .LANCHOR152 +.L1145: + .word .LANCHOR151 .word .LC32 - .word .LANCHOR138 - .word .LANCHOR106 - .word .LANCHOR114 + .word .LANCHOR137 + .word .LANCHOR105 + .word .LANCHOR113 .word .LC34 .word .LC33 .size ftl_scan_all_data, .-ftl_scan_all_data @@ -8373,7 +8263,7 @@ ftl_scan_all_data: FtlGcScanTempBlk: @ args = 0, pretend = 0, frame = 48 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L1196 + ldr r3, .L1179 movw r2, #65535 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #48 @@ -8381,29 +8271,29 @@ FtlGcScanTempBlk: ldrh r5, [r3] str r3, [sp, #20] cmp r5, r2 - beq .L1186 - cbnz r5, .L1165 -.L1166: + beq .L1169 + cbnz r5, .L1148 +.L1149: bl FtlGcPageVarInit - b .L1167 -.L1186: + b .L1150 +.L1169: movs r5, #0 -.L1165: - ldr r3, .L1196+4 +.L1148: + ldr r3, .L1179+4 ldrh r3, [r3] cmp r3, r1 - beq .L1166 -.L1167: - ldr fp, .L1196+56 -.L1183: + beq .L1149 +.L1150: + ldr fp, .L1179+56 +.L1166: ldrh r2, [r4] movs r3, #0 strb r3, [r4, #8] movw r3, #65535 cmp r2, r3 - beq .L1168 -.L1185: - ldr r3, .L1196+8 + beq .L1151 +.L1168: + ldr r3, .L1179+8 movs r2, #0 ldr r0, [fp] mov r10, r2 @@ -8411,38 +8301,38 @@ FtlGcScanTempBlk: mov r8, #20 ldrh r3, [r3] str r3, [sp, #8] - ldr r3, .L1196+12 + ldr r3, .L1179+12 ldr r3, [r3] str r3, [sp, #12] - ldr r3, .L1196+16 + ldr r3, .L1179+16 ldrh r3, [r3] str r3, [sp, #16] - ldr r3, .L1196+20 + ldr r3, .L1179+20 ldr r7, [r3] - ldr r3, .L1196+24 + ldr r3, .L1179+24 ldrh ip, [r3] add r3, r4, #16 str r3, [sp, #4] -.L1169: +.L1152: ldr r1, [sp, #8] uxth r3, r2 cmp r1, r3 - bhi .L1171 + bhi .L1154 mov r8, #0 movs r2, #0 mov r1, r10 bl FlashReadPages -.L1172: +.L1155: uxth r3, r8 cmp r10, r3 - bhi .L1184 - ldr r3, .L1196+4 + bhi .L1167 + ldr r3, .L1179+4 adds r5, r5, #1 uxth r5, r5 ldrh r3, [r3] cmp r3, r5 - bhi .L1185 -.L1168: + bhi .L1168 +.L1151: ldr r2, [sp, #20] movw r3, #65535 mov r0, r4 @@ -8456,12 +8346,12 @@ FtlGcScanTempBlk: add sp, sp, #48 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1171: +.L1154: ldr r1, [sp, #4] ldrh r3, [r1], #2 cmp r3, lr str r1, [sp, #4] - beq .L1170 + beq .L1153 mla r1, r8, r10, r0 orr r3, r5, r3, lsl #10 str r3, [r1, #4] @@ -8478,10 +8368,10 @@ FtlGcScanTempBlk: str r3, [r1, #12] add r3, r10, #1 uxth r10, r3 -.L1170: +.L1153: adds r2, r2, #1 - b .L1169 -.L1184: + b .L1152 +.L1167: movs r3, #20 ldr r2, [fp] mul r3, r3, r8 @@ -8491,18 +8381,18 @@ FtlGcScanTempBlk: ldr r7, [r1, #12] str r0, [sp, #4] cmp r6, #0 - bne .L1173 + bne .L1156 ldrh r1, [r7] movw r2, #65535 cmp r1, r2 - beq .L1194 - ldr r2, .L1196+28 + beq .L1177 + ldr r2, .L1179+28 ldr r0, [r7, #8] ldr r2, [r2] cmp r0, r2 - bls .L1175 -.L1194: - ldr r3, .L1196+32 + bls .L1158 +.L1177: + ldr r3, .L1179+32 movs r1, #0 ldrh r2, [r4] movs r5, #0 @@ -8510,13 +8400,13 @@ FtlGcScanTempBlk: strh r1, [r3, r2, lsl #1] @ movhi ldrh r0, [r4] bl INSERT_FREE_LIST - ldr r2, .L1196+36 + ldr r2, .L1179+36 movw r3, #65535 strh r3, [r4] @ movhi strh r3, [r2] @ movhi bl FtlGcPageVarInit - b .L1183 -.L1175: + b .L1166 +.L1158: mov r2, r6 add r1, sp, #24 str r3, [sp, #8] @@ -8525,74 +8415,74 @@ FtlGcScanTempBlk: ldr r1, [sp, #24] ldr r3, [sp, #8] cmp r2, r1 - beq .L1177 -.L1179: + beq .L1160 +.L1162: ldr r2, [r7, #8] -.L1195: +.L1178: ldr r1, [sp, #4] add r8, r8, #1 ldr r0, [r7, #12] bl FtlGcUpdatePage - b .L1172 -.L1177: + b .L1155 +.L1160: str r3, [sp, #8] adds r3, r2, #1 - beq .L1179 + beq .L1162 str r2, [sp, #32] movs r1, #1 - ldr r2, .L1196+40 + ldr r2, .L1179+40 add r0, sp, #28 ldr r2, [r2] str r2, [sp, #36] - ldr r2, .L1196+44 + ldr r2, .L1179+44 ldr r2, [r2] str r2, [sp, #40] mov r2, r6 bl FlashReadPages - ldr r2, .L1196+48 + ldr r2, .L1179+48 ldr r1, [fp] ldr r3, [sp, #8] ldrh r2, [r2] ldr r0, [sp, #36] add ip, r3, r1 lsls r2, r2, #7 -.L1180: +.L1163: cmp r6, r2 - beq .L1179 + beq .L1162 ldr r1, [ip, #8] ldr r3, [r0, r6, lsl #2] ldr r1, [r1, r6, lsl #2] cmp r1, r3 - beq .L1181 + beq .L1164 ldr r2, [sp, #32] ldrh r1, [r4] - ldr r0, .L1196+52 + ldr r0, .L1179+52 bl printf - b .L1194 -.L1181: + b .L1177 +.L1164: adds r6, r6, #1 - b .L1180 -.L1173: + b .L1163 +.L1156: mov r2, #-1 - b .L1195 -.L1197: + b .L1178 +.L1180: .align 2 -.L1196: - .word .LANCHOR160 - .word .LANCHOR19 - .word .LANCHOR3 +.L1179: + .word .LANCHOR159 + .word .LANCHOR18 + .word .LANCHOR2 + .word .LANCHOR63 + .word .LANCHOR22 .word .LANCHOR64 .word .LANCHOR23 - .word .LANCHOR65 - .word .LANCHOR24 - .word .LANCHOR152 - .word .LANCHOR42 - .word .LANCHOR145 - .word .LANCHOR110 - .word .LANCHOR115 - .word .LANCHOR12 + .word .LANCHOR151 + .word .LANCHOR41 + .word .LANCHOR144 + .word .LANCHOR109 + .word .LANCHOR114 + .word .LANCHOR11 .word .LC35 - .word .LANCHOR103 + .word .LANCHOR102 .size FtlGcScanTempBlk, .-FtlGcScanTempBlk .section .text.FtlVendorPartWrite,"ax",%progbits .align 1 @@ -8605,7 +8495,7 @@ FtlGcScanTempBlk: FtlVendorPartWrite: @ args = 0, pretend = 0, frame = 104 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L1210 + ldr r3, .L1193 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #104 str r2, [sp] @@ -8614,26 +8504,26 @@ FtlVendorPartWrite: mov r5, r1 ldrh r3, [r3] cmp r2, r3 - bhi .L1206 - ldr r3, .L1210+4 + bhi .L1189 + ldr r3, .L1193+4 mov r8, #0 ldrh r6, [r3] lsr r6, r0, r6 lsl fp, r6, #2 -.L1200: - cbnz r5, .L1205 -.L1198: +.L1183: + cbnz r5, .L1188 +.L1181: mov r0, r8 add sp, sp, #104 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1205: - ldr r3, .L1210+8 +.L1188: + ldr r3, .L1193+8 mov r0, r7 - ldr r10, .L1210+24 + ldr r10, .L1193+24 ldr r3, [r3] ldr r2, [r3, fp] - ldr r3, .L1210+12 + ldr r3, .L1193+12 str r2, [sp, #12] ldrh r3, [r3] mov r1, r3 @@ -8647,9 +8537,9 @@ FtlVendorPartWrite: cmp r5, r4 it cc uxthcc r4, r5 - cbz r2, .L1202 + cbz r2, .L1185 cmp r4, r3 - beq .L1202 + beq .L1185 ldr r3, [r10] add r0, sp, #20 str r2, [sp, #24] @@ -8659,7 +8549,7 @@ FtlVendorPartWrite: add r3, sp, #40 str r3, [sp, #32] bl FlashReadPages -.L1203: +.L1186: lsls r3, r4, #9 ldr r0, [r10] subs r5, r5, r4 @@ -8672,7 +8562,7 @@ FtlVendorPartWrite: bl ftl_memcpy ldr r2, [r10] mov r1, r6 - ldr r0, .L1210+16 + ldr r0, .L1193+16 adds r6, r6, #1 bl FtlMapWritePage ldr r3, [sp] @@ -8683,27 +8573,27 @@ FtlVendorPartWrite: ldr r3, [sp, #8] add r2, r2, r3 str r2, [sp] - b .L1200 -.L1202: - ldr r3, .L1210+20 + b .L1183 +.L1185: + ldr r3, .L1193+20 movs r1, #0 ldr r0, [r10] ldrh r2, [r3] bl ftl_memset - b .L1203 -.L1206: + b .L1186 +.L1189: mov r8, #-1 - b .L1198 -.L1211: + b .L1181 +.L1194: .align 2 -.L1210: - .word .LANCHOR16 +.L1193: + .word .LANCHOR15 + .word .LANCHOR21 + .word .LANCHOR122 + .word .LANCHOR11 + .word .LANCHOR160 .word .LANCHOR22 - .word .LANCHOR123 - .word .LANCHOR12 - .word .LANCHOR161 - .word .LANCHOR23 - .word .LANCHOR108 + .word .LANCHOR107 .size FtlVendorPartWrite, .-FtlVendorPartWrite .section .text.Ftl_save_ext_data,"ax",%progbits .align 1 @@ -8717,72 +8607,72 @@ Ftl_save_ext_data: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 @ link register save eliminated. - ldr r2, .L1214 - ldr r3, .L1214+4 + ldr r2, .L1197 + ldr r3, .L1197+4 ldr r1, [r2] cmp r1, r3 - bne .L1212 - ldr r3, .L1214+8 + bne .L1195 + ldr r3, .L1197+8 movs r1, #1 movs r0, #0 str r3, [r2, #4] - ldr r3, .L1214+12 + ldr r3, .L1197+12 ldr r3, [r3] str r3, [r2, #88] - ldr r3, .L1214+16 + ldr r3, .L1197+16 ldr r3, [r3] str r3, [r2, #92] - ldr r3, .L1214+20 + ldr r3, .L1197+20 ldr r3, [r3] str r3, [r2, #8] - ldr r3, .L1214+24 + ldr r3, .L1197+24 ldr r3, [r3] str r3, [r2, #12] - ldr r3, .L1214+28 + ldr r3, .L1197+28 ldr r3, [r3] str r3, [r2, #16] - ldr r3, .L1214+32 + ldr r3, .L1197+32 ldr r3, [r3] str r3, [r2, #20] - ldr r3, .L1214+36 + ldr r3, .L1197+36 ldr r3, [r3] str r3, [r2, #28] - ldr r3, .L1214+40 + ldr r3, .L1197+40 ldr r3, [r3] str r3, [r2, #32] - ldr r3, .L1214+44 + ldr r3, .L1197+44 ldr r3, [r3] str r3, [r2, #36] - ldr r3, .L1214+48 + ldr r3, .L1197+48 ldr r3, [r3] str r3, [r2, #40] - ldr r3, .L1214+52 + ldr r3, .L1197+52 ldr r3, [r3] str r3, [r2, #44] - ldr r3, .L1214+56 + ldr r3, .L1197+56 ldr r3, [r3] str r3, [r2, #48] b FtlVendorPartWrite -.L1212: +.L1195: bx lr -.L1215: +.L1198: .align 2 -.L1214: - .word .LANCHOR135 +.L1197: + .word .LANCHOR134 .word 1179929683 - .word 1342177352 + .word 1342177365 + .word .LANCHOR161 .word .LANCHOR162 - .word .LANCHOR163 + .word .LANCHOR83 .word .LANCHOR84 - .word .LANCHOR85 - .word .LANCHOR89 .word .LANCHOR88 - .word .LANCHOR91 - .word .LANCHOR80 - .word .LANCHOR86 .word .LANCHOR87 + .word .LANCHOR90 + .word .LANCHOR79 + .word .LANCHOR85 + .word .LANCHOR86 + .word .LANCHOR91 .word .LANCHOR92 - .word .LANCHOR93 .size Ftl_save_ext_data, .-Ftl_save_ext_data .section .text.FtlEctTblFlush,"ax",%progbits .align 1 @@ -8795,7 +8685,7 @@ Ftl_save_ext_data: FtlEctTblFlush: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r2, .L1221 + ldr r2, .L1204 push {r3, lr} ldrh r3, [r2] cmp r3, #31 @@ -8804,22 +8694,22 @@ FtlEctTblFlush: movhi r3, #32 strhls r3, [r2] @ movhi movls r3, #1 - ldr r2, .L1221+4 - cbnz r0, .L1218 + ldr r2, .L1204+4 + cbnz r0, .L1201 ldr r1, [r2] ldr r0, [r1, #20] ldr r1, [r1, #16] add r3, r3, r0 cmp r1, r3 - bcc .L1219 -.L1218: + bcc .L1202 +.L1201: ldr r2, [r2] movs r0, #64 ldr r3, [r2, #16] str r3, [r2, #20] - ldr r3, .L1221+8 + ldr r3, .L1204+8 str r3, [r2] - ldr r3, .L1221+12 + ldr r3, .L1204+12 ldrh r1, [r3] lsls r3, r1, #9 str r3, [r2, #12] @@ -8830,16 +8720,16 @@ FtlEctTblFlush: str r3, [r2, #4] bl FtlVendorPartWrite bl Ftl_save_ext_data -.L1219: +.L1202: movs r0, #0 pop {r3, pc} -.L1222: +.L1205: .align 2 -.L1221: - .word .LANCHOR164 - .word .LANCHOR118 +.L1204: + .word .LANCHOR163 + .word .LANCHOR117 .word 1112818501 - .word .LANCHOR116 + .word .LANCHOR115 .size FtlEctTblFlush, .-FtlEctTblFlush .section .text.sftl_vendor_write,"ax",%progbits .align 1 @@ -8867,7 +8757,7 @@ sftl_vendor_write: FtlVendorPartRead: @ args = 0, pretend = 0, frame = 104 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L1234 + ldr r3, .L1217 push {r4, r5, r6, r7, r8, r10, fp, lr} mov r10, r2 adds r2, r0, r1 @@ -8876,28 +8766,28 @@ FtlVendorPartRead: mov r6, r1 ldrh r3, [r3] cmp r2, r3 - bhi .L1233 - ldr r3, .L1234+4 + bhi .L1216 + ldr r3, .L1217+4 mov r8, #0 - ldr fp, .L1234+28 + ldr fp, .L1217+28 ldrh r5, [r3] lsr r5, r0, r5 lsls r3, r5, #2 str r3, [sp] -.L1226: - cbnz r6, .L1232 -.L1224: +.L1209: + cbnz r6, .L1215 +.L1207: mov r0, r8 add sp, sp, #104 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1232: - ldr r3, .L1234+8 +.L1215: + ldr r3, .L1217+8 mov r0, r7 ldr r2, [sp] ldr r3, [r3] ldr r3, [r3, r2] - ldr r2, .L1234+12 + ldr r2, .L1217+12 str r3, [sp, #8] ldrh r4, [r2] mov r1, r4 @@ -8912,7 +8802,7 @@ FtlVendorPartRead: lsls r2, r4, #9 str r2, [sp, #8] cmp r3, #0 - beq .L1228 + beq .L1211 ldr r2, [fp] add r0, sp, #20 str r3, [sp, #24] @@ -8926,28 +8816,28 @@ FtlVendorPartRead: ldr r2, [sp, #20] ldr r3, [sp, #12] adds r2, r2, #1 - ldr r2, .L1234+16 + ldr r2, .L1217+16 it eq moveq r8, #-1 ldr r2, [r2] cmp r2, #256 - bne .L1230 + bne .L1213 mov r2, r3 mov r1, r5 - ldr r0, .L1234+20 + ldr r0, .L1217+20 bl printf ldr r2, [fp] mov r1, r5 - ldr r0, .L1234+24 + ldr r0, .L1217+24 bl FtlMapWritePage -.L1230: +.L1213: ldr r1, [fp] lsls r2, r4, #9 ldr r3, [sp, #4] mov r0, r10 add r1, r1, r3, lsl #9 bl ftl_memcpy -.L1231: +.L1214: ldr r3, [sp, #8] adds r5, r5, #1 subs r6, r6, r4 @@ -8956,27 +8846,27 @@ FtlVendorPartRead: ldr r3, [sp] adds r3, r3, #4 str r3, [sp] - b .L1226 -.L1228: + b .L1209 +.L1211: lsls r2, r4, #9 mov r1, r3 mov r0, r10 bl ftl_memset - b .L1231 -.L1233: + b .L1214 +.L1216: mov r8, #-1 - b .L1224 -.L1235: + b .L1207 +.L1218: .align 2 -.L1234: - .word .LANCHOR16 - .word .LANCHOR22 - .word .LANCHOR123 - .word .LANCHOR12 - .word .LANCHOR138 +.L1217: + .word .LANCHOR15 + .word .LANCHOR21 + .word .LANCHOR122 + .word .LANCHOR11 + .word .LANCHOR137 .word .LC36 - .word .LANCHOR161 - .word .LANCHOR108 + .word .LANCHOR160 + .word .LANCHOR107 .size FtlVendorPartRead, .-FtlVendorPartRead .section .text.FtlLoadEctTbl,"ax",%progbits .align 1 @@ -8991,32 +8881,32 @@ FtlLoadEctTbl: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} movs r0, #64 - ldr r4, .L1238 - ldr r5, .L1238+4 + ldr r4, .L1221 + ldr r5, .L1221+4 ldr r2, [r4] ldrh r1, [r5] bl FtlVendorPartRead ldr r3, [r4] ldr r2, [r3] - ldr r3, .L1238+8 + ldr r3, .L1221+8 cmp r2, r3 - beq .L1237 - ldr r1, .L1238+12 - ldr r0, .L1238+16 + beq .L1220 + ldr r1, .L1221+12 + ldr r0, .L1221+16 bl printf ldrh r2, [r5] movs r1, #0 ldr r0, [r4] lsls r2, r2, #9 bl ftl_memset -.L1237: +.L1220: movs r0, #0 pop {r3, r4, r5, pc} -.L1239: +.L1222: .align 2 -.L1238: - .word .LANCHOR118 - .word .LANCHOR116 +.L1221: + .word .LANCHOR117 + .word .LANCHOR115 .word 1112818501 .word .LC37 .word .LC38 @@ -9034,93 +8924,93 @@ Ftl_load_ext_data: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} movs r1, #1 - ldr r4, .L1243 + ldr r4, .L1226 movs r0, #0 - ldr r5, .L1243+4 + ldr r5, .L1226+4 mov r2, r4 bl FtlVendorPartRead ldr r3, [r4] cmp r3, r5 - beq .L1241 + beq .L1224 mov r2, #512 movs r1, #0 mov r0, r4 bl ftl_memset str r5, [r4] -.L1241: +.L1224: ldr r3, [r4] cmp r3, r5 - ldr r3, .L1243+8 - bne .L1242 + ldr r3, .L1226+8 + bne .L1225 ldr r1, [r4, #88] - ldr r2, .L1243+12 + ldr r2, .L1226+12 str r1, [r2] ldr r1, [r4, #92] - ldr r2, .L1243+16 + ldr r2, .L1226+16 str r1, [r2] ldr r1, [r4, #8] - ldr r2, .L1243+20 + ldr r2, .L1226+20 str r1, [r2] ldr r1, [r4, #12] - ldr r2, .L1243+24 + ldr r2, .L1226+24 str r1, [r2] ldr r1, [r4, #16] - ldr r2, .L1243+28 + ldr r2, .L1226+28 str r1, [r2] ldr r1, [r4, #20] - ldr r2, .L1243+32 + ldr r2, .L1226+32 str r1, [r2] ldr r2, [r4, #28] ldr r1, [r4, #32] str r2, [r3] - ldr r2, .L1243+36 + ldr r2, .L1226+36 str r1, [r2] ldr r1, [r4, #36] - ldr r2, .L1243+40 + ldr r2, .L1226+40 str r1, [r2] ldr r1, [r4, #40] - ldr r2, .L1243+44 + ldr r2, .L1226+44 str r1, [r2] ldr r1, [r4, #44] - ldr r2, .L1243+48 + ldr r2, .L1226+48 str r1, [r2] ldr r1, [r4, #48] - ldr r2, .L1243+52 + ldr r2, .L1226+52 str r1, [r2] -.L1242: - ldr r1, .L1243+56 - ldr r2, .L1243+60 +.L1225: + ldr r1, .L1226+56 + ldr r2, .L1226+60 ldr r3, [r3] ldr r0, [r1] ldrh r2, [r2] - ldr r1, .L1243+64 + ldr r1, .L1226+64 mla r0, r0, r2, r3 ldrh r1, [r1] bl __aeabi_uidiv - ldr r3, .L1243+68 + ldr r3, .L1226+68 str r0, [r3] pop {r3, r4, r5, pc} -.L1244: +.L1227: .align 2 -.L1243: - .word .LANCHOR135 +.L1226: + .word .LANCHOR134 .word 1179929683 - .word .LANCHOR91 - .word .LANCHOR162 - .word .LANCHOR163 - .word .LANCHOR84 - .word .LANCHOR85 - .word .LANCHOR89 - .word .LANCHOR88 - .word .LANCHOR80 - .word .LANCHOR86 - .word .LANCHOR87 - .word .LANCHOR92 - .word .LANCHOR93 .word .LANCHOR90 - .word .LANCHOR14 - .word .LANCHOR5 - .word .LANCHOR143 + .word .LANCHOR161 + .word .LANCHOR162 + .word .LANCHOR83 + .word .LANCHOR84 + .word .LANCHOR88 + .word .LANCHOR87 + .word .LANCHOR79 + .word .LANCHOR85 + .word .LANCHOR86 + .word .LANCHOR91 + .word .LANCHOR92 + .word .LANCHOR89 + .word .LANCHOR13 + .word .LANCHOR4 + .word .LANCHOR142 .size Ftl_load_ext_data, .-Ftl_load_ext_data .section .text.sftl_vendor_read,"ax",%progbits .align 1 @@ -9152,30 +9042,30 @@ FtlMapBlkWriteDump_data: mov r4, r0 ldr r3, [r0, #36] cmp r3, #0 - beq .L1246 + beq .L1229 movs r3, #0 - ldr r5, .L1258 + ldr r5, .L1241 str r3, [r0, #36] - ldr r3, .L1258+4 + ldr r3, .L1241+4 ldrh r6, [r0, #6] mov r7, r5 ldr r10, [r0, #24] ldr r3, [r3] str r3, [r5, #8] - ldr r3, .L1258+8 + ldr r3, .L1241+8 ldr r8, [r3] ldrh r3, [r0, #2] str r8, [r5, #12] - cbz r3, .L1248 - ldr r2, .L1258+12 + cbz r3, .L1231 + ldr r2, .L1241+12 ldrh r2, [r2] subs r2, r2, #1 cmp r3, r2 - bge .L1248 + bge .L1231 ldrh r2, [r0] movw r1, #65535 cmp r2, r1 - beq .L1248 + beq .L1231 ldr r1, [r0, #12] subs r3, r3, #1 mov r0, r5 @@ -9187,49 +9077,49 @@ FtlMapBlkWriteDump_data: bl FlashReadPages ldr r3, [r5] adds r3, r3, #1 - beq .L1248 + beq .L1231 ldr r3, [r4, #24] ldrh r1, [r8, #8] ldr r2, [r3, r1, lsl #2] ldr r3, [r5, #4] cmp r2, r3 - bne .L1248 + bne .L1231 ldr r2, [r5, #8] -.L1257: +.L1240: mov r0, r4 pop {r3, r4, r5, r6, r7, r8, r10, lr} b FtlMapWritePage -.L1248: +.L1231: subs r6, r6, #1 uxth r6, r6 ldr r3, [r10, r6, lsl #2] str r3, [r7, #4] - cbz r3, .L1249 + cbz r3, .L1232 movs r2, #1 - ldr r0, .L1258 + ldr r0, .L1241 mov r1, r2 bl FlashReadPages -.L1250: +.L1233: ldr r2, [r7, #8] mov r1, r6 - b .L1257 -.L1249: - ldr r3, .L1258+16 + b .L1240 +.L1232: + ldr r3, .L1241+16 movs r1, #255 ldr r0, [r7, #8] ldrh r2, [r3] bl ftl_memset - b .L1250 -.L1246: + b .L1233 +.L1229: pop {r3, r4, r5, r6, r7, r8, r10, pc} -.L1259: +.L1242: .align 2 -.L1258: - .word .LANCHOR138 - .word .LANCHOR107 - .word .LANCHOR114 - .word .LANCHOR20 - .word .LANCHOR23 +.L1241: + .word .LANCHOR137 + .word .LANCHOR106 + .word .LANCHOR113 + .word .LANCHOR19 + .word .LANCHOR22 .size FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data .section .text.FtlVpcTblFlush,"ax",%progbits .align 1 @@ -9243,35 +9133,36 @@ FtlVpcTblFlush: @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r4, r5, r6, r7, r8, r10, fp, lr} - mov r10, #0 - ldr r5, .L1275 - ldr r3, .L1275+4 - ldr fp, .L1275+76 - ldr r6, .L1275+8 - ldr r7, [r3] - ldr r0, [fp] - ldrh r3, [r5] - str r7, [r6, #12] + mov r8, #0 + ldr r3, .L1258 + ldr r5, .L1258+4 + ldr fp, .L1258+72 + ldr r0, [r3] + ldr r6, .L1258+8 + ldr r7, [fp] + ldrh r2, [r5] str r0, [r6, #8] - strh r3, [r7, #2] @ movhi - movw r3, #61604 - ldr r4, .L1275+12 - strh r3, [r7] @ movhi - ldr r2, .L1275+16 - ldr r3, [r5, #8] - ldr ip, .L1275+80 - str r10, [r7, #8] - str r3, [r7, #4] + str r7, [r6, #12] + strh r2, [r7, #2] @ movhi + movw r2, #61604 + strh r2, [r7] @ movhi + ldr r2, [r5, #8] + ldr r4, .L1258+12 + ldr ip, .L1258+76 + str r2, [r7, #4] + ldr r2, .L1258+16 + str r8, [r7, #8] + str r8, [r7, #12] stm r4, {r2, ip} ldrh r2, [r5, #6] - str r10, [r7, #12] - ldr r8, .L1275+84 + str r3, [sp] + ldr r10, .L1258+80 strh r2, [r4, #8] @ movhi - ldr r2, .L1275+20 - ldr r3, .L1275+24 + ldr r2, .L1258+20 + ldr r3, .L1258+24 ldrh r2, [r2] strb r2, [r4, #10] - ldr r2, .L1275+28 + ldr r2, .L1258+28 ldrh r1, [r2] ldrh ip, [r2, #2] strh r1, [r4, #14] @ movhi @@ -9279,17 +9170,17 @@ FtlVpcTblFlush: ldrb r2, [r2, #8] @ zero_extendqisi2 strb r2, [r4, #11] orr r1, r1, ip, lsl #6 - ldr r2, .L1275+32 + ldr r2, .L1258+32 strh r1, [r4, #16] @ movhi ldrh r1, [r2] ldrh ip, [r2, #2] strh r1, [r4, #18] @ movhi ldrb r1, [r2, #6] @ zero_extendqisi2 ldrb r2, [r2, #8] @ zero_extendqisi2 - strb r2, [r4, #12] orr r1, r1, ip, lsl #6 - ldr r2, .L1275+36 strh r1, [r4, #20] @ movhi + strb r2, [r4, #12] + ldr r2, .L1258+36 ldrh r1, [r2] ldrh ip, [r2, #2] strh r1, [r4, #22] @ movhi @@ -9297,88 +9188,75 @@ FtlVpcTblFlush: ldrb r2, [r2, #8] @ zero_extendqisi2 strb r2, [r4, #13] orr r1, r1, ip, lsl #6 - ldr r2, .L1275+40 + ldr r2, .L1258+40 strh r1, [r4, #24] @ movhi movs r1, #255 ldr r2, [r2] str r2, [r4, #32] - ldr r2, [r8] + ldr r2, [r10] str r2, [r4, #40] - ldr r2, .L1275+44 + ldr r2, .L1258+44 ldr r2, [r2] str r2, [r4, #36] ldrh r2, [r3] bl ftl_memset mov r1, r4 - ldr r4, .L1275+48 movs r2, #48 ldr r0, [r6, #8] + movw r4, #65535 bl ftl_memcpy - ldrh r2, [r4] + ldr r2, .L1258+48 ldr r0, [r6, #8] - ldr r1, .L1275+52 - lsls r2, r2, #1 + ldr r1, .L1258+52 + ldrh r2, [r2] adds r0, r0, #48 ldr r1, [r1] + lsls r2, r2, #1 bl ftl_memcpy - ldrh r0, [r4] - ldr r1, .L1275+56 - ldr r4, [r6, #8] - lsrs r2, r0, #3 - adds r0, r0, #24 - lsls r0, r0, #1 - ldr r1, [r1] - adds r2, r2, #4 - bic r0, r0, #3 - add r0, r0, r4 - mov r4, r10 - bl ftl_memcpy - mov r0, r10 - ldr r10, .L1275+4 + mov r0, r8 bl FtlUpdateVaildLpn - movw r3, #65535 - str r3, [sp] - ldr r3, .L1275+24 + ldr r3, .L1258+24 str r3, [sp, #4] -.L1261: - ldr r3, [fp] +.L1244: + ldr r3, [sp] ldrh r1, [r5, #2] ldrh r2, [r5] + ldr r3, [r3] str r3, [r6, #8] - ldr r3, [r10] + ldr r3, [fp] str r3, [r6, #12] orr r3, r1, r2, lsl #10 str r3, [r6, #4] - ldr r3, .L1275+60 + ldr r3, .L1258+56 ldrh r3, [r3] subs r3, r3, #1 cmp r1, r3 - blt .L1262 - ldrh r3, [r5, #4] - strh r2, [r5, #4] @ movhi - str r3, [sp] + blt .L1245 movs r3, #0 + ldrh r4, [r5, #4] strh r3, [r5, #2] @ movhi + strh r2, [r5, #4] @ movhi bl FtlFreeSysBlkQueueOut - ldr r3, [r8] + ldr r3, [r10] strh r0, [r5] @ movhi adds r2, r3, #1 str r3, [r5, #8] - str r2, [r8] + str r2, [r10] lsls r2, r0, #10 str r2, [r6, #4] str r3, [r7, #4] strh r0, [r7, #2] @ movhi -.L1262: +.L1245: ldr r3, [sp, #4] - ldr r0, [fp] ldrh r1, [r3] + ldr r3, [sp] + ldr r0, [r3] bl js_hash movs r3, #1 str r0, [r7, #12] mov r2, r3 mov r1, r3 - ldr r0, .L1275+8 + ldr r0, .L1258+8 bl FlashProgPages ldrh r3, [r5, #2] ldr r2, [r6] @@ -9386,73 +9264,71 @@ FtlVpcTblFlush: uxth r3, r3 adds r1, r2, #1 strh r3, [r5, #2] @ movhi - bne .L1263 + bne .L1246 cmp r3, #1 - bne .L1264 + bne .L1247 movw r2, #1138 - ldr r1, .L1275+64 - ldr r0, .L1275+68 + ldr r1, .L1258+60 + ldr r0, .L1258+64 bl printf -.L1264: +.L1247: ldrh r3, [r5, #2] - adds r4, r4, #1 - uxth r4, r4 + add r8, r8, #1 + uxth r8, r8 cmp r3, #1 itttt eq - ldreq r3, .L1275+60 + ldreq r3, .L1258+56 ldrheq r3, [r3] addeq r3, r3, #-1 strheq r3, [r5, #2] @ movhi - cmp r4, #3 - bls .L1261 - mov r2, r4 + cmp r8, #3 + bls .L1244 + mov r2, r8 ldr r1, [r6, #4] - ldr r0, .L1275+72 + ldr r0, .L1258+68 bl printf -.L1267: - b .L1267 -.L1263: +.L1250: + b .L1250 +.L1246: cmp r3, #1 - beq .L1261 + beq .L1244 cmp r2, #256 - beq .L1261 - ldr r2, [sp] + beq .L1244 movw r3, #65535 - cmp r2, r3 - beq .L1268 + cmp r4, r3 + beq .L1251 movs r1, #1 - mov r0, r2 + mov r0, r4 bl FtlFreeSysBlkQueueIn -.L1268: +.L1251: movs r0, #0 add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1276: +.L1259: .align 2 -.L1275: - .word .LANCHOR139 - .word .LANCHOR114 +.L1258: + .word .LANCHOR105 .word .LANCHOR138 - .word .LANCHOR39 + .word .LANCHOR137 + .word .LANCHOR38 .word 1179929683 - .word .LANCHOR10 - .word .LANCHOR23 + .word .LANCHOR9 + .word .LANCHOR22 + .word .LANCHOR50 .word .LANCHOR51 .word .LANCHOR52 - .word .LANCHOR53 - .word .LANCHOR90 - .word .LANCHOR83 - .word .LANCHOR5 - .word .LANCHOR42 - .word .LANCHOR1 - .word .LANCHOR20 - .word .LANCHOR165 + .word .LANCHOR89 + .word .LANCHOR82 + .word .LANCHOR4 + .word .LANCHOR41 + .word .LANCHOR19 + .word .LANCHOR164 .word .LC1 .word .LC39 - .word .LANCHOR106 - .word 1342177352 - .word .LANCHOR82 + .word .LANCHOR113 + .word 1342177365 + .word .LANCHOR81 .size FtlVpcTblFlush, .-FtlVpcTblFlush .section .text.FtlSysFlush,"ax",%progbits .align 1 @@ -9485,18 +9361,18 @@ sftl_deinit: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r3, lr} - ldr r3, .L1280 + ldr r3, .L1263 ldr r3, [r3] cmp r3, #1 - bne .L1279 + bne .L1262 bl FtlSysFlush -.L1279: +.L1262: movs r0, #0 pop {r3, pc} -.L1281: +.L1264: .align 2 -.L1280: - .word .LANCHOR166 +.L1263: + .word .LANCHOR165 .size sftl_deinit, .-sftl_deinit .section .text.FtlDiscard,"ax",%progbits .align 1 @@ -9509,94 +9385,98 @@ sftl_deinit: FtlDiscard: @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L1297 - adds r2, r0, r1 + ldr r3, .L1282 push {r0, r1, r4, r5, r6, r7, r8, lr} - mov r7, r0 - mov r5, r1 + mov r6, r0 + mov r4, r1 ldr r3, [r3] - cmp r2, r3 - bhi .L1290 + cmp r3, r0 + bls .L1275 + cmp r3, r1 + bcc .L1275 + adds r2, r0, r1 + cmp r3, r2 + bcc .L1275 cmp r1, #31 - bhi .L1284 -.L1289: + bhi .L1267 +.L1272: movs r0, #0 -.L1282: +.L1265: add sp, sp, #8 @ sp needed pop {r4, r5, r6, r7, r8, pc} -.L1284: - ldr r8, .L1297+12 - ldrh r4, [r8] - mov r1, r4 +.L1267: + ldr r8, .L1282+12 + ldrh r5, [r8] + mov r1, r5 bl __aeabi_uidiv - smulbb r3, r0, r4 - mov r6, r0 - subs r7, r7, r3 - uxth r7, r7 - cbz r7, .L1285 - subs r4, r4, r7 - adds r6, r6, #1 - cmp r4, r5 + smulbb r3, r0, r5 + mov r7, r0 + subs r6, r6, r3 + uxth r6, r6 + cbz r6, .L1268 + subs r5, r5, r6 + adds r7, r7, #1 + cmp r5, r4 it cs - movcs r4, r5 - uxth r4, r4 - subs r5, r5, r4 -.L1285: - ldr r4, .L1297+4 + movcs r5, r4 + uxth r5, r5 + subs r4, r4, r5 +.L1268: + ldr r5, .L1282+4 mov r3, #-1 - ldr r7, .L1297+8 + ldr r6, .L1282+8 str r3, [sp, #4] -.L1286: +.L1269: ldrh r3, [r8] - cmp r5, r3 - bcs .L1288 - ldr r3, .L1297+4 + cmp r4, r3 + bcs .L1271 + ldr r3, .L1282+4 ldr r2, [r3] cmp r2, #32 - bls .L1289 + bls .L1272 movs r4, #0 str r4, [r3] bl l2p_flush bl FtlVpcTblFlush - b .L1289 -.L1288: + b .L1272 +.L1271: movs r2, #0 mov r1, sp - mov r0, r6 + mov r0, r7 bl log2phys ldr r3, [sp] adds r3, r3, #1 - beq .L1287 - ldr r3, [r4] + beq .L1270 + ldr r3, [r5] movs r2, #1 add r1, sp, #4 - mov r0, r6 + mov r0, r7 adds r3, r3, #1 - str r3, [r4] - ldr r3, [r7] + str r3, [r5] + ldr r3, [r6] adds r3, r3, #1 - str r3, [r7] + str r3, [r6] bl log2phys ldr r0, [sp] ubfx r0, r0, #10, #16 bl P2V_block_in_plane bl decrement_vpc_count -.L1287: +.L1270: ldrh r3, [r8] - adds r6, r6, #1 - subs r5, r5, r3 - b .L1286 -.L1290: + adds r7, r7, #1 + subs r4, r4, r3 + b .L1269 +.L1275: mov r0, #-1 - b .L1282 -.L1298: + b .L1265 +.L1283: .align 2 -.L1297: - .word .LANCHOR34 - .word .LANCHOR167 - .word .LANCHOR86 - .word .LANCHOR12 +.L1282: + .word .LANCHOR33 + .word .LANCHOR166 + .word .LANCHOR85 + .word .LANCHOR11 .size FtlDiscard, .-FtlDiscard .section .text.allocate_new_data_superblock,"ax",%progbits .align 1 @@ -9609,47 +9489,47 @@ FtlDiscard: allocate_new_data_superblock: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L1309 + ldr r3, .L1294 push {r4, r5, r6, lr} mov r6, r0 ldrh r4, [r0] ldrh r3, [r3] cmp r3, r4 - bcs .L1300 - movw r2, #2755 - ldr r1, .L1309+4 - ldr r0, .L1309+8 + bcs .L1285 + movw r2, #2759 + ldr r1, .L1294+4 + ldr r0, .L1294+8 bl printf -.L1300: +.L1285: movw r3, #65535 cmp r4, r3 - beq .L1301 - ldr r3, .L1309+12 + beq .L1286 + ldr r3, .L1294+12 mov r0, r4 ldr r3, [r3] ldrh r3, [r3, r4, lsl #1] - cbz r3, .L1302 + cbz r3, .L1287 bl INSERT_DATA_LIST -.L1301: - ldr r5, .L1309+16 +.L1286: + ldr r5, .L1294+16 movw r2, #65535 movs r3, #1 strb r3, [r6, #8] ldrh r0, [r5] cmp r0, r2 - beq .L1303 + beq .L1288 cmp r4, r0 - bne .L1304 - ldr r3, .L1309+12 + bne .L1289 + ldr r3, .L1294+12 ldr r3, [r3] ldrh r3, [r3, r0, lsl #1] - cbz r3, .L1305 -.L1304: + cbz r3, .L1290 +.L1289: bl update_vpc_list -.L1305: +.L1290: movw r3, #65535 strh r3, [r5] @ movhi -.L1303: +.L1288: mov r0, r6 bl allocate_data_superblock bl l2p_flush @@ -9658,17 +9538,17 @@ allocate_new_data_superblock: bl FtlVpcTblFlush movs r0, #0 pop {r4, r5, r6, pc} -.L1302: +.L1287: bl INSERT_FREE_LIST - b .L1301 -.L1310: + b .L1286 +.L1295: .align 2 -.L1309: - .word .LANCHOR5 - .word .LANCHOR168 +.L1294: + .word .LANCHOR4 + .word .LANCHOR167 .word .LC1 - .word .LANCHOR42 - .word .LANCHOR131 + .word .LANCHOR41 + .word .LANCHOR130 .size allocate_new_data_superblock, .-allocate_new_data_superblock .section .text.FtlProgPages,"ax",%progbits .align 1 @@ -9683,31 +9563,31 @@ FtlProgPages: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} movs r6, #0 - ldr r10, .L1330+20 + ldr r10, .L1315+20 mov r5, r3 movs r2, #0 mov r4, r0 - ldr fp, .L1330 + ldr fp, .L1315 mov r8, r1 ldrb r3, [r3, #9] @ zero_extendqisi2 bl FlashProgPages -.L1312: +.L1297: cmp r6, r8 - bne .L1319 - ldr r3, .L1330 + bne .L1304 + ldr r3, .L1315 ldrb r2, [r5, #6] @ zero_extendqisi2 ldrh r3, [r3] cmp r2, r3 - bcc .L1311 + bcc .L1296 mov r2, #1000 - ldr r1, .L1330+4 - ldr r0, .L1330+8 + ldr r1, .L1315+4 + ldr r0, .L1315+8 bl printf -.L1311: +.L1296: add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1314: +.L1299: ldr r1, [r4, #4] mov r0, r10 bl printf @@ -9716,10 +9596,10 @@ FtlProgPages: bl P2V_block_in_plane bl decrement_vpc_count ldrh r3, [r5, #4] - cbnz r3, .L1313 + cbnz r3, .L1298 mov r0, r5 bl allocate_new_data_superblock -.L1313: +.L1298: mov r0, r5 bl get_new_active_ppa movs r2, #0 @@ -9729,21 +9609,21 @@ FtlProgPages: ldrb r3, [r5, #9] @ zero_extendqisi2 mov r0, r4 bl FlashProgPages -.L1319: +.L1304: ldr r2, [r4] adds r3, r2, #1 - beq .L1314 + beq .L1299 cmp r2, #256 - beq .L1314 + beq .L1299 ldrb r2, [r5, #6] @ zero_extendqisi2 ldrh r3, [fp] cmp r2, r3 - bcc .L1315 + bcc .L1300 movw r2, #985 - ldr r1, .L1330+4 - ldr r0, .L1330+8 + ldr r1, .L1315+4 + ldr r0, .L1315+8 bl printf -.L1315: +.L1300: ldr r3, [r4, #4] add r1, sp, #16 movs r2, #1 @@ -9758,28 +9638,28 @@ FtlProgPages: ldr r3, [sp, #4] mov r7, r0 adds r3, r3, #1 - beq .L1316 - ldr r3, .L1330+12 + beq .L1301 + ldr r3, .L1315+12 ldr r3, [r3] ldrh r2, [r3, r0, lsl #1] - cbnz r2, .L1317 + cbnz r2, .L1302 mov r1, r0 - ldr r0, .L1330+16 + ldr r0, .L1315+16 bl printf -.L1317: +.L1302: mov r0, r7 bl decrement_vpc_count -.L1316: +.L1301: adds r6, r6, #1 adds r4, r4, #20 - b .L1312 -.L1331: + b .L1297 +.L1316: .align 2 -.L1330: - .word .LANCHOR3 - .word .LANCHOR169 +.L1315: + .word .LANCHOR2 + .word .LANCHOR168 .word .LC1 - .word .LANCHOR42 + .word .LANCHOR41 .word .LC41 .word .LC40 .size FtlProgPages, .-FtlProgPages @@ -9796,66 +9676,66 @@ FtlGcFreeTempBlock: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} movw r3, #65535 - ldr r4, .L1347 + ldr r4, .L1332 ldrh r2, [r4] cmp r2, r3 - beq .L1333 - ldr r3, .L1347+4 + beq .L1318 + ldr r3, .L1332+4 mov r0, r4 ldrh r1, [r3] bl FtlGcScanTempBlk str r0, [sp, #12] -.L1333: - ldr r3, .L1347+8 +.L1318: + ldr r3, .L1332+8 movs r2, #0 str r2, [r3] movw r3, #65535 ldrh r2, [r4] cmp r2, r3 - beq .L1335 - ldr r6, .L1347+4 + beq .L1320 + ldr r6, .L1332+4 ldrb r0, [r4, #7] @ zero_extendqisi2 - ldr r5, .L1347+12 + ldr r5, .L1332+12 ldrh r2, [r6] ldrh r1, [r5] muls r2, r0, r2 cmp r1, r2 - beq .L1336 + beq .L1321 movs r2, #164 - ldr r1, .L1347+16 - ldr r0, .L1347+20 + ldr r1, .L1332+16 + ldr r0, .L1332+20 bl printf -.L1336: +.L1321: ldrh r6, [r6] ldrb r3, [r4, #7] @ zero_extendqisi2 - ldr r2, .L1347+24 + ldr r2, .L1332+24 ldrh r0, [r4] - ldr fp, .L1347+56 + ldr fp, .L1332+56 smulbb r3, r3, r6 ldr r1, [r2] movs r6, #0 mov r10, r2 strh r3, [r1, r0, lsl #1] @ movhi - ldr r1, .L1347+28 + ldr r1, .L1332+28 ldrh r3, [r5] ldr r0, [r1] add r3, r3, r0 str r3, [r1] -.L1337: +.L1322: ldrh r2, [r5] uxth r3, r6 cmp r2, r3 - bhi .L1341 + bhi .L1326 movw r0, #65535 bl decrement_vpc_count ldrh r0, [r4] ldr r3, [r10] ldrh r3, [r3, r0, lsl #1] cmp r3, #0 - beq .L1342 + beq .L1327 bl INSERT_DATA_LIST -.L1343: - ldr r2, .L1347+32 +.L1328: + ldr r2, .L1332+32 movs r3, #0 movw r6, #65535 strh r3, [r5] @ movhi @@ -9863,38 +9743,38 @@ FtlGcFreeTempBlock: strh r3, [r2] @ movhi bl l2p_flush bl FtlVpcTblFlush - ldr r3, .L1347+36 + ldr r3, .L1332+36 strh r6, [r3] @ movhi - ldr r3, .L1347+40 + ldr r3, .L1332+40 ldrh r2, [r3] - ldr r3, .L1347+44 + ldr r3, .L1332+44 ldrh r3, [r3] add r3, r3, r3, lsl #1 cmp r2, r3, asr #2 ittt gt - ldrgt r3, .L1347+48 + ldrgt r3, .L1332+48 movgt r2, #20 strhgt r2, [r3] @ movhi -.L1335: +.L1320: movs r0, #0 add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1341: +.L1326: uxth r3, r6 mov r8, #12 ldr r2, [fp] mul r8, r8, r3 - ldr r3, .L1347+52 + ldr r3, .L1332+52 ldr r3, [r3] add r7, r3, r8 ldr r0, [r7, #8] cmp r0, r2 - bcc .L1338 -.L1345: + bcc .L1323 +.L1330: ldrh r0, [r4] - b .L1346 -.L1338: + b .L1331 +.L1323: movs r2, #0 add r1, sp, #12 str r3, [sp, #4] @@ -9903,7 +9783,7 @@ FtlGcFreeTempBlock: ldr r2, [sp, #12] ldr r0, [r3, r8] cmp r0, r2 - bne .L1340 + bne .L1325 ubfx r0, r0, #10, #16 bl P2V_block_in_plane movs r2, #1 @@ -9912,37 +9792,37 @@ FtlGcFreeTempBlock: ldr r0, [r7, #8] bl log2phys mov r0, r8 -.L1346: +.L1331: bl decrement_vpc_count - b .L1339 -.L1340: + b .L1324 +.L1325: ldr r3, [r7, #4] cmp r2, r3 - bne .L1345 -.L1339: + bne .L1330 +.L1324: adds r6, r6, #1 - b .L1337 -.L1342: + b .L1322 +.L1327: bl INSERT_FREE_LIST - b .L1343 -.L1348: + b .L1328 +.L1333: .align 2 -.L1347: - .word .LANCHOR53 - .word .LANCHOR19 - .word .LANCHOR133 - .word .LANCHOR70 - .word .LANCHOR170 - .word .LC1 - .word .LANCHOR42 - .word .LANCHOR84 +.L1332: + .word .LANCHOR52 + .word .LANCHOR18 + .word .LANCHOR132 .word .LANCHOR69 - .word .LANCHOR145 - .word .LANCHOR48 - .word .LANCHOR171 - .word .LANCHOR100 - .word .LANCHOR71 - .word .LANCHOR152 + .word .LANCHOR169 + .word .LC1 + .word .LANCHOR41 + .word .LANCHOR83 + .word .LANCHOR68 + .word .LANCHOR144 + .word .LANCHOR47 + .word .LANCHOR170 + .word .LANCHOR99 + .word .LANCHOR70 + .word .LANCHOR151 .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock .section .text.FtlGcPageRecovery,"ax",%progbits .align 1 @@ -9956,31 +9836,31 @@ FtlGcPageRecovery: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} - ldr r4, .L1351 - ldr r5, .L1351+4 + ldr r4, .L1336 + ldr r5, .L1336+4 ldrh r1, [r4] mov r0, r5 bl FtlGcScanTempBlk ldrh r2, [r5, #2] ldrh r3, [r4] cmp r2, r3 - bcc .L1349 - ldr r0, .L1351+8 + bcc .L1334 + ldr r0, .L1336+8 bl FtlMapBlkWriteDump_data movs r0, #0 bl FtlGcFreeTempBlock - ldr r3, .L1351+12 + ldr r3, .L1336+12 movs r2, #0 str r2, [r3] -.L1349: +.L1334: pop {r3, r4, r5, pc} -.L1352: +.L1337: .align 2 -.L1351: - .word .LANCHOR19 - .word .LANCHOR53 - .word .LANCHOR129 - .word .LANCHOR133 +.L1336: + .word .LANCHOR18 + .word .LANCHOR52 + .word .LANCHOR128 + .word .LANCHOR132 .size FtlGcPageRecovery, .-FtlGcPageRecovery .section .text.FtlPowerLostRecovery,"ax",%progbits .align 1 @@ -9995,13 +9875,13 @@ FtlPowerLostRecovery: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} movs r4, #0 - ldr r5, .L1354 - ldr r3, .L1354+4 + ldr r5, .L1339 + ldr r3, .L1339+4 mov r0, r5 str r4, [r3] bl FtlRecoverySuperblock mov r0, r5 - ldr r5, .L1354+8 + ldr r5, .L1339+8 bl FtlSlcSuperblockCheck mov r0, r5 bl FtlRecoverySuperblock @@ -10012,12 +9892,12 @@ FtlPowerLostRecovery: bl decrement_vpc_count mov r0, r4 pop {r3, r4, r5, pc} -.L1355: +.L1340: .align 2 -.L1354: +.L1339: + .word .LANCHOR50 + .word .LANCHOR156 .word .LANCHOR51 - .word .LANCHOR157 - .word .LANCHOR52 .size FtlPowerLostRecovery, .-FtlPowerLostRecovery .section .text.Ftl_gc_temp_data_write_back,"ax",%progbits .align 1 @@ -10032,32 +9912,32 @@ Ftl_gc_temp_data_write_back: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, lr} movs r3, #0 - ldr r4, .L1364 + ldr r4, .L1349 movs r6, #0 movs r7, #20 mov r2, r3 - ldr r5, .L1364+4 + ldr r5, .L1349+4 ldr r1, [r4] ldr r0, [r5] bl FlashProgPages -.L1357: +.L1342: ldr r1, [r4] uxth r3, r6 cmp r1, r3 - bhi .L1360 + bhi .L1345 ldr r0, [r5] bl FtlGcBufFree - ldr r3, .L1364+8 + ldr r3, .L1349+8 movs r0, #0 str r0, [r4] ldrh r3, [r3, #4] - cbnz r3, .L1356 + cbnz r3, .L1341 movs r0, #1 bl FtlGcFreeTempBlock movs r0, #1 -.L1356: +.L1341: pop {r3, r4, r5, r6, r7, pc} -.L1360: +.L1345: muls r3, r7, r3 ldr r2, [r5] adds r6, r6, #1 @@ -10070,13 +9950,13 @@ Ftl_gc_temp_data_write_back: ldrne r2, [r0, #8] ldr r0, [r0, #12] bl FtlGcUpdatePage - b .L1357 -.L1365: + b .L1342 +.L1350: .align 2 -.L1364: - .word .LANCHOR62 - .word .LANCHOR104 - .word .LANCHOR53 +.L1349: + .word .LANCHOR61 + .word .LANCHOR103 + .word .LANCHOR52 .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back .section .text.Ftl_get_new_temp_ppa,"ax",%progbits .align 1 @@ -10091,37 +9971,37 @@ Ftl_get_new_temp_ppa: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, lr} movw r3, #65535 - ldr r4, .L1369 + ldr r4, .L1354 ldrh r2, [r4] cmp r2, r3 - beq .L1367 + beq .L1352 ldrh r3, [r4, #4] - cbnz r3, .L1368 -.L1367: + cbnz r3, .L1353 +.L1352: movs r0, #0 movs r5, #0 bl FtlGcFreeTempBlock - ldr r0, .L1369 + ldr r0, .L1354 strb r5, [r4, #8] bl allocate_data_superblock - ldr r3, .L1369+4 + ldr r3, .L1354+4 strh r5, [r3] @ movhi - ldr r3, .L1369+8 + ldr r3, .L1354+8 strh r5, [r3] @ movhi bl l2p_flush mov r0, r5 bl FtlEctTblFlush bl FtlVpcTblFlush -.L1368: - ldr r0, .L1369 +.L1353: + ldr r0, .L1354 pop {r3, r4, r5, lr} b get_new_active_ppa -.L1370: +.L1355: .align 2 -.L1369: - .word .LANCHOR53 +.L1354: + .word .LANCHOR52 + .word .LANCHOR68 .word .LANCHOR69 - .word .LANCHOR70 .size Ftl_get_new_temp_ppa, .-Ftl_get_new_temp_ppa .section .text.rk_ftl_garbage_collect,"ax",%progbits .align 1 @@ -10134,188 +10014,188 @@ Ftl_get_new_temp_ppa: rk_ftl_garbage_collect: @ args = 0, pretend = 0, frame = 40 @ frame_needed = 0, uses_anonymous_args = 0 - ldr r3, .L1461 + ldr r3, .L1446 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #48 str r0, [sp, #28] ldr r0, [r3] cmp r0, #0 - bne .L1428 - ldr r3, .L1461+4 + bne .L1413 + ldr r3, .L1446+4 ldrh r3, [r3] cmp r3, #47 - bls .L1371 - ldr r3, .L1461+8 + bls .L1356 + ldr r3, .L1446+8 movw r4, #65535 ldrh r0, [r3] cmp r0, r4 - beq .L1373 - ldr r1, .L1461+12 + beq .L1358 + ldr r1, .L1446+12 ldrh r2, [r1] cmp r2, r4 itt eq strheq r0, [r1] @ movhi strheq r2, [r3] @ movhi -.L1373: +.L1358: ldr r3, [sp, #28] cmp r3, #0 - bne .L1430 - ldr r3, .L1461+16 + bne .L1415 + ldr r3, .L1446+16 ldrh r3, [r3] cmp r3, #24 - bhi .L1431 - ldr r2, .L1461+20 + bhi .L1416 + ldr r2, .L1446+20 cmp r3, #16 ldrh r4, [r2] - bls .L1376 + bls .L1361 lsrs r4, r4, #5 -.L1375: - ldr r2, .L1461+24 +.L1360: + ldr r2, .L1446+24 ldrh r1, [r2] cmp r1, r3 mov r1, r2 - bcs .L1379 - ldr r3, .L1461+28 + bcs .L1364 + ldr r3, .L1446+28 movw r0, #65535 ldrh r3, [r3] cmp r3, r0 - bne .L1380 - ldr r0, .L1461+12 + bne .L1365 + ldr r0, .L1446+12 ldrh r0, [r0] cmp r0, r3 - bne .L1380 - ldr r3, .L1461+32 + bne .L1365 + ldr r3, .L1446+32 ldrh r0, [r3] - cbnz r0, .L1381 - ldr r3, .L1461+36 - ldr r4, .L1461+40 + cbnz r0, .L1366 + ldr r3, .L1446+36 + ldr r4, .L1446+40 ldr r3, [r3] ldr r4, [r4] add r3, r3, r3, lsl #1 cmp r4, r3, lsr #2 - bcs .L1382 -.L1381: - ldr r3, .L1461+44 + bcs .L1367 +.L1366: + ldr r3, .L1446+44 ldrh r3, [r3] add r3, r3, r3, lsl #1 asrs r3, r3, #2 strh r3, [r1] @ movhi -.L1383: - ldr r3, .L1461+48 +.L1368: + ldr r3, .L1446+48 movs r2, #0 str r2, [r3] -.L1371: +.L1356: add sp, sp, #48 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1376: +.L1361: cmp r3, #12 - bls .L1377 + bls .L1362 lsrs r4, r4, #4 - b .L1375 -.L1377: + b .L1360 +.L1362: cmp r3, #8 - bls .L1375 + bls .L1360 lsrs r4, r4, #2 - b .L1375 -.L1431: + b .L1360 +.L1416: movs r4, #1 - b .L1375 -.L1382: + b .L1360 +.L1367: movs r3, #18 strh r3, [r2] @ movhi - b .L1383 -.L1380: - ldr r3, .L1461+44 + b .L1368 +.L1365: + ldr r3, .L1446+44 ldrh r3, [r3] add r3, r3, r3, lsl #1 asrs r3, r3, #2 strh r3, [r1] @ movhi -.L1379: - ldr r3, .L1461+52 +.L1364: + ldr r3, .L1446+52 ldrh r3, [r3] - cbz r3, .L1374 + cbz r3, .L1359 adds r4, r4, #32 uxth r4, r4 -.L1374: - ldr r5, .L1461+56 +.L1359: + ldr r5, .L1446+56 movw r3, #65535 ldrh r2, [r5] cmp r2, r3 - bne .L1386 - ldr r3, .L1461+12 + bne .L1371 + ldr r3, .L1446+12 ldrh r1, [r3] cmp r1, r2 - beq .L1387 - ldr r0, .L1461+60 + beq .L1372 + ldr r0, .L1446+60 ldr r0, [r0] ldrh r1, [r0, r1, lsl #1] - cbnz r1, .L1388 + cbnz r1, .L1373 strh r2, [r3] @ movhi -.L1388: +.L1373: ldrh r2, [r3] strh r2, [r5] @ movhi movw r2, #65535 strh r2, [r3] @ movhi -.L1387: +.L1372: ldrh r0, [r5] movw r6, #65535 movs r3, #0 strb r3, [r5, #8] cmp r0, r6 - beq .L1386 + beq .L1371 bl IsBlkInGcList - cbz r0, .L1390 + cbz r0, .L1375 strh r6, [r5] @ movhi -.L1390: +.L1375: ldrh r2, [r5] movw r3, #65535 cmp r2, r3 - beq .L1386 - ldr r0, .L1461+56 + beq .L1371 + ldr r0, .L1446+56 bl make_superblock - ldr r2, .L1461+64 + ldr r2, .L1446+64 movs r3, #0 strh r3, [r5, #2] @ movhi strb r3, [r5, #6] strh r3, [r2] @ movhi - ldr r3, .L1461+60 + ldr r3, .L1446+60 ldrh r2, [r5] ldr r3, [r3] ldrh r2, [r3, r2, lsl #1] - ldr r3, .L1461+68 + ldr r3, .L1446+68 strh r2, [r3] @ movhi -.L1386: - ldr r2, .L1461+72 +.L1371: + ldr r2, .L1446+72 ldrh r3, [r5] ldrh r2, [r2] cmp r2, r3 - beq .L1391 - ldr r2, .L1461+76 + beq .L1376 + ldr r2, .L1446+76 ldrh r2, [r2] cmp r2, r3 - beq .L1391 - ldr r2, .L1461+28 + beq .L1376 + ldr r2, .L1446+28 ldrh r2, [r2] cmp r2, r3 - bne .L1392 -.L1391: + bne .L1377 +.L1376: movw r3, #65535 strh r3, [r5] @ movhi -.L1392: - ldr r5, .L1461+56 +.L1377: + ldr r5, .L1446+56 mov r6, r5 -.L1427: +.L1412: ldrh r2, [r5] movw r3, #65535 cmp r2, r3 - bne .L1393 - ldr fp, .L1461+88 + bne .L1378 + ldr fp, .L1446+88 movs r2, #0 - ldr r3, .L1461+48 + ldr r3, .L1446+48 mov r8, fp str r2, [r3] -.L1394: +.L1379: ldrh r7, [fp] mov r0, r7 bl List_get_gc_head_node @@ -10323,15 +10203,15 @@ rk_ftl_garbage_collect: movw r1, #65535 cmp r3, r1 strh r3, [r6] @ movhi - bne .L1395 + bne .L1380 movs r3, #0 movs r0, #8 strh r3, [fp] @ movhi - b .L1371 -.L1430: + b .L1356 +.L1415: movs r4, #1 - b .L1374 -.L1395: + b .L1359 +.L1380: str r0, [sp, #16] mov r0, r3 str r3, [sp, #12] @@ -10339,142 +10219,142 @@ rk_ftl_garbage_collect: bl IsBlkInGcList ldr r3, [sp, #12] ldr r2, [sp, #16] - cbz r0, .L1396 + cbz r0, .L1381 strh r7, [fp] @ movhi - b .L1394 -.L1396: + b .L1379 +.L1381: uxth r0, r2 - ldr r2, .L1461+20 - ldr r10, .L1461+60 + ldr r2, .L1446+20 + ldr r10, .L1446+60 uxth r7, r7 ldrh lr, [r2] - ldr r2, .L1461+80 + ldr r2, .L1446+80 ldr r1, [r10] strh r7, [fp] @ movhi ldrh r2, [r2] ldrh ip, [r1, r0, lsl #1] mul r2, r2, lr cmp ip, r2, asr #1 - bgt .L1398 + bgt .L1383 cmp r7, #48 - bls .L1399 + bls .L1384 cmp ip, #8 - bls .L1399 - ldr r7, .L1461+84 + bls .L1384 + ldr r7, .L1446+84 ldrh r7, [r7] cmp r7, #35 - bhi .L1399 -.L1398: + bhi .L1384 +.L1383: movs r7, #0 strh r7, [r8] @ movhi -.L1399: +.L1384: ldrh r1, [r1, r0, lsl #1] cmp r2, r1 - bgt .L1400 + bgt .L1385 ldrh r2, [r8] cmp r2, #3 - bhi .L1400 + bhi .L1385 movw r3, #65535 strh r3, [r6] @ movhi movs r3, #0 strh r3, [r8] @ movhi -.L1460: - ldr r3, .L1461+32 +.L1445: + ldr r3, .L1446+32 ldrh r0, [r3] - b .L1371 -.L1400: - cbnz r1, .L1401 + b .L1356 +.L1385: + cbnz r1, .L1386 movw r0, #65535 bl decrement_vpc_count ldrh r3, [r8] adds r3, r3, #1 strh r3, [r8] @ movhi - b .L1394 -.L1462: + b .L1379 +.L1447: .align 2 -.L1461: - .word .LANCHOR94 - .word .LANCHOR44 - .word .LANCHOR73 +.L1446: + .word .LANCHOR93 + .word .LANCHOR43 .word .LANCHOR72 - .word .LANCHOR48 - .word .LANCHOR19 - .word .LANCHOR100 - .word .LANCHOR53 - .word .LANCHOR172 - .word .LANCHOR152 - .word .LANCHOR59 - .word .LANCHOR171 - .word .LANCHOR95 - .word .LANCHOR74 - .word .LANCHOR145 - .word .LANCHOR42 - .word .LANCHOR173 - .word .LANCHOR174 - .word .LANCHOR51 + .word .LANCHOR71 + .word .LANCHOR47 + .word .LANCHOR18 + .word .LANCHOR99 .word .LANCHOR52 - .word .LANCHOR3 - .word .LANCHOR69 - .word .LANCHOR102 -.L1401: + .word .LANCHOR171 + .word .LANCHOR151 + .word .LANCHOR58 + .word .LANCHOR170 + .word .LANCHOR94 + .word .LANCHOR73 + .word .LANCHOR144 + .word .LANCHOR41 + .word .LANCHOR172 + .word .LANCHOR173 + .word .LANCHOR50 + .word .LANCHOR51 + .word .LANCHOR2 + .word .LANCHOR68 + .word .LANCHOR101 +.L1386: movs r2, #0 strb r2, [r6, #8] - ldr r2, .L1463 + ldr r2, .L1448 ldrh r2, [r2] cmp r2, r3 - bne .L1402 + bne .L1387 movw r2, #717 - ldr r1, .L1463+4 - ldr r0, .L1463+8 + ldr r1, .L1448+4 + ldr r0, .L1448+8 bl printf -.L1402: - ldr r3, .L1463+12 +.L1387: + ldr r3, .L1448+12 ldrh r2, [r6] ldrh r3, [r3] cmp r2, r3 - bne .L1403 + bne .L1388 movw r2, #718 - ldr r1, .L1463+4 - ldr r0, .L1463+8 + ldr r1, .L1448+4 + ldr r0, .L1448+8 bl printf -.L1403: - ldr r3, .L1463+16 +.L1388: + ldr r3, .L1448+16 ldrh r2, [r6] ldrh r3, [r3] cmp r2, r3 - bne .L1404 + bne .L1389 movw r2, #719 - ldr r1, .L1463+4 - ldr r0, .L1463+8 + ldr r1, .L1448+4 + ldr r0, .L1448+8 bl printf -.L1404: +.L1389: mov r0, r5 bl make_superblock - ldr r2, .L1463+20 + ldr r2, .L1448+20 movs r3, #0 ldrh r1, [r6] strh r3, [r2] @ movhi ldr r2, [r10] ldrh r1, [r2, r1, lsl #1] - ldr r2, .L1463+24 + ldr r2, .L1448+24 strh r3, [r6, #2] @ movhi strb r3, [r6, #6] strh r1, [r2] @ movhi -.L1393: - ldr r3, .L1463+28 +.L1378: + ldr r3, .L1448+28 movs r2, #1 str r2, [r3] - ldr r3, .L1463+32 + ldr r3, .L1448+32 ldrh r3, [r3] str r3, [sp, #16] ldr r3, [sp, #28] - cbz r3, .L1405 - ldr r3, .L1463+36 + cbz r3, .L1390 + ldr r3, .L1448+36 ldr r2, [sp, #16] ldrh r1, [r6] ldrh r3, [r3] muls r3, r2, r3 - ldr r2, .L1463+40 + ldr r2, .L1448+40 ldr r2, [r2] ldrh r2, [r2, r1, lsl #1] subs r3, r3, r2 @@ -10482,10 +10362,10 @@ rk_ftl_garbage_collect: addmi r3, r3, #3 add r4, r4, r3, asr #2 uxth r4, r4 -.L1405: +.L1390: ldrh r3, [r6, #2] ldr r1, [sp, #16] - ldr fp, .L1463+64 + ldr fp, .L1448+64 adds r2, r3, r4 cmp r2, r1 itt gt @@ -10495,27 +10375,27 @@ rk_ftl_garbage_collect: it gt uxthgt r4, r4 str r3, [sp, #24] -.L1408: +.L1393: ldrh r3, [sp, #24] cmp r4, r3 - bls .L1416 - ldr r3, .L1463+36 + bls .L1401 + ldr r3, .L1448+36 movw r10, #65535 ldrh r1, [r5, #2] mov ip, #20 ldr r0, [fp] ldrh lr, [r3] ldr r3, [sp, #24] - ldr r7, .L1463+44 + ldr r7, .L1448+44 adds r3, r1, r3 str r3, [sp, #20] movs r3, #0 str r3, [sp, #12] - b .L1417 -.L1410: + b .L1402 +.L1395: ldrh r2, [r7, #2]! cmp r2, r10 - beq .L1409 + beq .L1394 ldr r1, [sp, #12] mla r8, ip, r1, r0 ldr r1, [sp, #20] @@ -10525,27 +10405,27 @@ rk_ftl_garbage_collect: adds r2, r2, #1 uxth r2, r2 str r2, [sp, #12] -.L1409: +.L1394: adds r3, r3, #1 -.L1417: +.L1402: uxth r2, r3 cmp lr, r2 - bhi .L1410 + bhi .L1395 ldrb r2, [r5, #8] @ zero_extendqisi2 ldr r1, [sp, #12] bl FlashReadPages movs r3, #0 -.L1459: +.L1444: str r3, [sp, #20] ldr r2, [sp, #12] ldrh r3, [sp, #20] cmp r2, r3 - bhi .L1415 + bhi .L1400 ldr r3, [sp, #24] adds r3, r3, #1 str r3, [sp, #24] - b .L1408 -.L1415: + b .L1393 +.L1400: ldr r3, [sp, #20] movs r7, #20 muls r7, r3, r7 @@ -10553,20 +10433,20 @@ rk_ftl_garbage_collect: adds r2, r3, r7 ldr r3, [r3, r7] adds r3, r3, #1 - beq .L1412 + beq .L1397 ldr r8, [r2, #12] movw r3, #61589 ldrh r2, [r8] cmp r2, r3 - bne .L1412 + bne .L1397 ldr r10, [r8, #8] cmp r10, #-1 - bne .L1413 + bne .L1398 movw r2, #753 - ldr r1, .L1463+4 - ldr r0, .L1463+8 + ldr r1, .L1448+4 + ldr r0, .L1448+8 bl printf -.L1413: +.L1398: movs r2, #0 add r1, sp, #40 mov r0, r10 @@ -10576,10 +10456,10 @@ rk_ftl_garbage_collect: add r0, r0, r7 ldr r2, [r0, #4] cmp r2, r3 - bne .L1412 - ldr r2, .L1463+20 - ldr r10, .L1463+60 - ldr r1, .L1463+48 + bne .L1397 + ldr r2, .L1448+20 + ldr r10, .L1448+60 + ldr r1, .L1448+48 ldrh r3, [r2] str r1, [sp, #36] adds r3, r3, #1 @@ -10601,7 +10481,7 @@ rk_ftl_garbage_collect: ldr r0, [fp] mla r2, r1, r3, r2 add r0, r0, r7 - ldr r7, .L1463+16 + ldr r7, .L1448+16 ldr r1, [r0, #8] adds r3, r3, #1 str r1, [r2, #8] @@ -10612,7 +10492,7 @@ rk_ftl_garbage_collect: str r2, [r8, #12] ldrh r2, [r7] strh r2, [r8, #2] @ movhi - ldr r2, .L1463+52 + ldr r2, .L1448+52 str r3, [r10] ldr r2, [r2] str r2, [r8, #4] @@ -10620,105 +10500,105 @@ rk_ftl_garbage_collect: ldrb r2, [r7, #7] @ zero_extendqisi2 ldr r3, [r10] cmp r2, r3 - beq .L1414 + beq .L1399 ldrh r3, [r7, #4] - cbnz r3, .L1412 -.L1414: + cbnz r3, .L1397 +.L1399: bl Ftl_gc_temp_data_write_back - cbz r0, .L1412 - ldr r3, .L1463+28 + cbz r0, .L1397 + ldr r3, .L1448+28 movs r2, #0 movw r1, #65535 str r2, [r3] - ldr r3, .L1463+56 + ldr r3, .L1448+56 strh r1, [r3] @ movhi strh r2, [r3, #2] @ movhi - b .L1460 -.L1412: + b .L1445 +.L1397: ldr r3, [sp, #20] adds r3, r3, #1 - b .L1459 -.L1416: + b .L1444 +.L1401: ldrh r3, [r5, #2] add r4, r4, r3 ldr r3, [sp, #16] uxth r4, r4 cmp r3, r4 strh r4, [r5, #2] @ movhi - bhi .L1418 - ldr r3, .L1463+60 + bhi .L1403 + ldr r3, .L1448+60 ldr r3, [r3] - cbz r3, .L1419 + cbz r3, .L1404 bl Ftl_gc_temp_data_write_back - cbz r0, .L1419 - ldr r3, .L1463+28 + cbz r0, .L1404 + ldr r3, .L1448+28 movs r2, #0 str r2, [r3] - b .L1460 -.L1464: + b .L1445 +.L1449: .align 2 -.L1463: - .word .LANCHOR51 - .word .LANCHOR175 - .word .LC1 - .word .LANCHOR52 - .word .LANCHOR53 - .word .LANCHOR173 +.L1448: + .word .LANCHOR50 .word .LANCHOR174 - .word .LANCHOR94 - .word .LANCHOR19 - .word .LANCHOR3 - .word .LANCHOR42 - .word .LANCHOR145+14 - .word .LANCHOR104 - .word .LANCHOR83 - .word .LANCHOR145 - .word .LANCHOR62 - .word .LANCHOR66 -.L1419: - ldr r3, .L1465 + .word .LC1 + .word .LANCHOR51 + .word .LANCHOR52 + .word .LANCHOR172 + .word .LANCHOR173 + .word .LANCHOR93 + .word .LANCHOR18 + .word .LANCHOR2 + .word .LANCHOR41 + .word .LANCHOR144+14 + .word .LANCHOR103 + .word .LANCHOR82 + .word .LANCHOR144 + .word .LANCHOR61 + .word .LANCHOR65 +.L1404: + ldr r3, .L1450 ldrh r4, [r3] cmp r4, #0 - bne .L1420 - ldr r8, .L1465+28 + bne .L1405 + ldr r8, .L1450+28 ldrh r1, [r5] ldr r3, [r8] ldrh r3, [r3, r1, lsl #1] cmp r3, #0 - beq .L1420 - ldr r0, .L1465+4 - ldr r10, .L1465+32 + beq .L1405 + ldr r0, .L1450+4 + ldr r10, .L1450+32 ldrh r2, [r5, #2] ldrh r0, [r0] str r3, [sp] mov r3, r4 str r0, [sp, #4] - ldr r0, .L1465+8 + ldr r0, .L1450+8 bl printf -.L1421: +.L1406: ldr r3, [r10] cmp r4, r3 - bcs .L1423 + bcs .L1408 movs r2, #0 add r1, sp, #44 mov r0, r4 bl log2phys ldr r7, [sp, #44] adds r3, r7, #1 - beq .L1422 + beq .L1407 ubfx r0, r7, #10, #16 bl P2V_block_in_plane ldrh r3, [r5] cmp r3, r0 - bne .L1422 + bne .L1407 mov r2, r7 mov r1, r4 - ldr r0, .L1465+12 + ldr r0, .L1450+12 bl printf -.L1423: +.L1408: ldr r3, [r10] cmp r4, r3 - bcc .L1420 + bcc .L1405 ldrh r2, [r5] movs r1, #0 ldr r3, [r8] @@ -10727,41 +10607,41 @@ rk_ftl_garbage_collect: bl update_vpc_list bl l2p_flush bl FtlVpcTblFlush -.L1420: +.L1405: movw r3, #65535 strh r3, [r5] @ movhi -.L1418: - ldr r3, .L1465+16 +.L1403: + ldr r3, .L1450+16 movs r2, #0 str r2, [r3] - ldr r3, .L1465+20 + ldr r3, .L1450+20 ldrh r0, [r3] cmp r0, #2 - bhi .L1426 - ldr r3, .L1465+24 + bhi .L1411 + ldr r3, .L1450+24 ldrh r4, [r3] - b .L1427 -.L1422: + b .L1412 +.L1407: adds r4, r4, #1 - b .L1421 -.L1426: + b .L1406 +.L1411: adds r0, r0, #1 - b .L1371 -.L1428: + b .L1356 +.L1413: movs r0, #0 - b .L1371 -.L1466: + b .L1356 +.L1451: .align 2 -.L1465: +.L1450: + .word .LANCHOR172 .word .LANCHOR173 - .word .LANCHOR174 .word .LC42 .word .LC43 - .word .LANCHOR94 - .word .LANCHOR48 - .word .LANCHOR19 - .word .LANCHOR42 - .word .LANCHOR152 + .word .LANCHOR93 + .word .LANCHOR47 + .word .LANCHOR18 + .word .LANCHOR41 + .word .LANCHOR151 .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect .section .text.FtlRead,"ax",%progbits .align 1 @@ -10777,291 +10657,300 @@ FtlRead: cmp r0, #16 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #56 - mov r6, r1 - mov r8, r3 - str r2, [sp, #24] - bne .L1468 + mov r5, r1 + mov r10, r3 + str r2, [sp, #4] + bne .L1453 mov r2, r3 - ldr r1, [sp, #24] - add r0, r6, #256 + ldr r1, [sp, #4] + add r0, r5, #256 bl FtlVendorPartRead - str r0, [sp, #4] -.L1467: - ldr r0, [sp, #4] + mov r4, r0 +.L1452: + mov r0, r4 add sp, sp, #56 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1468: - ldr r3, [sp, #24] - adds r3, r1, r3 - str r3, [sp, #12] - ldr r3, .L1500 - ldr r2, [sp, #12] +.L1453: + ldr r3, .L1487 ldr r3, [r3] + cmp r1, r3 + bcs .L1476 + ldr r2, [sp, #4] cmp r2, r3 - bhi .L1489 - ldr r3, .L1500+4 - ldr r3, [r3] - adds r4, r3, #1 - beq .L1490 - ldr r3, .L1500+8 - mov r0, r6 - movs r7, #0 - mov r5, r7 + bhi .L1476 + adds r2, r1, r2 + cmp r3, r2 + str r2, [sp, #12] + bcc .L1476 + ldr r3, .L1487+4 + ldr r4, [r3] + adds r6, r4, #1 + beq .L1452 + ldr r3, .L1487+8 + mov r0, r5 + mov r8, #0 + mov r7, r8 ldrh r4, [r3] mov r1, r4 bl __aeabi_uidiv ldr r3, [sp, #12] mov r1, r4 str r0, [sp, #16] + mov r4, r8 subs r0, r3, #1 bl __aeabi_uidiv ldr r3, [sp, #16] - ldr r2, .L1500+12 - ldr r1, [sp, #24] + ldr r2, .L1487+12 + ldr r1, [sp, #4] rsb r3, r3, #1 - ldr r4, [sp, #16] + ldr r6, [sp, #16] add r3, r3, r0 str r0, [sp, #20] str r3, [sp, #8] ldr r3, [r2] - str r7, [sp, #32] - str r7, [sp, #28] + str r8, [sp, #28] + str r8, [sp, #24] add r3, r3, r1 ldr r1, [sp, #8] str r3, [r2] - ldr r2, .L1500+16 - str r7, [sp, #4] + ldr r2, .L1487+16 ldr r3, [r2] add r3, r3, r1 str r3, [r2] -.L1470: +.L1455: ldr r3, [sp, #8] - cbnz r3, .L1487 - ldr r3, .L1500+20 + cbnz r3, .L1472 + ldr r3, .L1487+20 ldrh r3, [r3] - cbnz r3, .L1488 - ldr r3, .L1500+24 + cbnz r3, .L1473 + ldr r3, .L1487+24 ldrh r3, [r3] cmp r3, #31 - bhi .L1467 -.L1488: + bhi .L1452 +.L1473: movs r1, #1 movs r0, #0 bl rk_ftl_garbage_collect - b .L1467 -.L1487: + b .L1452 +.L1472: movs r2, #0 add r1, sp, #52 - mov r0, r4 + mov r0, r6 bl log2phys ldr r3, [sp, #52] adds r0, r3, #1 - bne .L1471 - ldr fp, .L1500+8 - mov r10, #0 -.L1472: - ldrh r0, [fp] - cmp r10, r0 - bcc .L1474 -.L1475: + bne .L1456 + ldr r3, .L1487+8 + mov fp, #0 +.L1457: + ldrh r0, [r3] + cmp fp, r0 + bcc .L1459 +.L1460: ldr r3, [sp, #8] - adds r4, r4, #1 + adds r6, r6, #1 subs r3, r3, #1 str r3, [sp, #8] - beq .L1479 - ldr r3, .L1500+28 + beq .L1464 + ldr r3, .L1487+28 ldrh r3, [r3] - cmp r5, r3, lsl #2 - bne .L1470 -.L1479: - cmp r5, #0 - beq .L1470 - ldr r3, .L1500+32 + cmp r7, r3, lsl #2 + bne .L1455 +.L1464: + cmp r7, #0 + beq .L1455 + ldr r3, .L1487+32 movs r2, #0 - mov r1, r5 - mov r10, #0 + mov r1, r7 + mov fp, #0 ldr r0, [r3] bl FlashReadPages - lsls r3, r7, #9 + lsl r3, r8, #9 str r3, [sp, #44] - ldr r3, [sp, #28] + ldr r3, [sp, #24] lsls r3, r3, #9 str r3, [sp, #36] - ldr r3, [sp, #32] + ldr r3, [sp, #28] lsls r3, r3, #9 str r3, [sp, #40] -.L1486: +.L1471: movs r3, #20 - mul fp, r3, r10 - ldr r3, .L1500+32 + mul r3, r3, fp + str r3, [sp, #32] + ldr r3, .L1487+32 ldr r2, [r3] + ldr r3, [sp, #32] + add r2, r2, r3 ldr r3, [sp, #16] - add r2, r2, fp ldr r1, [r2, #16] cmp r3, r1 - bne .L1481 + bne .L1466 ldr r1, [r2, #8] - ldr r2, .L1500+36 + ldr r2, .L1487+36 ldr r2, [r2] cmp r1, r2 - bne .L1482 + bne .L1467 ldr r3, [sp, #36] - mov r0, r8 + mov r0, r10 ldr r2, [sp, #40] add r1, r1, r3 -.L1499: +.L1486: bl ftl_memcpy -.L1482: - ldr r3, .L1500+32 +.L1467: + ldr r3, .L1487+32 + ldr r2, [sp, #32] ldr r3, [r3] - add r2, r3, fp - ldr r3, [r3, fp] + adds r2, r3, r2 ldr r0, [r2, #12] ldr r1, [r2, #16] ldr r0, [r0, #8] cmp r1, r0 itttt ne - ldrne r0, .L1500+40 + ldrne r0, .L1487+40 ldrne r1, [r0, #72] addne r1, r1, #1 strne r1, [r0, #72] + ldr r1, [sp, #32] + ldr r3, [r3, r1] adds r1, r3, #1 - bne .L1484 - ldr r1, .L1500+40 - str r3, [sp, #4] + bne .L1469 + ldr r1, .L1487+40 + mov r4, r3 ldr r2, [r1, #72] adds r2, r2, #1 str r2, [r1, #72] -.L1485: - add r10, r10, #1 - cmp r5, r10 - bne .L1486 - movs r5, #0 - b .L1470 -.L1474: - mla r0, r0, r4, r10 - cmp r6, r0 - bhi .L1473 - ldr r3, [sp, #12] - cmp r3, r0 - bls .L1473 - subs r0, r0, r6 +.L1470: + add fp, fp, #1 + cmp r7, fp + bne .L1471 + movs r7, #0 + b .L1455 +.L1459: + mla r0, r0, r6, fp + cmp r5, r0 + bhi .L1458 + ldr r2, [sp, #12] + cmp r2, r0 + bls .L1458 + subs r0, r0, r5 mov r2, #512 movs r1, #0 - add r0, r8, r0, lsl #9 - bl ftl_memset -.L1473: - add r10, r10, #1 - b .L1472 -.L1471: - ldr r2, .L1500+32 - mov r10, #20 - ldr r2, [r2] - mla r10, r10, r5, r2 - str r3, [r10, #4] - ldr r3, [sp, #16] - cmp r4, r3 - ldr r3, .L1500+8 - bne .L1476 - ldr r2, .L1500+36 - mov r0, r6 - ldrh fp, [r3] - ldr r2, [r2] - mov r1, fp - str r2, [r10, #8] - bl __aeabi_uidivmod - ldr r2, [sp, #24] - sub r3, fp, r1 - str r1, [sp, #28] - cmp r3, r2 - it cs - movcs r3, r2 - cmp fp, r3 + add r0, r10, r0, lsl #9 str r3, [sp, #32] - bne .L1477 - str r8, [r10, #8] -.L1477: - ldr r3, .L1500+44 - ldr r2, .L1500+48 - str r4, [r10, #16] + bl ftl_memset + ldr r3, [sp, #32] +.L1458: + add fp, fp, #1 + b .L1457 +.L1456: + ldr r2, .L1487+32 + mov fp, #20 + ldr r2, [r2] + mla fp, fp, r7, r2 + str r3, [fp, #4] + ldr r3, [sp, #16] + cmp r6, r3 + ldr r3, .L1487+8 + bne .L1461 + ldr r2, .L1487+36 + mov r0, r5 ldrh r3, [r3] ldr r2, [r2] - muls r3, r5, r3 - adds r5, r5, #1 + mov r1, r3 + str r3, [sp, #28] + str r2, [fp, #8] + bl __aeabi_uidivmod + ldr r3, [sp, #28] + str r1, [sp, #24] + subs r2, r3, r1 + ldr r1, [sp, #4] + cmp r2, r1 + it cs + movcs r2, r1 + cmp r3, r2 + str r2, [sp, #28] + bne .L1462 + str r10, [fp, #8] +.L1462: + ldr r3, .L1487+44 + ldr r2, .L1487+48 + str r6, [fp, #16] + ldrh r3, [r3] + ldr r2, [r2] + muls r3, r7, r3 + adds r7, r7, #1 bic r3, r3, #3 add r3, r3, r2 - str r3, [r10, #12] - b .L1475 -.L1476: + str r3, [fp, #12] + b .L1460 +.L1461: ldr r2, [sp, #20] - cmp r4, r2 - bne .L1478 - ldr r2, .L1500+52 + cmp r6, r2 + bne .L1463 + ldr r2, .L1487+52 ldr r1, [sp, #12] ldr r2, [r2] - str r2, [r10, #8] + str r2, [fp, #8] ldrh r2, [r3] - mul r3, r2, r4 - subs r7, r1, r3 - cmp r2, r7 - bne .L1477 -.L1498: - subs r3, r3, r6 - add r3, r8, r3, lsl #9 - str r3, [r10, #8] - b .L1477 -.L1478: + mul r3, r2, r6 + sub r8, r1, r3 + cmp r2, r8 + bne .L1462 +.L1485: + subs r3, r3, r5 + add r3, r10, r3, lsl #9 + str r3, [fp, #8] + b .L1462 +.L1463: ldrh r3, [r3] - muls r3, r4, r3 - b .L1498 -.L1481: + muls r3, r6, r3 + b .L1485 +.L1466: ldr r3, [sp, #20] cmp r3, r1 - bne .L1482 - ldr r3, .L1500+52 + bne .L1467 + ldr r3, .L1487+52 ldr r1, [r2, #8] ldr r2, [r3] cmp r1, r2 - bne .L1482 - ldr r2, .L1500+8 + bne .L1467 + ldr r2, .L1487+8 ldr r3, [sp, #20] ldrh r0, [r2] ldr r2, [sp, #44] muls r0, r3, r0 - subs r0, r0, r6 - add r0, r8, r0, lsl #9 - b .L1499 -.L1484: + subs r0, r0, r5 + add r0, r10, r0, lsl #9 + b .L1486 +.L1469: cmp r3, #256 - bne .L1485 + bne .L1470 ldr r0, [r2, #4] ubfx r0, r0, #10, #16 bl P2V_block_in_plane bl FtlGcRefreshBlock - b .L1485 -.L1489: - mov r3, #-1 -.L1490: - str r3, [sp, #4] - b .L1467 -.L1501: + b .L1470 +.L1476: + mov r4, #-1 + b .L1452 +.L1488: .align 2 -.L1500: - .word .LANCHOR34 - .word .LANCHOR166 - .word .LANCHOR12 - .word .LANCHOR163 - .word .LANCHOR89 - .word .LANCHOR74 - .word .LANCHOR48 - .word .LANCHOR3 - .word .LANCHOR103 +.L1487: + .word .LANCHOR33 + .word .LANCHOR165 + .word .LANCHOR11 + .word .LANCHOR162 + .word .LANCHOR88 + .word .LANCHOR73 + .word .LANCHOR47 + .word .LANCHOR2 + .word .LANCHOR102 + .word .LANCHOR108 + .word .LANCHOR134 + .word .LANCHOR23 + .word .LANCHOR114 .word .LANCHOR109 - .word .LANCHOR135 - .word .LANCHOR24 - .word .LANCHOR115 - .word .LANCHOR110 .size FtlRead, .-FtlRead .section .text.sftl_read,"ax",%progbits .align 1 @@ -11095,35 +10984,39 @@ FtlWrite: cmp r0, #16 push {r4, r5, r6, r7, r8, r10, fp, lr} sub sp, sp, #72 - mov fp, r1 - str r2, [sp, #20] - str r3, [sp, #16] - bne .L1504 + mov r10, r1 + str r2, [sp, #16] + str r3, [sp, #20] + bne .L1491 mov r2, r3 - ldr r1, [sp, #20] - add r0, fp, #256 + ldr r1, [sp, #16] + add r0, r10, #256 bl FtlVendorPartWrite -.L1503: +.L1490: add sp, sp, #72 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1504: - ldr r3, [sp, #20] - adds r4, r1, r3 - ldr r3, .L1548 +.L1491: + ldr r3, .L1537 ldr r3, [r3] - cmp r4, r3 - bhi .L1537 - ldr r3, .L1548+4 + cmp r1, r3 + bcs .L1526 + ldr r2, [sp, #16] + cmp r2, r3 + bhi .L1526 + adds r4, r1, r2 + cmp r3, r4 + bcc .L1526 + ldr r3, .L1537+4 ldr r0, [r3] adds r1, r0, #1 - beq .L1503 - ldr r3, .L1548+8 + beq .L1490 + ldr r3, .L1537+8 mov r2, #2048 - mov r0, fp - ldr r7, .L1548+12 + mov r0, r10 + ldr r7, .L1537+12 str r2, [r3] - ldr r3, .L1548+16 + ldr r3, .L1537+16 ldrh r5, [r3] mov r1, r5 bl __aeabi_uidiv @@ -11132,10 +11025,10 @@ FtlWrite: subs r0, r4, #1 bl __aeabi_uidiv ldr r2, [sp, #12] - ldr r1, [sp, #20] + ldr r1, [sp, #16] ldr r5, [sp, #12] subs r3, r0, r2 - ldr r2, .L1548+20 + ldr r2, .L1537+20 str r3, [sp, #32] adds r3, r3, #1 str r3, [sp, #8] @@ -11144,39 +11037,39 @@ FtlWrite: add r3, r3, r1 ldr r1, [sp, #8] str r3, [r2] - ldr r2, .L1548+24 + ldr r2, .L1537+24 ldr r3, [r2] add r3, r3, r1 str r3, [r2] -.L1506: +.L1493: ldr r3, [sp, #8] - cbnz r3, .L1532 - ldr r5, .L1548+28 + cbnz r3, .L1519 + ldr r5, .L1537+28 mov r0, r3 ldr r1, [sp, #32] bl rk_ftl_garbage_collect ldrh r2, [r5] cmp r2, #5 - bls .L1533 -.L1535: + bls .L1520 +.L1522: movs r0, #0 - b .L1503 -.L1532: - ldr r4, .L1548+32 + b .L1490 +.L1519: + ldr r4, .L1537+32 ldrb r2, [r7, #6] @ zero_extendqisi2 ldrh r3, [r4] cmp r2, r3 - bcc .L1507 + bcc .L1494 movw r2, #1041 - ldr r1, .L1548+36 - ldr r0, .L1548+40 + ldr r1, .L1537+36 + ldr r0, .L1537+40 bl printf -.L1507: +.L1494: ldrh r3, [r7, #4] - cbnz r3, .L1508 + cbnz r3, .L1495 mov r0, r7 bl allocate_new_data_superblock -.L1508: +.L1495: ldrb r3, [r7, #7] @ zero_extendqisi2 ldrh r2, [r7, #4] lsls r3, r3, #2 @@ -11191,22 +11084,22 @@ FtlWrite: str r3, [sp, #44] ldrh r3, [r4] cmp r2, r3 - bcc .L1509 + bcc .L1496 movw r2, #1074 - ldr r1, .L1548+36 - ldr r0, .L1548+40 + ldr r1, .L1537+36 + ldr r0, .L1537+40 bl printf -.L1509: - ldr r8, .L1548+44 +.L1496: + ldr r8, .L1537+44 movs r3, #0 str r3, [sp, #4] -.L1510: +.L1497: ldr r3, [sp, #4] ldr r2, [sp, #44] cmp r3, r2 - bne .L1530 -.L1511: - ldr r0, .L1548+44 + bne .L1517 +.L1498: + ldr r0, .L1537+44 mov r3, r7 movs r2, #0 ldr r1, [sp, #4] @@ -11215,21 +11108,21 @@ FtlWrite: ldr r3, [sp, #4] ldr r2, [sp, #8] cmp r3, r2 - bls .L1531 + bls .L1518 mov r2, #1152 - ldr r1, .L1548+36 - ldr r0, .L1548+40 + ldr r1, .L1537+36 + ldr r0, .L1537+40 bl printf -.L1531: +.L1518: ldr r3, [sp, #8] ldr r2, [sp, #4] subs r3, r3, r2 str r3, [sp, #8] - b .L1506 -.L1530: + b .L1493 +.L1517: ldrh r3, [r7, #4] cmp r3, #0 - beq .L1511 + beq .L1498 movs r2, #0 add r1, sp, #48 mov r0, r5 @@ -11237,7 +11130,7 @@ FtlWrite: bl log2phys mov r0, r7 bl get_new_active_ppa - ldr r2, .L1548+48 + ldr r2, .L1537+48 ldr r1, [sp, #4] ldr r3, [sp, #4] ldrh r2, [r2] @@ -11249,107 +11142,107 @@ FtlWrite: bic r1, r1, #3 str r5, [r3, #16] str r1, [sp, #36] - ldr r1, .L1548+52 + ldr r1, .L1537+52 ldr r0, [sp, #36] ldr r1, [r1] - add r10, r1, r0 + add fp, r1, r0 str r1, [sp, #40] - str r10, [r3, #12] + str fp, [r3, #12] movs r1, #0 - mov r0, r10 + mov r0, fp bl ftl_memset ldr r3, [sp, #12] - ldr r2, .L1548+16 + ldr r2, .L1537+16 cmp r5, r3 - beq .L1512 + beq .L1499 ldr r3, [sp, #28] cmp r5, r3 - bne .L1543 + bne .L1532 ldrh r2, [r2] - ldr r3, [sp, #20] + ldr r3, [sp, #16] smulbb r2, r2, r5 - add r4, fp, r3 + add r4, r10, r3 movs r3, #0 str r3, [sp, #24] subs r4, r4, r2 uxth r4, r4 - b .L1515 -.L1512: + b .L1502 +.L1499: ldrh r4, [r2] - mov r0, fp + mov r0, r10 mov r1, r4 bl __aeabi_uidivmod - ldr r3, [sp, #20] + ldr r3, [sp, #16] subs r4, r4, r1 str r1, [sp, #24] cmp r4, r3 it cs movcs r4, r3 -.L1515: - ldr r3, .L1548+16 +.L1502: + ldr r3, .L1537+16 ldrh r3, [r3] cmp r4, r3 ldr r3, [sp, #12] - bne .L1516 + bne .L1503 cmp r5, r3 ldr r3, [r8] add r6, r6, r3 - bne .L1517 - ldr r3, [sp, #16] -.L1545: + bne .L1504 + ldr r3, [sp, #20] +.L1534: str r3, [r6, #8] - b .L1518 -.L1517: + b .L1505 +.L1504: muls r4, r5, r4 - ldr r3, [sp, #16] - sub r4, r4, fp + ldr r3, [sp, #20] + sub r4, r4, r10 add r4, r3, r4, lsl #9 str r4, [r6, #8] -.L1518: - ldr r3, .L1548+32 +.L1505: + ldr r3, .L1537+32 ldrb r2, [r7, #6] @ zero_extendqisi2 ldrh r3, [r3] cmp r2, r3 - bcc .L1527 + bcc .L1514 movw r2, #1143 - ldr r1, .L1548+36 - ldr r0, .L1548+40 + ldr r1, .L1537+36 + ldr r0, .L1537+40 bl printf -.L1527: +.L1514: ldr r2, [sp, #40] movw r3, #61589 ldr r1, [sp, #36] strh r3, [r2, r1] @ movhi - ldr r2, .L1548+56 - str r5, [r10, #8] + ldr r2, .L1537+56 + str r5, [fp, #8] adds r5, r5, #1 ldr r3, [r2] - str r3, [r10, #4] + str r3, [fp, #4] adds r3, r3, #1 adds r1, r3, #1 it eq moveq r3, #0 str r3, [r2] ldr r3, [sp, #48] - str r3, [r10, #12] + str r3, [fp, #12] ldrh r3, [r7] - strh r3, [r10, #2] @ movhi + strh r3, [fp, #2] @ movhi ldr r3, [sp, #4] adds r3, r3, #1 str r3, [sp, #4] - b .L1510 -.L1516: + b .L1497 +.L1503: cmp r5, r3 ldr r3, [r8] ite eq - ldreq r2, .L1548+60 - ldrne r2, .L1548+64 + ldreq r2, .L1537+60 + ldrne r2, .L1537+64 add r3, r3, r6 ldr r2, [r2] str r2, [r3, #8] ldr r3, [sp, #48] adds r2, r3, #1 - beq .L1521 + beq .L1508 str r3, [sp, #56] movs r1, #1 ldr r3, [r8] @@ -11364,125 +11257,124 @@ FtlWrite: bl FlashReadPages ldr r3, [sp, #52] adds r0, r3, #1 - bne .L1522 - ldr r1, .L1548+68 - ldr r0, .L1548+72 + bne .L1509 + ldr r1, .L1537+68 + ldr r0, .L1537+72 ldr r2, [r1, #72] adds r2, r2, #1 str r2, [r1, #72] mov r2, r5 - ldr r1, [r10, #8] + ldr r1, [fp, #8] bl printf -.L1525: +.L1512: ldr r3, [sp, #12] lsls r2, r4, #9 cmp r5, r3 - bne .L1526 + bne .L1513 ldr r3, [r8] - ldr r1, [sp, #16] + ldr r1, [sp, #20] add r6, r6, r3 ldr r3, [sp, #24] ldr r0, [r6, #8] add r0, r0, r3, lsl #9 -.L1546: +.L1535: bl ftl_memcpy - b .L1518 -.L1522: - ldr r1, [r10, #8] + b .L1505 +.L1509: + ldr r1, [fp, #8] cmp r5, r1 - beq .L1524 - ldr r2, .L1548+68 - ldr r0, .L1548+76 + beq .L1511 + ldr r2, .L1537+68 + ldr r0, .L1537+76 ldr r3, [r2, #72] adds r3, r3, #1 str r3, [r2, #72] mov r2, r5 bl printf -.L1524: - ldr r3, [r10, #8] +.L1511: + ldr r3, [fp, #8] cmp r5, r3 - beq .L1525 + beq .L1512 mov r2, #1128 - ldr r1, .L1548+36 - ldr r0, .L1548+40 + ldr r1, .L1537+36 + ldr r0, .L1537+40 bl printf - b .L1525 -.L1521: + b .L1512 +.L1538: + .align 2 +.L1537: + .word .LANCHOR33 + .word .LANCHOR165 + .word .LANCHOR175 + .word .LANCHOR50 + .word .LANCHOR11 + .word .LANCHOR161 + .word .LANCHOR84 + .word .LANCHOR47 + .word .LANCHOR2 + .word .LANCHOR176 + .word .LC1 + .word .LANCHOR104 + .word .LANCHOR23 + .word .LANCHOR114 + .word .LANCHOR82 + .word .LANCHOR108 + .word .LANCHOR109 + .word .LANCHOR134 + .word .LC44 + .word .LC45 +.L1508: ldr r3, [r8] movs r1, #0 - ldr r2, .L1548+80 + ldr r2, .L1539 add r3, r3, r6 ldrh r2, [r2] ldr r0, [r3, #8] bl ftl_memset - b .L1525 -.L1549: - .align 2 -.L1548: - .word .LANCHOR34 - .word .LANCHOR166 - .word .LANCHOR176 - .word .LANCHOR51 - .word .LANCHOR12 - .word .LANCHOR162 - .word .LANCHOR85 - .word .LANCHOR48 - .word .LANCHOR3 - .word .LANCHOR177 - .word .LC1 - .word .LANCHOR105 - .word .LANCHOR24 - .word .LANCHOR115 - .word .LANCHOR83 - .word .LANCHOR109 - .word .LANCHOR110 - .word .LANCHOR135 - .word .LC44 - .word .LC45 - .word .LANCHOR23 -.L1526: - ldr r3, .L1550 + b .L1512 +.L1513: + ldr r3, .L1539+4 ldrh r1, [r3] ldr r3, [r8] muls r1, r5, r1 add r6, r6, r3 - ldr r3, [sp, #16] + ldr r3, [sp, #20] ldr r0, [r6, #8] - sub r1, r1, fp + sub r1, r1, r10 add r1, r3, r1, lsl #9 - b .L1546 -.L1543: + b .L1535 +.L1532: ldr r3, [r8] add r6, r6, r3 ldrh r3, [r2] - ldr r2, [sp, #16] + ldr r2, [sp, #20] muls r3, r5, r3 - sub r3, r3, fp + sub r3, r3, r10 add r3, r2, r3, lsl #9 - b .L1545 -.L1533: - ldr r6, .L1550+4 + b .L1534 +.L1520: + ldr r6, .L1539+8 mov r4, #256 - ldr r7, .L1550+8 -.L1536: + ldr r7, .L1539+12 +.L1523: ldrh r3, [r6] movw r2, #65535 cmp r3, r2 - bne .L1534 + bne .L1521 ldrh r2, [r7] cmp r2, r3 - bne .L1534 + bne .L1521 movs r0, #0 bl List_get_gc_head_node uxth r0, r0 bl FtlGcRefreshBlock -.L1534: - ldr r2, .L1550+12 +.L1521: + ldr r2, .L1539+16 movs r3, #128 movs r1, #1 mov r0, r1 strh r3, [r2] @ movhi - ldr r2, .L1550+16 + ldr r2, .L1539+20 strh r3, [r2] @ movhi bl rk_ftl_garbage_collect movs r1, #1 @@ -11490,21 +11382,22 @@ FtlWrite: bl rk_ftl_garbage_collect ldrh r3, [r5] cmp r3, #2 - bhi .L1535 + bhi .L1522 subs r4, r4, #1 - bne .L1536 - b .L1535 -.L1537: + bne .L1523 + b .L1522 +.L1526: mov r0, #-1 - b .L1503 -.L1551: + b .L1490 +.L1540: .align 2 -.L1550: - .word .LANCHOR12 - .word .LANCHOR145 - .word .LANCHOR72 - .word .LANCHOR101 +.L1539: + .word .LANCHOR22 + .word .LANCHOR11 + .word .LANCHOR144 + .word .LANCHOR71 .word .LANCHOR100 + .word .LANCHOR99 .size FtlWrite, .-FtlWrite .section .text.sftl_gc,"ax",%progbits .align 1 @@ -11535,16 +11428,16 @@ FtlLoadSysInfo: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, r8, r10, fp, lr} movs r1, #0 - ldr r8, .L1583+144 + ldr r8, .L1572+140 sub sp, sp, #24 - ldr r7, .L1583 + ldr r7, .L1572 ldr r3, [r8] - ldr r4, .L1583+4 - ldr fp, .L1583+148 + ldr r4, .L1572+4 + ldr fp, .L1572+144 ldrh r2, [r7] - ldr r5, .L1583+8 + ldr r5, .L1572+8 str r3, [r4, #8] - ldr r6, .L1583+12 + ldr r6, .L1572+12 ldr r3, [fp] lsls r2, r2, #1 ldr r0, [r5] @@ -11554,33 +11447,33 @@ FtlLoadSysInfo: movw r3, #65535 str r5, [sp, #16] cmp r0, r3 - bne .L1554 -.L1565: + bne .L1543 +.L1554: mov r0, #-1 -.L1553: +.L1542: add sp, sp, #24 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1554: +.L1543: movs r1, #1 bl FtlGetLastWrittenPage ldrsh r10, [r6] sxth r5, r0 adds r0, r0, #1 strh r0, [r6, #2] @ movhi -.L1556: +.L1545: cmp r5, #0 - bge .L1562 - movw r2, #1465 - ldr r1, .L1583+16 - ldr r0, .L1583+20 + bge .L1551 + movw r2, #1467 + ldr r1, .L1572+16 + ldr r0, .L1572+20 bl printf - b .L1561 -.L1562: + b .L1550 +.L1551: orr r3, r5, r10, lsl #10 movs r2, #1 mov r1, r2 - ldr r0, .L1583+4 + ldr r0, .L1572+4 str r3, [r4, #4] ldr r3, [r8] str r3, [r4, #8] @@ -11588,141 +11481,130 @@ FtlLoadSysInfo: ldr r3, [r4, #12] ldr r3, [r3, #12] str r3, [sp, #20] - cbz r3, .L1557 + cbz r3, .L1546 ldr r2, [r4] adds r2, r2, #1 - beq .L1557 - ldr r2, .L1583+24 + beq .L1546 + ldr r2, .L1572+24 ldr r0, [r4, #8] ldrh r1, [r2] bl js_hash ldr r3, [sp, #20] cmp r3, r0 - beq .L1557 + beq .L1546 str r0, [sp, #8] mov r2, r10 str r3, [sp, #4] ldrh r3, [r6, #4] - ldr r1, .L1583+16 - ldr r0, .L1583+28 + ldr r1, .L1572+16 + ldr r0, .L1572+28 str r3, [sp] mov r3, r5 bl printf - cbnz r5, .L1558 + cbnz r5, .L1547 ldrh r3, [r6, #4] cmp r10, r3 - beq .L1558 + beq .L1547 sxth r10, r3 - ldr r3, .L1583+32 + ldr r3, .L1572+32 ldrh r5, [r3] -.L1560: +.L1549: subs r5, r5, #1 sxth r5, r5 - b .L1556 -.L1558: + b .L1545 +.L1547: mov r3, #-1 str r3, [r4] -.L1557: +.L1546: ldr r3, [r4] adds r3, r3, #1 - beq .L1560 + beq .L1549 ldr r3, [r8] - ldr r2, .L1583+36 + ldr r2, .L1572+36 ldr r3, [r3] cmp r3, r2 - bne .L1560 + bne .L1549 ldr r3, [fp] ldrh r2, [r3] movw r3, #61604 cmp r2, r3 - bne .L1560 -.L1561: - ldr r2, .L1583+24 + bne .L1549 +.L1550: + ldr r2, .L1572+24 ldrh r3, [r7] ldrh r2, [r2] adds r3, r3, #24 cmp r2, r3, lsl #1 - bcs .L1564 - movw r2, #1467 - ldr r1, .L1583+16 - ldr r0, .L1583+20 + bcs .L1553 + movw r2, #1469 + ldr r1, .L1572+16 + ldr r0, .L1572+20 bl printf -.L1564: - ldr r5, .L1583+40 +.L1553: + ldr r5, .L1572+40 movs r2, #48 ldr r1, [r4, #8] mov r0, r5 bl ftl_memcpy ldrh r2, [r7] ldr r1, [r4, #8] + mov r4, r5 ldr r3, [sp, #16] lsls r2, r2, #1 adds r1, r1, #48 ldr r0, [r3] bl ftl_memcpy - ldrh r1, [r7] - ldr r3, [r4, #8] - mov r4, r5 - lsrs r2, r1, #3 - adds r1, r1, #24 - lsls r1, r1, #1 - adds r2, r2, #4 - bic r1, r1, #3 - add r1, r1, r3 - ldr r3, .L1583+44 - ldr r0, [r3] - bl ftl_memcpy ldr r2, [r5] - ldr r3, .L1583+36 + ldr r3, .L1572+36 cmp r2, r3 - bne .L1565 - ldr r3, .L1583+48 + bne .L1554 + ldr r3, .L1572+44 ldrb r2, [r4, #10] @ zero_extendqisi2 ldrh r5, [r5, #8] ldrh r3, [r3] strh r5, [r6, #6] @ movhi cmp r2, r3 - bne .L1565 - ldr r3, .L1583+52 - ldr r2, .L1583+56 + bne .L1554 + ldr r3, .L1572+48 + ldr r2, .L1572+52 str r5, [r3] - ldr r3, .L1583+60 + ldr r3, .L1572+56 ldrh r3, [r3] muls r3, r5, r3 str r3, [r2] - ldr r2, .L1583+64 + ldr r2, .L1572+60 ldrh r2, [r2] muls r3, r2, r3 - ldr r2, .L1583+68 + ldr r2, .L1572+64 str r3, [r2] - ldr r3, .L1583+72 + ldr r3, .L1572+68 ldr r6, [r3] - ldr r3, .L1583+76 + ldr r3, .L1572+72 ldrh r0, [r3, #6] - ldr r3, .L1583+80 + ldr r3, .L1572+76 subs r0, r6, r0 ldrh r1, [r3] subs r0, r0, r5 bl __aeabi_uidiv - ldr r3, .L1583+84 + ldr r3, .L1572+80 cmp r5, r6 strh r0, [r3] @ movhi - bls .L1566 - movw r2, #1489 - ldr r1, .L1583+16 - ldr r0, .L1583+20 + bls .L1555 + movw r2, #1491 + ldr r1, .L1572+16 + ldr r0, .L1572+20 bl printf -.L1566: +.L1555: ldrh r2, [r4, #16] - ldr r3, .L1583+88 + ldr r3, .L1572+84 ldrh ip, [r4, #14] - ldr r7, .L1583+92 + ldr r7, .L1572+88 lsrs r1, r2, #6 and r2, r2, #63 strb r2, [r3, #6] ldrb r2, [r4, #11] @ zero_extendqisi2 strh r1, [r3, #2] @ movhi - ldr r1, .L1583+96 + ldr r1, .L1572+92 strb r2, [r3, #8] ldrh r2, [r4, #18] strh ip, [r3] @ movhi @@ -11741,7 +11623,7 @@ FtlLoadSysInfo: strh r5, [r1, #2] @ movhi ldrh r5, [r4, #22] strb r2, [r1, #8] - ldr r2, .L1583+100 + ldr r2, .L1572+96 strh r5, [r2] @ movhi ldrh r5, [r4, #24] lsrs r6, r5, #6 @@ -11751,31 +11633,31 @@ FtlLoadSysInfo: strh r6, [r2, #2] @ movhi ldr r6, [r4, #32] strb r5, [r2, #8] - ldr r5, .L1583+104 + ldr r5, .L1572+100 str r3, [r5] - ldr r5, .L1583+108 + ldr r5, .L1572+104 str r3, [r5] - ldr r5, .L1583+112 + ldr r5, .L1572+108 str r3, [r5] - ldr r5, .L1583+116 + ldr r5, .L1572+112 str r3, [r5] - ldr r5, .L1583+120 + ldr r5, .L1572+116 str r6, [r5] mov r6, r1 - ldr r5, .L1583+124 + ldr r5, .L1572+120 str r3, [r5] - ldr r5, .L1583+128 + ldr r5, .L1572+124 str r3, [r5] - ldr r5, .L1583+132 + ldr r5, .L1572+128 ldr lr, [r4, #40] str r3, [r5] - ldr r3, .L1583+136 + ldr r3, .L1572+132 ldr r5, [r3] cmp lr, r5 mov r5, r2 it hi strhi lr, [r3] - ldr r3, .L1583+140 + ldr r3, .L1572+136 ldr r2, [r4, #36] ldr r1, [r3] cmp r2, r1 @@ -11783,74 +11665,73 @@ FtlLoadSysInfo: strhi r2, [r3] movw r3, #65535 cmp ip, r3 - beq .L1569 - ldr r0, .L1583+88 + beq .L1558 + ldr r0, .L1572+84 bl make_superblock -.L1569: +.L1558: ldrh r2, [r6] movw r3, #65535 cmp r2, r3 - beq .L1570 - ldr r0, .L1583+96 + beq .L1559 + ldr r0, .L1572+92 bl make_superblock -.L1570: +.L1559: ldrh r2, [r5] movw r3, #65535 cmp r2, r3 - beq .L1571 - ldr r0, .L1583+100 + beq .L1560 + ldr r0, .L1572+96 bl make_superblock -.L1571: +.L1560: ldrh r2, [r7] movw r3, #65535 cmp r2, r3 - beq .L1572 - ldr r0, .L1583+92 + beq .L1561 + ldr r0, .L1572+88 bl make_superblock -.L1572: +.L1561: movs r0, #0 - b .L1553 -.L1584: + b .L1542 +.L1573: .align 2 -.L1583: - .word .LANCHOR5 +.L1572: + .word .LANCHOR4 + .word .LANCHOR137 + .word .LANCHOR41 .word .LANCHOR138 - .word .LANCHOR42 - .word .LANCHOR139 - .word .LANCHOR178 + .word .LANCHOR177 .word .LC1 - .word .LANCHOR23 + .word .LANCHOR22 .word .LC46 - .word .LANCHOR20 - .word 1179929683 - .word .LANCHOR39 - .word .LANCHOR1 - .word .LANCHOR10 - .word .LANCHOR179 - .word .LANCHOR152 .word .LANCHOR19 - .word .LANCHOR12 - .word .LANCHOR34 - .word .LANCHOR7 - .word .LANCHOR37 - .word .LANCHOR3 - .word .LANCHOR171 + .word 1179929683 + .word .LANCHOR38 + .word .LANCHOR9 + .word .LANCHOR178 + .word .LANCHOR151 + .word .LANCHOR18 + .word .LANCHOR11 + .word .LANCHOR33 + .word .LANCHOR6 + .word .LANCHOR36 + .word .LANCHOR2 + .word .LANCHOR170 + .word .LANCHOR50 + .word .LANCHOR144 .word .LANCHOR51 - .word .LANCHOR145 .word .LANCHOR52 - .word .LANCHOR53 + .word .LANCHOR83 .word .LANCHOR84 - .word .LANCHOR85 - .word .LANCHOR89 .word .LANCHOR88 + .word .LANCHOR87 + .word .LANCHOR89 .word .LANCHOR90 .word .LANCHOR91 - .word .LANCHOR92 - .word .LANCHOR87 + .word .LANCHOR86 + .word .LANCHOR81 .word .LANCHOR82 - .word .LANCHOR83 - .word .LANCHOR106 - .word .LANCHOR114 + .word .LANCHOR105 + .word .LANCHOR113 .size FtlLoadSysInfo, .-FtlLoadSysInfo .section .text.FtlMapTblRecovery,"ax",%progbits .align 1 @@ -11872,7 +11753,7 @@ FtlMapTblRecovery: movs r7, #0 str r3, [sp, #8] ldr r3, [r0, #16] - ldr r6, .L1626 + ldr r6, .L1615 str r3, [sp, #24] ldrh r3, [r0, #6] str r3, [sp, #12] @@ -11882,13 +11763,13 @@ FtlMapTblRecovery: ldr r3, [sp, #12] lsls r2, r3, #2 bl ftl_memset - ldr r3, .L1626+4 + ldr r3, .L1615+4 str r7, [r4, #32] str r7, [r4, #28] ldr r2, [r3] str r3, [sp, #20] str r2, [r6, #8] - ldr r2, .L1626+8 + ldr r2, .L1615+8 ldr fp, [r2] movw r2, #65535 str fp, [r6, #12] @@ -11896,20 +11777,20 @@ FtlMapTblRecovery: strh r2, [r4, #2] @ movhi movs r2, #1 str r2, [r4, #36] -.L1586: +.L1575: ldr r3, [sp, #16] sxth r5, r7 cmp r5, r3 - bge .L1605 + bge .L1594 ldr r3, [sp, #16] subs r3, r3, #1 cmp r5, r3 - bne .L1587 + bne .L1576 movs r1, #1 ldrh r0, [r8, r5, lsl #1] bl FtlGetLastWrittenPage sxth r3, r0 - ldr r6, .L1626 + ldr r6, .L1615 add r10, r8, r5, lsl #1 strh r7, [r4] @ movhi str r3, [sp, #16] @@ -11919,22 +11800,22 @@ FtlMapTblRecovery: strh r0, [r4, #2] @ movhi ldr r3, [r3, r5, lsl #2] str r3, [r4, #28] -.L1588: +.L1577: ldr r3, [sp, #16] sxth r8, r7 cmp r8, r3 - ble .L1591 -.L1605: + ble .L1580 +.L1594: mov r0, r4 bl ftl_free_no_use_map_blk - ldr r3, .L1626+12 + ldr r3, .L1615+12 ldrh r2, [r4, #2] ldrh r3, [r3] cmp r2, r3 - bne .L1593 + bne .L1582 mov r0, r4 bl ftl_map_blk_alloc_new_blk -.L1593: +.L1582: mov r0, r4 bl ftl_map_blk_gc mov r0, r4 @@ -11943,9 +11824,9 @@ FtlMapTblRecovery: add sp, sp, #40 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1591: +.L1580: ldrh r2, [r10] - ldr r0, .L1626 + ldr r0, .L1615 orr r2, r8, r2, lsl #10 str r2, [r6, #4] movs r2, #1 @@ -11954,23 +11835,108 @@ FtlMapTblRecovery: ldr r2, [r6, #12] ldr r2, [r2, #12] str r2, [sp, #20] - cbz r2, .L1589 + cbz r2, .L1578 ldr r1, [r6] adds r1, r1, #1 - beq .L1589 - ldr r3, .L1626+16 + beq .L1578 + ldr r3, .L1615+16 ldr r0, [r6, #8] ldrh r1, [r3] bl js_hash ldr r2, [sp, #20] cmp r2, r0 - beq .L1589 + beq .L1578 str r0, [sp, #4] mov r3, r8 str r2, [sp] mov r2, r5 - ldr r1, .L1626+20 - ldr r0, .L1626+24 + ldr r1, .L1615+20 + ldr r0, .L1615+24 + bl printf + mov r3, #-1 + str r3, [r6] +.L1578: + ldr r3, [r6] + adds r3, r3, #1 + beq .L1579 + ldrh r3, [fp, #8] + ldr r2, [sp, #12] + cmp r2, r3 + bls .L1579 + ldrh r1, [fp] + ldrh r2, [r4, #4] + cmp r1, r2 + ittt eq + ldreq r2, [r6, #4] + ldreq r1, [sp, #8] + streq r2, [r1, r3, lsl #2] +.L1579: + adds r7, r7, #1 + b .L1577 +.L1576: + ldr r3, [sp, #20] + ldr r10, .L1615+12 + ldrh r2, [r8, r5, lsl #1] + ldr r3, [r3] + ldr r0, .L1615 + str r3, [r6, #8] + add r3, r8, r5, lsl #1 + str r3, [sp, #28] + ldrh r3, [r10] + subs r3, r3, #1 + orr r3, r3, r2, lsl #10 + movs r2, #1 + mov r1, r2 + str r3, [r6, #4] + bl FlashReadPages + ldr r3, [r6] + adds r3, r3, #1 + beq .L1596 + ldrh r2, [fp] + ldrh r3, [r4, #4] + cmp r2, r3 + bne .L1596 + ldrh r2, [fp, #8] + movw r3, #64245 + cmp r2, r3 + beq .L1584 +.L1596: + mov r10, #0 +.L1585: + ldr r2, .L1615+12 + sxth r3, r10 + ldrh r2, [r2] + cmp r3, r2 + bge .L1592 + ldr r2, [sp, #28] + ldr r0, .L1615 + str r3, [sp, #36] + ldrh r2, [r2] + orr r2, r3, r2, lsl #10 + str r2, [r6, #4] + movs r2, #1 + mov r1, r2 + bl FlashReadPages + ldr r2, [r6, #12] + ldr r2, [r2, #12] + str r2, [sp, #32] + cbz r2, .L1589 + ldr r1, [r6] + adds r1, r1, #1 + beq .L1589 + ldr r1, .L1615+16 + ldr r0, [r6, #8] + ldrh r1, [r1] + bl js_hash + ldr r2, [sp, #32] + cmp r2, r0 + beq .L1589 + str r0, [sp, #4] + str r2, [sp] + mov r2, r5 + ldr r3, [sp, #36] + ldr r1, .L1615+20 + ldr r0, .L1615+28 bl printf mov r3, #-1 str r3, [r6] @@ -11990,129 +11956,44 @@ FtlMapTblRecovery: ldreq r1, [sp, #8] streq r2, [r1, r3, lsl #2] .L1590: - adds r7, r7, #1 - b .L1588 -.L1587: - ldr r3, [sp, #20] - ldr r10, .L1626+12 - ldrh r2, [r8, r5, lsl #1] - ldr r3, [r3] - ldr r0, .L1626 - str r3, [r6, #8] - add r3, r8, r5, lsl #1 - str r3, [sp, #28] - ldrh r3, [r10] - subs r3, r3, #1 - orr r3, r3, r2, lsl #10 - movs r2, #1 - mov r1, r2 - str r3, [r6, #4] - bl FlashReadPages - ldr r3, [r6] - adds r3, r3, #1 - beq .L1607 - ldrh r2, [fp] - ldrh r3, [r4, #4] - cmp r2, r3 - bne .L1607 - ldrh r2, [fp, #8] - movw r3, #64245 - cmp r2, r3 - beq .L1595 -.L1607: - mov r10, #0 -.L1596: - ldr r2, .L1626+12 - sxth r3, r10 - ldrh r2, [r2] - cmp r3, r2 - bge .L1603 - ldr r2, [sp, #28] - ldr r0, .L1626 - str r3, [sp, #36] - ldrh r2, [r2] - orr r2, r3, r2, lsl #10 - str r2, [r6, #4] - movs r2, #1 - mov r1, r2 - bl FlashReadPages - ldr r2, [r6, #12] - ldr r2, [r2, #12] - str r2, [sp, #32] - cbz r2, .L1600 - ldr r1, [r6] - adds r1, r1, #1 - beq .L1600 - ldr r1, .L1626+16 - ldr r0, [r6, #8] - ldrh r1, [r1] - bl js_hash - ldr r2, [sp, #32] - cmp r2, r0 - beq .L1600 - str r0, [sp, #4] - str r2, [sp] - mov r2, r5 - ldr r3, [sp, #36] - ldr r1, .L1626+20 - ldr r0, .L1626+28 - bl printf - mov r3, #-1 - str r3, [r6] -.L1600: - ldr r3, [r6] - adds r3, r3, #1 - beq .L1601 - ldrh r3, [fp, #8] - ldr r2, [sp, #12] - cmp r2, r3 - bls .L1601 - ldrh r1, [fp] - ldrh r2, [r4, #4] - cmp r1, r2 - ittt eq - ldreq r2, [r6, #4] - ldreq r1, [sp, #8] - streq r2, [r1, r3, lsl #2] -.L1601: add r10, r10, #1 - b .L1596 -.L1595: + b .L1585 +.L1584: ldr r3, [sp, #20] movs r1, #0 ldrh r2, [r10] ldr r0, [r3] add lr, r2, #-1 -.L1597: +.L1586: sxth r3, r1 cmp r3, lr - blt .L1599 -.L1603: + blt .L1588 +.L1592: adds r7, r7, #1 - b .L1586 -.L1599: + b .L1575 +.L1588: lsls r5, r3, #3 ldr r3, [r0, r3, lsl #3] ldr r2, [sp, #12] uxth ip, r3 cmp r2, ip - bls .L1598 + bls .L1587 add r5, r5, r0 ldr r2, [sp, #8] ldr r5, [r5, #4] str r5, [r2, ip, lsl #2] -.L1598: +.L1587: adds r1, r1, #1 - b .L1597 -.L1627: + b .L1586 +.L1616: .align 2 -.L1626: - .word .LANCHOR138 - .word .LANCHOR106 - .word .LANCHOR114 - .word .LANCHOR20 - .word .LANCHOR23 - .word .LANCHOR180 +.L1615: + .word .LANCHOR137 + .word .LANCHOR105 + .word .LANCHOR113 + .word .LANCHOR19 + .word .LANCHOR22 + .word .LANCHOR179 .word .LC47 .word .LC48 .size FtlMapTblRecovery, .-FtlMapTblRecovery @@ -12128,44 +12009,44 @@ FtlLoadVonderInfo: @ args = 0, pretend = 0, frame = 0 @ frame_needed = 0, uses_anonymous_args = 0 push {r3, lr} - ldr r3, .L1629 - ldr r0, .L1629+4 + ldr r3, .L1618 + ldr r0, .L1618+4 ldrh r3, [r3] strh r3, [r0, #10] @ movhi movw r3, #61574 strh r3, [r0, #4] @ movhi - ldr r3, .L1629+8 + ldr r3, .L1618+8 ldrh r3, [r3] strh r3, [r0, #8] @ movhi - ldr r3, .L1629+12 + ldr r3, .L1618+12 ldrh r3, [r3] strh r3, [r0, #6] @ movhi - ldr r3, .L1629+16 + ldr r3, .L1618+16 ldr r3, [r3] str r3, [r0, #12] - ldr r3, .L1629+20 + ldr r3, .L1618+20 ldr r3, [r3] str r3, [r0, #16] - ldr r3, .L1629+24 + ldr r3, .L1618+24 ldr r3, [r3] str r3, [r0, #20] - ldr r3, .L1629+28 + ldr r3, .L1618+28 ldr r3, [r3] str r3, [r0, #24] bl FtlMapTblRecovery movs r0, #0 pop {r3, pc} -.L1630: +.L1619: .align 2 -.L1629: +.L1618: + .word .LANCHOR26 + .word .LANCHOR160 + .word .LANCHOR34 .word .LANCHOR27 - .word .LANCHOR161 .word .LANCHOR35 - .word .LANCHOR28 - .word .LANCHOR36 - .word .LANCHOR122 .word .LANCHOR121 - .word .LANCHOR123 + .word .LANCHOR120 + .word .LANCHOR122 .size FtlLoadVonderInfo, .-FtlLoadVonderInfo .section .text.FtlLoadMapInfo,"ax",%progbits .align 1 @@ -12180,14 +12061,14 @@ FtlLoadMapInfo: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, lr} bl FtlL2PDataInit - ldr r0, .L1632 + ldr r0, .L1621 bl FtlMapTblRecovery movs r0, #0 pop {r3, pc} -.L1633: +.L1622: .align 2 -.L1632: - .word .LANCHOR129 +.L1621: + .word .LANCHOR128 .size FtlLoadMapInfo, .-FtlLoadMapInfo .section .text.FtlSysBlkInit,"ax",%progbits .align 1 @@ -12202,27 +12083,27 @@ FtlSysBlkInit: @ frame_needed = 0, uses_anonymous_args = 0 push {r3, r4, r5, r6, r7, lr} movs r3, #0 - ldr r4, .L1647 + ldr r4, .L1636 strh r3, [r4] @ movhi - ldr r3, .L1647+4 + ldr r3, .L1636+4 ldrh r0, [r3] bl FtlFreeSysBlkQueueInit bl FtlScanSysBlk - ldr r3, .L1647+8 + ldr r3, .L1636+8 ldrh r2, [r3] movw r3, #65535 cmp r2, r3 - bne .L1635 -.L1637: + bne .L1624 +.L1626: mov r6, #-1 -.L1634: +.L1623: mov r0, r6 pop {r3, r4, r5, r6, r7, pc} -.L1635: +.L1624: bl FtlLoadSysInfo mov r6, r0 cmp r0, #0 - bne .L1637 + bne .L1626 bl FtlLoadMapInfo bl FtlLoadVonderInfo bl Ftl_load_ext_data @@ -12232,40 +12113,40 @@ FtlSysBlkInit: bl FtlPowerLostRecovery movs r0, #1 bl FtlUpdateVaildLpn - ldr r3, .L1647+12 + ldr r3, .L1636+12 movs r0, #12 ldrh r1, [r3] - ldr r3, .L1647+16 + ldr r3, .L1636+16 ldr r2, [r3] mov r3, r6 -.L1638: +.L1627: cmp r3, r1 - bge .L1643 + bge .L1632 mla r5, r0, r3, r2 ldr r5, [r5, #4] cmp r5, #0 - bge .L1639 -.L1643: - ldr r0, .L1647+20 + bge .L1628 +.L1632: + ldr r0, .L1636+20 cmp r3, r1 ldr r2, [r0] add r2, r2, #32 str r2, [r0] - bge .L1645 -.L1640: - ldr r5, .L1647+24 - ldr r4, .L1647+28 + bge .L1634 +.L1629: + ldr r5, .L1636+24 + ldr r4, .L1636+28 mov r0, r5 bl FtlSuperblockPowerLostFix mov r0, r4 bl FtlSuperblockPowerLostFix - ldr r3, .L1647+32 + ldr r3, .L1636+32 ldrh r1, [r5] ldrh r0, [r5, #4] ldr r2, [r3] ldrh r3, [r2, r1, lsl #1] subs r3, r3, r0 - ldr r0, .L1647+36 + ldr r0, .L1636+36 strh r3, [r2, r1, lsl #1] @ movhi ldrh r7, [r4, #4] ldrh r3, [r0] @@ -12281,38 +12162,38 @@ FtlSysBlkInit: strb r3, [r4, #6] strh r3, [r4, #4] @ movhi strh r2, [r4, #2] @ movhi - ldr r2, .L1647+40 + ldr r2, .L1636+40 ldrh r3, [r2, #30] adds r3, r3, #1 strh r3, [r2, #30] @ movhi bl l2p_flush bl FtlVpcTblFlush -.L1646: +.L1635: bl FtlVpcTblFlush - b .L1634 -.L1639: + b .L1623 +.L1628: adds r3, r3, #1 - b .L1638 -.L1645: + b .L1627 +.L1634: ldrh r3, [r4] cmp r3, #0 - bne .L1640 + bne .L1629 bl l2p_flush - b .L1646 -.L1648: + b .L1635 +.L1637: .align 2 -.L1647: - .word .LANCHOR156 - .word .LANCHOR4 - .word .LANCHOR139 - .word .LANCHOR33 - .word .LANCHOR55 - .word .LANCHOR83 +.L1636: + .word .LANCHOR155 + .word .LANCHOR3 + .word .LANCHOR138 + .word .LANCHOR32 + .word .LANCHOR54 + .word .LANCHOR82 + .word .LANCHOR50 .word .LANCHOR51 - .word .LANCHOR52 - .word .LANCHOR42 - .word .LANCHOR19 - .word .LANCHOR39 + .word .LANCHOR41 + .word .LANCHOR18 + .word .LANCHOR38 .size FtlSysBlkInit, .-FtlSysBlkInit .section .text.ftl_low_format,"ax",%progbits .align 1 @@ -12327,255 +12208,246 @@ ftl_low_format: @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r3, r4, r5, r6, r7, r8, r10, fp, lr} movs r3, #0 - ldr r2, .L1673 - ldr r6, .L1673+4 + ldr r2, .L1662 + ldr r4, .L1662+4 str r3, [r2] - ldr r5, .L1673+8 - ldr r2, .L1673+12 - ldrh r0, [r6] + ldr r5, .L1662+8 + ldr r2, .L1662+12 + mov r8, r4 + ldrh r0, [r4] str r3, [r5] str r3, [r2] bl FtlFreeSysBlkQueueInit bl FtlLoadBbt - cbz r0, .L1650 + cbz r0, .L1639 bl FtlMakeBbt -.L1650: - ldr r3, .L1673+16 - ldr r2, .L1673+20 - ldr ip, .L1673+104 +.L1639: + ldr r3, .L1662+16 + ldr r2, .L1662+20 + ldr r7, .L1662+24 ldrh r1, [r3] ldr r4, [r2] - ldr r2, .L1673+24 + ldr r2, .L1662+28 str r3, [sp, #4] lsls r1, r1, #7 - ldr r7, [r2] + ldr r6, [r2] movs r2, #0 -.L1651: +.L1640: uxth r3, r2 adds r2, r2, #1 cmp r3, r1 - blt .L1652 - ldr r3, .L1673+28 - movs r7, #0 - ldr r10, .L1673+108 - ldrh r4, [r3] - mov r8, r3 - mov fp, r10 -.L1653: - ldrh r3, [r10] + blt .L1641 + ldr r7, .L1662+32 + mov r10, #0 + ldr r6, .L1662+36 + ldrh r4, [r7] + mov fp, r6 +.L1642: + ldrh r3, [r6] cmp r3, r4 - bhi .L1654 - ldr r4, .L1673+32 - subs r3, r7, #2 - ldrh r1, [r4] + bhi .L1643 + ldr r6, .L1662+40 + sub r3, r10, #2 + ldrh r1, [r6] cmp r3, r1, lsl #1 - bgt .L1655 -.L1659: - movs r6, #0 - mov r7, r6 -.L1656: - ldrh r3, [r8] - uxth r0, r6 - adds r6, r6, #1 + bgt .L1644 +.L1648: + movs r4, #0 + mov r8, r4 +.L1645: + ldrh r3, [r7] + uxth r0, r4 + adds r4, r4, #1 cmp r3, r0 - bhi .L1660 + bhi .L1649 ldrh r2, [fp] - ldr r3, .L1673+36 - ldrh r4, [r4] - ldr r6, .L1673+40 + ldr r3, .L1662+44 + ldrh r4, [r6] + ldr r6, .L1662+48 str r2, [r3] - ldr r3, .L1673+44 + ldr r3, .L1662+52 mov r1, r4 + ldr r7, .L1662+56 ldr r2, [r3] mov r0, r2 str r2, [sp, #12] bl __aeabi_uidiv ubfx r10, r0, #5, #16 mov r3, r0 - str r0, [r6] add r1, r10, #36 - ldr r0, .L1673+48 - strh r1, [r0] @ movhi + str r0, [r7] + strh r1, [r6] @ movhi movs r1, #24 muls r1, r4, r1 - str r0, [sp] - cmp r7, r1 - ble .L1661 + cmp r8, r1 + ble .L1650 ldr r2, [sp, #12] mov r1, r4 - str r3, [sp, #8] - subs r0, r2, r7 + str r0, [sp, #8] + sub r0, r2, r8 bl __aeabi_uidiv - ldr r3, [sp] - str r0, [r6] + ldr r3, [sp, #8] + str r0, [r7] lsrs r0, r0, #5 adds r0, r0, #24 - strh r0, [r3] @ movhi - ldr r3, [sp, #8] -.L1661: - ldr r2, .L1673+52 + strh r0, [r6] @ movhi +.L1650: + ldr r2, .L1662+60 ldrh r2, [r2] - cbz r2, .L1663 - ldr r1, .L1673+48 - ldrh r0, [r1] - add r0, r0, r2, lsr #1 - strh r0, [r1] @ movhi - mul r0, r4, r2 - cmp r7, r0 + cbz r2, .L1652 + ldrh r1, [r6] + add r1, r1, r2, lsr #1 + strh r1, [r6] @ movhi + mul r1, r4, r2 + cmp r8, r1 itttt lt addlt r2, r2, #32 - strlt r3, [r6] + strlt r3, [r7] addlt r2, r2, r10 - strhlt r2, [r1] @ movhi -.L1663: - ldr r3, [sp] - ldr r7, .L1673+56 - ldr r10, .L1673+112 - ldrh r2, [r3] - ldr r3, [r6] + strhlt r2, [r6] @ movhi +.L1652: + ldrh r2, [r6] + ldr r3, [r7] + ldr r6, .L1662+64 subs r3, r3, r2 muls r4, r3, r4 - ldr r3, .L1673+60 + ldr r3, .L1662+68 ldrh r3, [r3] - str r4, [r7] + str r4, [r6] muls r4, r3, r4 ldr r3, [sp, #4] ldrh r3, [r3] - str r4, [r6] - ldr r6, .L1673+64 + str r4, [r7] + ldr r7, .L1662+72 muls r4, r3, r4 - ldr r3, .L1673+68 + ldr r3, .L1662+76 str r4, [r3] - movw r4, #65535 bl FtlBbmTblFlush ldrh r2, [fp] movs r1, #0 - ldr r0, [r10] + ldr r0, [r7] + ldr r4, .L1662+80 lsls r2, r2, #1 + mov r10, r4 bl ftl_memset - ldr r2, .L1673+72 + ldr r2, .L1662+84 movs r3, #0 - strh r3, [r6, #2] @ movhi - movs r1, #255 - strb r3, [r6, #6] + movw r1, #65535 + strh r3, [r4, #2] @ movhi + mov r8, r1 + strb r3, [r4, #6] str r3, [r2] - ldr r2, .L1673+76 - strh r3, [r6] @ movhi + ldr r2, .L1662+88 + strh r3, [r4] @ movhi strh r3, [r2, #2] @ movhi strb r3, [r2, #6] strb r3, [r2, #8] movs r3, #1 - strh r4, [r2] @ movhi - ldrh r2, [r8] - mov r8, r10 - strb r3, [r6, #8] - mov r10, r6 - ldr r3, .L1673+80 - lsrs r2, r2, #3 - ldr r0, [r3] - bl ftl_memset -.L1665: - mov r0, r10 - bl make_superblock - ldrb r3, [r6, #7] @ zero_extendqisi2 - ldrh r2, [r6] - cmp r3, #0 - bne .L1666 - ldr r3, [r8] - strh r4, [r3, r2, lsl #1] @ movhi - ldrh r3, [r6] - adds r3, r3, #1 - strh r3, [r6] @ movhi - b .L1665 -.L1652: - mvns r0, r3 - orr r0, r3, r0, lsl #16 - str r0, [r4, r3, lsl #2] - str ip, [r7, r3, lsl #2] - b .L1651 -.L1654: - mov r0, r4 - movs r1, #1 - bl FtlLowFormatEraseBlock - adds r4, r4, #1 - add r7, r7, r0 - uxth r7, r7 - uxth r4, r4 - b .L1653 -.L1655: - mov r0, r7 - bl __aeabi_uidiv - ldr r3, .L1673+84 - ldr r3, [r3] - add r0, r0, r3 - uxth r0, r0 - bl FtlSysBlkNumInit - ldrh r0, [r6] - bl FtlFreeSysBlkQueueInit - ldrh r6, [r8] -.L1657: - ldrh r3, [fp] - cmp r3, r6 - bls .L1659 - mov r0, r6 - movs r1, #1 - adds r6, r6, #1 - bl FtlLowFormatEraseBlock - uxth r6, r6 - b .L1657 -.L1660: - movs r1, #0 - bl FtlLowFormatEraseBlock - add r7, r7, r0 - uxth r7, r7 - b .L1656 -.L1666: - ldr r3, [r5] - ldrh r1, [r6, #4] - ldr r4, .L1673+88 - str r3, [r6, #12] - adds r3, r3, #1 - str r3, [r5] - ldr r3, [r8] - mov r10, r4 - strh r1, [r3, r2, lsl #1] @ movhi - movs r3, #0 - strh r3, [r4, #2] @ movhi - strb r3, [r4, #6] - ldrh r3, [r6] - movw r6, #65535 - adds r3, r3, #1 - strh r3, [r4] @ movhi - movs r3, #1 + strh r1, [r2] @ movhi strb r3, [r4, #8] -.L1667: +.L1654: mov r0, r10 bl make_superblock ldrb r3, [r4, #7] @ zero_extendqisi2 ldrh r2, [r4] - cbnz r3, .L1668 - ldr r3, [r8] - strh r6, [r3, r2, lsl #1] @ movhi + cmp r3, #0 + bne .L1655 + ldr r3, [r7] + strh r8, [r3, r2, lsl #1] @ movhi ldrh r3, [r4] adds r3, r3, #1 strh r3, [r4] @ movhi - b .L1667 -.L1668: + b .L1654 +.L1641: + mvns r0, r3 + orr r0, r3, r0, lsl #16 + str r0, [r4, r3, lsl #2] + str r7, [r6, r3, lsl #2] + b .L1640 +.L1643: + mov r0, r4 + movs r1, #1 + bl FtlLowFormatEraseBlock + adds r4, r4, #1 + add r10, r10, r0 + uxth r10, r10 + uxth r4, r4 + b .L1642 +.L1644: + mov r0, r10 + bl __aeabi_uidiv + ldr r3, .L1662+92 + ldr r3, [r3] + add r0, r0, r3 + uxth r0, r0 + bl FtlSysBlkNumInit + ldrh r0, [r8] + bl FtlFreeSysBlkQueueInit + ldrh r4, [r7] +.L1646: + ldrh r3, [fp] + cmp r3, r4 + bls .L1648 + mov r0, r4 + movs r1, #1 + adds r4, r4, #1 + bl FtlLowFormatEraseBlock + uxth r4, r4 + b .L1646 +.L1649: + movs r1, #0 + bl FtlLowFormatEraseBlock + add r8, r8, r0 + uxth r8, r8 + b .L1645 +.L1655: + ldr r3, [r5] + movw r8, #65535 + ldrh r1, [r4, #4] + str r3, [r4, #12] + adds r3, r3, #1 + str r3, [r5] + ldr r3, [r7] + strh r1, [r3, r2, lsl #1] @ movhi + movs r2, #0 + ldr r3, .L1662+96 + strh r2, [r3, #2] @ movhi + mov r10, r3 + strb r2, [r3, #6] + ldrh r2, [r4] + mov r4, r3 + adds r2, r2, #1 + strh r2, [r3] @ movhi + movs r2, #1 + strb r2, [r3, #8] +.L1656: + mov r0, r10 + bl make_superblock + ldrb r3, [r4, #7] @ zero_extendqisi2 + ldrh r2, [r4] + cbnz r3, .L1657 + ldr r3, [r7] + strh r8, [r3, r2, lsl #1] @ movhi + ldrh r3, [r4] + adds r3, r3, #1 + strh r3, [r4] @ movhi + b .L1656 +.L1657: ldr r3, [r5] ldrh r1, [r4, #4] str r3, [r4, #12] adds r3, r3, #1 str r3, [r5] movw r4, #65535 - ldr r3, [r8] + ldr r3, [r7] strh r1, [r3, r2, lsl #1] @ movhi - ldr r3, .L1673+92 + ldr r3, .L1662+100 strh r4, [r3] @ movhi bl FtlFreeSysBlkQueueOut - ldr r3, .L1673+96 + ldr r3, .L1662+104 movs r2, #0 strh r2, [r3, #2] @ movhi - ldr r2, [r7] + ldr r2, [r6] strh r0, [r3] @ movhi strh r4, [r3, #4] @ movhi strh r2, [r3, #6] @ movhi @@ -12585,47 +12457,46 @@ ftl_low_format: str r2, [r5] bl FtlVpcTblFlush bl FtlSysBlkInit - cbnz r0, .L1669 - ldr r3, .L1673+100 + cbnz r0, .L1658 + ldr r3, .L1662+108 movs r2, #1 str r2, [r3] -.L1669: +.L1658: movs r0, #0 add sp, sp, #16 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1674: +.L1663: .align 2 -.L1673: - .word .LANCHOR83 - .word .LANCHOR4 +.L1662: .word .LANCHOR82 - .word .LANCHOR143 - .word .LANCHOR12 - .word .LANCHOR109 - .word .LANCHOR110 - .word .LANCHOR5 .word .LANCHOR3 - .word .LANCHOR99 - .word .LANCHOR152 - .word .LANCHOR7 - .word .LANCHOR171 - .word .LANCHOR15 - .word .LANCHOR179 - .word .LANCHOR19 - .word .LANCHOR51 - .word .LANCHOR34 - .word .LANCHOR59 - .word .LANCHOR145 - .word .LANCHOR1 - .word .LANCHOR31 - .word .LANCHOR52 - .word .LANCHOR53 - .word .LANCHOR139 - .word .LANCHOR166 + .word .LANCHOR81 + .word .LANCHOR142 + .word .LANCHOR11 + .word .LANCHOR108 .word 168778952 + .word .LANCHOR109 + .word .LANCHOR4 + .word .LANCHOR5 + .word .LANCHOR2 + .word .LANCHOR98 + .word .LANCHOR170 .word .LANCHOR6 - .word .LANCHOR42 + .word .LANCHOR151 + .word .LANCHOR14 + .word .LANCHOR178 + .word .LANCHOR18 + .word .LANCHOR41 + .word .LANCHOR33 + .word .LANCHOR50 + .word .LANCHOR58 + .word .LANCHOR144 + .word .LANCHOR30 + .word .LANCHOR51 + .word .LANCHOR52 + .word .LANCHOR138 + .word .LANCHOR165 .size ftl_low_format, .-ftl_low_format .section .text.sftl_init,"ax",%progbits .align 1 @@ -12640,46 +12511,46 @@ sftl_init: @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, lr} mov r3, #-1 - ldr r4, .L1687 + ldr r4, .L1676 movs r6, #0 - ldr r1, .L1687+4 - ldr r0, .L1687+8 + ldr r1, .L1676+4 + ldr r0, .L1676+8 str r3, [r4] bl printf - ldr r0, .L1687+12 + ldr r0, .L1676+12 bl FtlConstantsInit - ldr r5, .L1687+16 + ldr r5, .L1676+16 bl FtlMemInit bl FtlVariablesInit - ldr r3, .L1687+20 + ldr r3, .L1676+20 ldrh r0, [r3] bl FtlFreeSysBlkQueueInit -.L1676: +.L1665: bl FtlLoadBbt - cbz r0, .L1677 -.L1686: + cbz r0, .L1666 +.L1675: ldr r3, [r5] cmp r3, #1 - bne .L1676 + bne .L1665 str r6, [r5] bl ftl_low_format - b .L1676 -.L1677: + b .L1665 +.L1666: bl FtlSysBlkInit cmp r0, #0 - bne .L1686 + bne .L1675 movs r3, #1 str r3, [r4] pop {r4, r5, r6, pc} -.L1688: +.L1677: .align 2 -.L1687: - .word .LANCHOR166 +.L1676: + .word .LANCHOR165 .word .LC49 .word .LC38 .word .LANCHOR0 - .word .LANCHOR181 - .word .LANCHOR4 + .word .LANCHOR180 + .word .LANCHOR3 .size sftl_init, .-sftl_init .section .text.FtlWriteToIDB,"ax",%progbits .align 1 @@ -12690,416 +12561,411 @@ sftl_init: .fpu softvfp .type FtlWriteToIDB, %function FtlWriteToIDB: - @ args = 0, pretend = 0, frame = 104 + @ args = 0, pretend = 0, frame = 96 @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, r8, r10, fp, lr} - add r8, r1, r0 - add r10, r8, #-1 - sub sp, sp, #112 - cmp r10, #63 + adds r7, r1, r0 + add r8, r7, #-1 + sub sp, sp, #104 + cmp r8, #63 mov r4, r0 - mov r6, r1 - mov r7, r2 - ldr r5, .L1759 - bls .L1690 + mov r5, r1 + mov r6, r2 + ldr r10, .L1746+16 + bls .L1679 cmp r0, #576 - bcc .L1691 -.L1690: - ldr r3, [r5] - cbnz r3, .L1692 -.L1758: + bcc .L1680 +.L1679: + ldr r3, [r10] + cbnz r3, .L1681 +.L1745: movs r4, #0 - b .L1689 -.L1692: - ldr r3, .L1759+4 - ldr r3, [r3] - ldr r2, [r3] - str r3, [sp, #12] - ldr r3, .L1759+8 + b .L1678 +.L1681: + ldr r3, .L1746 + ldr fp, [r3] + ldr r3, .L1746+4 + ldr r2, [fp] cmp r2, r3 - bne .L1694 - ldr r3, .L1759+12 + bne .L1683 + ldr r3, .L1746+8 + add r0, fp, #260096 movs r2, #0 ldrh r1, [r3, #10] - ldr r3, [sp, #12] - add r0, r3, #262144 - movw r3, #65535 -.L1698: - ldr r4, [r0, #-4] - cbnz r4, .L1695 - ldr r4, [sp, #12] - subs r3, r3, #1 - ldr r4, [r4, r2, lsl #2] + movw r3, #65023 +.L1687: + ldr r4, [r0, #-4]! + cbnz r4, .L1684 + ldr r4, [fp, r2, lsl #2] adds r2, r2, #1 cmp r2, #4096 + add r3, r3, #-1 it hi movhi r2, #0 cmp r3, #4096 - str r4, [r0, #-4]! - bne .L1698 + str r4, [r0, #2048] + bne .L1687 mov r3, #512 - b .L1755 -.L1695: + b .L1742 +.L1684: adds r3, r3, #127 lsrs r3, r3, #7 -.L1755: - str r3, [sp, #16] +.L1742: + str r3, [sp, #8] lsls r1, r1, #2 - ldr r3, [sp, #16] + ldr r3, [sp, #8] uxth r1, r1 - ldr r4, .L1759+16 adds r0, r3, #4 bl __aeabi_uidiv adds r3, r0, #1 - str r3, [sp, #24] - ldr r3, [sp, #16] - lsls r3, r3, #7 - str r3, [sp, #36] - movs r3, #0 - mov r10, r3 - str r3, [sp, #20] -.L1720: - ldr r3, .L1759+20 - mov r2, #512 - movs r1, #0 - ldr r0, [r3] - bl memset - ldr r3, .L1759+12 - ldrh r6, [r3, #10] - ldr r3, [r4, #16] - mul fp, r10, r6 - cmp r3, #0 - beq .L1728 - ldr r3, [r4, #20] - cmp r3, #0 - ite eq - moveq r3, #6 - movne r3, #9 -.L1756: - str r3, [sp, #28] - mov r1, fp - ldr r3, .L1759+16 - movs r0, #0 - ldr r3, [r3, #4] - blx r3 - ldr r3, [sp, #24] - cmp r3, #1 - beq .L1700 - ldr r3, .L1759+16 - add r1, r6, fp - movs r0, #0 - ldr r3, [r3, #4] - blx r3 -.L1700: - ldr r3, [sp, #28] - cmp r3, #9 - bne .L1730 - ldr r3, .L1759+20 - mov r2, #1024 - movs r1, #0 - ldr r5, [r3] - mov r0, r5 - bl ftl_memset - movs r2, #4 - ldr r3, .L1759+24 - strb r2, [r5, #17] - movs r1, #12 - ldr r2, .L1759+12 - adds r0, r5, r1 - str r3, [r5] - movs r3, #0 - str r1, [r5, #4] - ldrh r2, [r2, #10] - str r3, [r5, #12] - strb r3, [r5, #16] - strh r2, [r5, #18] @ movhi - movs r2, #16 - strb r3, [r5, #20] - strb r2, [r5, #21] - strh r3, [r5, #22] @ movhi - bl js_hash - str r0, [r5, #8] -.L1701: - ldr r3, [sp, #24] - mov r8, fp - muls r3, r6, r3 - movs r6, #0 - str r3, [sp, #40] - ldr r3, [sp, #12] - str r3, [sp, #32] -.L1702: - ldr r3, [sp, #40] - cmp r6, r3 - beq .L1709 - ldr r3, [sp, #28] - cmp r3, #9 - itet ne - addne r3, fp, r6 - addeq r3, r8, #1 - lslne r3, r3, #2 - str r3, [sp, #48] - movw r3, #61424 - str r3, [sp, #52] - cmp r6, #0 - bne .L1705 - ldr r3, [sp, #28] - cmp r3, #9 - bne .L1705 - ldr r3, [r4, #16] - movs r0, #70 - blx r3 - add r3, sp, #48 - mov r2, r5 - mov r1, fp - mov r0, r6 - ldr r7, [r4, #8] - blx r7 - ldr r2, .L1759+12 - str r0, [sp, #44] - ldr r3, [r4, #16] - ldrb r0, [r2, #22] @ zero_extendqisi2 - blx r3 - ldr r2, [sp, #44] - adds r2, r2, #1 - bne .L1706 -.L1709: - ldr r3, .L1759+20 - ldr r2, [r4, #16] - ldr r6, [r3] - ldr r3, .L1759+12 - ldrb r3, [r3, #14] @ zero_extendqisi2 - str r3, [sp, #28] - ldr r3, .L1759+12 - ldrh r3, [r3, #10] - mul r8, r10, r3 - cmp r2, #0 - bne .L1707 - mov fp, #6 -.L1708: - ldr r2, [sp, #24] - movs r5, #0 - muls r3, r2, r3 - str r3, [sp, #32] -.L1711: - ldr r3, [sp, #32] - cmp r5, r3 - beq .L1715 - cmp r5, #0 - bne .L1712 - cmp fp, #9 - bne .L1712 - ldr r3, [r4, #16] - movs r0, #70 - blx r3 - ldr r3, [r4, #20] - movs r0, #2 - blx r3 - mov r2, r6 - mov r1, r8 - add r3, sp, #48 - mov r0, r5 - ldr r7, [r4, #12] - blx r7 - ldr r3, [r4, #20] - ldr r0, [sp, #28] - blx r3 - ldr r2, .L1759+12 - ldr r3, [r4, #16] - ldrb r0, [r2, #22] @ zero_extendqisi2 - blx r3 - ldr r3, [r6] - ldr r2, .L1759+24 - cmp r3, r2 - beq .L1713 -.L1715: - ldr r3, .L1759+20 - movs r5, #0 - ldr r1, [sp, #12] - ldr r0, [r3] -.L1714: - mov r8, r1 - ldr r2, [r0, r5, lsl #2] - ldr r3, [r8] - lsls r6, r5, #2 - adds r1, r1, #4 - cmp r2, r3 - beq .L1717 - mov r2, #512 - movs r1, #0 - bl memset - ldr r3, .L1759+20 - mov r1, r10 - ldr r0, .L1759+28 - ldr r2, [r3] - str r5, [sp] - ldr r3, [r8] - ldr r2, [r2, r6] - bl printf - ldr r3, .L1759+12 - movs r0, #0 - ldrh r1, [r3, #10] - ldr r3, [r4, #4] - mul r1, r10, r1 - blx r3 -.L1718: - ldr r3, [sp, #24] - add r10, r10, r3 - cmp r10, #7 - bls .L1720 - ldr r3, [sp, #20] - cbnz r3, .L1721 -.L1694: - mov r3, #-1 + ldr r1, [sp, #8] + mov r2, r3 + ldr r0, .L1746+12 str r3, [sp, #16] -.L1721: - ldr r3, .L1759 + bl printf + ldr r3, [sp, #8] + lsls r3, r3, #7 + str r3, [sp, #32] + movs r3, #0 + str r3, [sp, #20] +.L1744: + str r3, [sp, #12] + ldr r2, [sp, #12] + ldr r3, [sp, #16] + add r3, r3, r2 + cmp r3, #8 + str r3, [sp, #28] + bls .L1710 + ldr r3, [sp, #20] + cbnz r3, .L1711 +.L1683: + mov r3, #-1 + str r3, [sp, #8] +.L1711: + ldr r3, .L1746+16 movs r2, #0 - ldr r4, [sp, #16] + ldr r4, [sp, #8] str r2, [r3] - ldr r3, .L1759+4 + ldr r3, .L1746 ldr r0, [r3] bl free - ldr r3, .L1759+20 + ldr r3, .L1746+20 ldr r0, [r3] bl free -.L1689: +.L1678: mov r0, r4 - add sp, sp, #112 + add sp, sp, #104 @ sp needed pop {r4, r5, r6, r7, r8, r10, fp, pc} -.L1728: - movs r3, #6 - b .L1756 -.L1730: - movs r5, #0 - b .L1701 -.L1705: - add r3, sp, #48 - ldr r2, [sp, #32] - mov r1, r8 +.L1710: + ldr r3, .L1746+20 + mov r2, #512 + movs r1, #0 + ldr r0, [r3] + bl memset + ldr r3, .L1746+8 + ldrh r5, [r3, #10] + ldr r3, [sp, #12] + muls r3, r5, r3 + str r3, [sp, #24] + ldr r3, .L1746+24 + ldr r2, [r3, #16] + cmp r2, #0 + beq .L1718 + ldr r3, [r3, #20] + cmp r3, #0 + ite eq + moveq r6, #6 + movne r6, #9 +.L1689: + ldr r7, [sp, #24] + movs r4, #0 + ldr r8, .L1746+24 +.L1690: + mov r1, r7 + ldr r3, [r8, #4] movs r0, #0 - ldr r7, [r4, #8] + adds r4, r4, #1 + blx r3 + ldr r3, [sp, #16] + add r7, r7, r5 + cmp r3, r4 + bhi .L1690 + cmp r6, #9 + bne .L1720 + ldr r3, .L1746+20 + mov r2, #1024 + movs r1, #0 + ldr r4, [r3] + mov r0, r4 + bl ftl_memset + movs r2, #4 + ldr r3, .L1746+28 + strb r2, [r4, #17] + movs r1, #12 + ldr r2, .L1746+8 + adds r0, r4, r1 + str r3, [r4] + movs r3, #0 + str r1, [r4, #4] + ldrh r2, [r2, #10] + str r3, [r4, #12] + strb r3, [r4, #16] + strh r2, [r4, #18] @ movhi + movs r2, #16 + strb r3, [r4, #20] + strb r2, [r4, #21] + strh r3, [r4, #22] @ movhi + bl js_hash + str r0, [r4, #8] +.L1691: + ldr r3, [sp, #16] + mov r10, fp + ldr r8, .L1746+24 + muls r3, r5, r3 + movs r5, #0 + str r3, [sp, #36] +.L1692: + ldr r3, [sp, #36] + cmp r5, r3 + beq .L1699 + cmp r6, #9 + ite ne + lslne r3, r5, #2 + addeq r3, r5, #1 + str r3, [sp, #40] + movw r3, #61424 + str r3, [sp, #44] + cmp r5, #0 + bne .L1695 + cmp r6, #9 + bne .L1695 + ldr r3, [r8, #16] + movs r0, #70 + blx r3 + ldr r7, [r8, #8] + add r3, sp, #40 + mov r2, r4 + ldr r1, [sp, #24] + mov r0, r5 + blx r7 + ldr r2, .L1746+8 + mov r7, r0 + ldr r3, [r8, #16] + ldrb r0, [r2, #22] @ zero_extendqisi2 + blx r3 + adds r7, r7, #1 + bne .L1696 +.L1699: + ldr r3, .L1746+20 + ldr r7, [r3] + ldr r3, .L1746+8 + ldrb r2, [r3, #14] @ zero_extendqisi2 + ldrh r3, [r3, #10] + str r2, [sp, #24] + ldr r2, [sp, #12] + mul r10, r3, r2 + ldr r2, .L1746+24 + ldr r1, [r2, #16] + cmp r1, #0 + bne .L1697 + mov r8, #6 +.L1698: + ldr r2, [sp, #16] + movs r4, #0 + ldr r5, .L1746+24 + muls r3, r2, r3 + str r3, [sp, #36] +.L1701: + ldr r3, [sp, #36] + cmp r4, r3 + beq .L1705 + cmp r4, #0 + bne .L1702 + cmp r8, #9 + bne .L1702 + ldr r3, [r5, #16] + movs r0, #70 + blx r3 + ldr r3, [r5, #20] + movs r0, #2 + blx r3 + mov r2, r7 + mov r1, r10 + add r3, sp, #40 + mov r0, r4 + ldr r6, [r5, #12] + blx r6 + ldr r3, [r5, #20] + ldr r0, [sp, #24] + blx r3 + ldr r2, .L1746+8 + ldr r3, [r5, #16] + ldrb r0, [r2, #22] @ zero_extendqisi2 + blx r3 + ldr r3, [r7] + ldr r2, .L1746+28 + cmp r3, r2 + beq .L1703 +.L1705: + ldr r3, .L1746+20 + mov r1, fp + movs r4, #0 + ldr r0, [r3] +.L1704: + mov r6, r1 + ldr r2, [r0, r4, lsl #2] + ldr r3, [r6] + lsls r5, r4, #2 + adds r1, r1, #4 + cmp r2, r3 + beq .L1707 + mov r2, #512 + movs r1, #0 + bl memset + ldr r3, .L1746+20 + ldr r1, [sp, #12] + ldr r0, .L1746+32 + ldr r2, [r3] + str r4, [sp] + ldr r3, [r6] + ldr r2, [r2, r5] + bl printf + ldr r3, .L1746+8 + movs r0, #0 + ldr r2, [sp, #12] + ldrh r1, [r3, #10] + ldr r3, .L1746+24 + muls r2, r1, r2 + ldr r3, [r3, #4] + mov r1, r2 + blx r3 +.L1708: + ldr r3, [sp, #28] + b .L1744 +.L1718: + movs r6, #6 + b .L1689 +.L1720: + movs r4, #0 + b .L1691 +.L1695: + ldr r1, [sp, #24] + add r3, sp, #40 + ldr r7, [r8, #8] + mov r2, r10 + movs r0, #0 + add r1, r1, r5 blx r7 adds r0, r0, #1 - beq .L1709 - ldr r3, [sp, #32] - add r3, r3, #2048 - str r3, [sp, #32] -.L1706: - adds r6, r6, #1 - add r8, r8, #1 - b .L1702 -.L1707: - ldr r2, [r4, #20] + beq .L1699 + add r10, r10, #2048 +.L1696: + adds r5, r5, #1 + b .L1692 +.L1697: + ldr r2, [r2, #20] cmp r2, #0 ite eq - moveq fp, #6 - movne fp, #9 - b .L1708 -.L1712: - add r3, sp, #48 - mov r2, r6 - add r1, r8, r5 + moveq r8, #6 + movne r8, #9 + b .L1698 +.L1702: + add r3, sp, #40 + mov r2, r7 + add r1, r10, r4 movs r0, #0 - ldr r7, [r4, #12] - blx r7 + ldr r6, [r5, #12] + blx r6 adds r0, r0, #1 - beq .L1715 - ldr r2, [sp, #52] + beq .L1705 + ldr r2, [sp, #44] movw r3, #61424 cmp r2, r3 - bne .L1715 - add r6, r6, #2048 -.L1713: - adds r5, r5, #1 - b .L1711 -.L1760: - .align 2 -.L1759: - .word .LANCHOR182 - .word .LANCHOR183 - .word -52655045 - .word .LANCHOR0 - .word .LANCHOR78 - .word .LANCHOR184 - .word 1179535694 - .word .LC50 -.L1717: - ldr r3, [sp, #36] - adds r5, r5, #1 - cmp r5, r3 - bne .L1714 + bne .L1705 + add r7, r7, #2048 +.L1703: + adds r4, r4, #1 + b .L1701 +.L1707: + ldr r3, [sp, #32] + adds r4, r4, #1 + cmp r4, r3 + bne .L1704 ldr r3, [sp, #20] adds r3, r3, #1 cmp r3, #5 str r3, [sp, #20] - bls .L1718 - b .L1721 -.L1691: + bls .L1708 + b .L1711 +.L1747: + .align 2 +.L1746: + .word .LANCHOR182 + .word -52655045 + .word .LANCHOR0 + .word .LC50 + .word .LANCHOR181 + .word .LANCHOR183 + .word .LANCHOR77 + .word 1179535694 + .word .LC51 +.L1680: cmp r0, #64 - bne .L1722 - ldr fp, .L1761+4 + bne .L1712 + ldr fp, .L1748+4 mov r0, #262144 bl ftl_malloc str r0, [fp] mov r0, #262144 bl ftl_malloc - ldr r3, .L1761 + ldr r3, .L1748 str r0, [r3] ldr r3, [fp] - cbz r3, .L1723 - cbz r0, .L1723 + cbz r3, .L1713 + cbz r0, .L1713 movs r2, #1 movs r1, #0 - str r2, [r5] + str r2, [r10] mov r0, r3 mov r2, #262144 bl ftl_memset -.L1722: - ldr r3, [r5] +.L1712: + ldr r3, [r10] cmp r3, #0 - beq .L1758 - ldr r3, .L1761+4 + beq .L1745 + ldr r3, .L1748+4 cmp r4, #63 - iteee hi - ldrhi r5, .L1761+8 - rsbls r4, r4, #64 - subls r6, r6, r4 - addls r7, r7, r4, lsl #9 - ldr r1, [r3] - mov r2, #262144 - it hi - addhi r5, r5, r4 - ldr r0, .L1761+12 - ite ls - movls r5, r1 - addhi r5, r1, r5, lsl #9 - cmp r10, #576 + itett ls + rsbls r1, r4, #64 + movhi r1, r6 + subls r5, r5, r1 + addls r1, r6, r1, lsl #9 + ldr r0, [r3] + ittt hi + ldrhi r3, .L1748+8 + addhi r3, r3, r4 + addhi r0, r0, r3, lsl #9 + cmp r8, #576 itt cs - subcs r6, r6, r8 - subcs r6, r6, #446 - mov r3, r5 - str r6, [sp] - bl printf - lsls r2, r6, #9 - mov r1, r7 - mov r0, r5 + subcs r5, r5, r7 + subcs r5, r5, #446 + lsls r2, r5, #9 bl ftl_memcpy - b .L1758 -.L1723: - ldr r1, .L1761+16 - ldr r0, .L1761+20 + b .L1745 +.L1713: + ldr r1, .L1748+12 + ldr r0, .L1748+16 bl printf - b .L1722 -.L1762: + b .L1712 +.L1749: .align 2 -.L1761: - .word .LANCHOR184 +.L1748: .word .LANCHOR183 + .word .LANCHOR182 .word 8388544 + .word .LANCHOR184 .word .LC52 - .word .LANCHOR185 - .word .LC51 .size FtlWriteToIDB, .-FtlWriteToIDB .section .text.sftl_write,"ax",%progbits .align 1 @@ -13118,24 +12984,24 @@ sftl_write: mov r5, r2 add r6, r6, r4 bl FtlWriteToIDB -.L1764: +.L1751: cmp r4, #256 sub r1, r6, r4 mov r3, r5 - bhi .L1766 + bhi .L1753 mov r2, r4 movs r0, #0 pop {r4, r5, r6, lr} b FtlWrite -.L1766: +.L1753: mov r2, #256 movs r0, #0 bl FtlWrite - cbnz r0, .L1763 + cbnz r0, .L1750 add r5, r5, #131072 sub r4, r4, #256 - b .L1764 -.L1763: + b .L1751 +.L1750: pop {r4, r5, r6, pc} .size sftl_write, .-sftl_write .global g_nand_ops @@ -13218,7 +13084,6 @@ sftl_write: .global p_map_block_ver_table .global p_map_block_valid_page_count .global p_map_block_table - .global p_blk_mode_table .global p_valid_page_count_check_table .global p_valid_page_count_table .global g_totle_swl_count @@ -13290,245 +13155,245 @@ sftl_write: .global c_ftl_nand_type .section .bss.DeviceCapacity,"aw",%nobits .align 2 - .set .LANCHOR26,. + 0 + .set .LANCHOR25,. + 0 .type DeviceCapacity, %object .size DeviceCapacity, 4 DeviceCapacity: .space 4 .section .bss.FtlUpdateVaildLpnCount,"aw",%nobits .align 1 - .set .LANCHOR58,. + 0 + .set .LANCHOR57,. + 0 .type FtlUpdateVaildLpnCount, %object .size FtlUpdateVaildLpnCount, 2 FtlUpdateVaildLpnCount: .space 2 .section .bss.c_ftl_nand_bbm_buf_size,"aw",%nobits .align 1 - .set .LANCHOR127,. + 0 + .set .LANCHOR126,. + 0 .type c_ftl_nand_bbm_buf_size, %object .size c_ftl_nand_bbm_buf_size, 2 c_ftl_nand_bbm_buf_size: .space 2 .section .bss.c_ftl_nand_blk_pre_plane,"aw",%nobits .align 1 - .set .LANCHOR6,. + 0 + .set .LANCHOR5,. + 0 .type c_ftl_nand_blk_pre_plane, %object .size c_ftl_nand_blk_pre_plane, 2 c_ftl_nand_blk_pre_plane: .space 2 .section .bss.c_ftl_nand_blks_per_die,"aw",%nobits .align 1 - .set .LANCHOR17,. + 0 + .set .LANCHOR16,. + 0 .type c_ftl_nand_blks_per_die, %object .size c_ftl_nand_blks_per_die, 2 c_ftl_nand_blks_per_die: .space 2 .section .bss.c_ftl_nand_blks_per_die_shift,"aw",%nobits .align 1 - .set .LANCHOR18,. + 0 + .set .LANCHOR17,. + 0 .type c_ftl_nand_blks_per_die_shift, %object .size c_ftl_nand_blks_per_die_shift, 2 c_ftl_nand_blks_per_die_shift: .space 2 .section .bss.c_ftl_nand_byte_pre_oob,"aw",%nobits .align 1 - .set .LANCHOR24,. + 0 + .set .LANCHOR23,. + 0 .type c_ftl_nand_byte_pre_oob, %object .size c_ftl_nand_byte_pre_oob, 2 c_ftl_nand_byte_pre_oob: .space 2 .section .bss.c_ftl_nand_byte_pre_page,"aw",%nobits .align 1 - .set .LANCHOR23,. + 0 + .set .LANCHOR22,. + 0 .type c_ftl_nand_byte_pre_page, %object .size c_ftl_nand_byte_pre_page, 2 c_ftl_nand_byte_pre_page: .space 2 .section .bss.c_ftl_nand_data_blks_per_plane,"aw",%nobits .align 1 - .set .LANCHOR5,. + 0 + .set .LANCHOR4,. + 0 .type c_ftl_nand_data_blks_per_plane, %object .size c_ftl_nand_data_blks_per_plane, 2 c_ftl_nand_data_blks_per_plane: .space 2 .section .bss.c_ftl_nand_data_op_blks_per_plane,"aw",%nobits .align 1 - .set .LANCHOR171,. + 0 + .set .LANCHOR170,. + 0 .type c_ftl_nand_data_op_blks_per_plane, %object .size c_ftl_nand_data_op_blks_per_plane, 2 c_ftl_nand_data_op_blks_per_plane: .space 2 .section .bss.c_ftl_nand_die_num,"aw",%nobits .align 1 - .set .LANCHOR10,. + 0 + .set .LANCHOR9,. + 0 .type c_ftl_nand_die_num, %object .size c_ftl_nand_die_num, 2 c_ftl_nand_die_num: .space 2 .section .bss.c_ftl_nand_ext_blk_pre_plane,"aw",%nobits .align 1 - .set .LANCHOR15,. + 0 + .set .LANCHOR14,. + 0 .type c_ftl_nand_ext_blk_pre_plane, %object .size c_ftl_nand_ext_blk_pre_plane, 2 c_ftl_nand_ext_blk_pre_plane: .space 2 .section .bss.c_ftl_nand_init_sys_blks_per_plane,"aw",%nobits .align 2 - .set .LANCHOR31,. + 0 + .set .LANCHOR30,. + 0 .type c_ftl_nand_init_sys_blks_per_plane, %object .size c_ftl_nand_init_sys_blks_per_plane, 4 c_ftl_nand_init_sys_blks_per_plane: .space 4 .section .bss.c_ftl_nand_l2pmap_ram_region_num,"aw",%nobits .align 1 - .set .LANCHOR33,. + 0 + .set .LANCHOR32,. + 0 .type c_ftl_nand_l2pmap_ram_region_num, %object .size c_ftl_nand_l2pmap_ram_region_num, 2 c_ftl_nand_l2pmap_ram_region_num: .space 2 .section .bss.c_ftl_nand_map_blks_per_plane,"aw",%nobits .align 1 - .set .LANCHOR29,. + 0 + .set .LANCHOR28,. + 0 .type c_ftl_nand_map_blks_per_plane, %object .size c_ftl_nand_map_blks_per_plane, 2 c_ftl_nand_map_blks_per_plane: .space 2 .section .bss.c_ftl_nand_map_region_num,"aw",%nobits .align 1 - .set .LANCHOR32,. + 0 + .set .LANCHOR31,. + 0 .type c_ftl_nand_map_region_num, %object .size c_ftl_nand_map_region_num, 2 c_ftl_nand_map_region_num: .space 2 .section .bss.c_ftl_nand_max_data_blks,"aw",%nobits .align 2 - .set .LANCHOR7,. + 0 + .set .LANCHOR6,. + 0 .type c_ftl_nand_max_data_blks, %object .size c_ftl_nand_max_data_blks, 4 c_ftl_nand_max_data_blks: .space 4 .section .bss.c_ftl_nand_max_map_blks,"aw",%nobits .align 2 - .set .LANCHOR30,. + 0 + .set .LANCHOR29,. + 0 .type c_ftl_nand_max_map_blks, %object .size c_ftl_nand_max_map_blks, 4 c_ftl_nand_max_map_blks: .space 4 .section .bss.c_ftl_nand_max_sys_blks,"aw",%nobits .align 2 - .set .LANCHOR4,. + 0 + .set .LANCHOR3,. + 0 .type c_ftl_nand_max_sys_blks, %object .size c_ftl_nand_max_sys_blks, 4 c_ftl_nand_max_sys_blks: .space 4 .section .bss.c_ftl_nand_max_vendor_blks,"aw",%nobits .align 1 - .set .LANCHOR27,. + 0 + .set .LANCHOR26,. + 0 .type c_ftl_nand_max_vendor_blks, %object .size c_ftl_nand_max_vendor_blks, 2 c_ftl_nand_max_vendor_blks: .space 2 .section .bss.c_ftl_nand_page_pre_blk,"aw",%nobits .align 1 - .set .LANCHOR19,. + 0 + .set .LANCHOR18,. + 0 .type c_ftl_nand_page_pre_blk, %object .size c_ftl_nand_page_pre_blk, 2 c_ftl_nand_page_pre_blk: .space 2 .section .bss.c_ftl_nand_page_pre_slc_blk,"aw",%nobits .align 1 - .set .LANCHOR20,. + 0 + .set .LANCHOR19,. + 0 .type c_ftl_nand_page_pre_slc_blk, %object .size c_ftl_nand_page_pre_slc_blk, 2 c_ftl_nand_page_pre_slc_blk: .space 2 .section .bss.c_ftl_nand_page_pre_super_blk,"aw",%nobits .align 1 - .set .LANCHOR21,. + 0 + .set .LANCHOR20,. + 0 .type c_ftl_nand_page_pre_super_blk, %object .size c_ftl_nand_page_pre_super_blk, 2 c_ftl_nand_page_pre_super_blk: .space 2 .section .bss.c_ftl_nand_planes_num,"aw",%nobits .align 1 - .set .LANCHOR3,. + 0 + .set .LANCHOR2,. + 0 .type c_ftl_nand_planes_num, %object .size c_ftl_nand_planes_num, 2 c_ftl_nand_planes_num: .space 2 .section .bss.c_ftl_nand_planes_per_die,"aw",%nobits .align 1 - .set .LANCHOR11,. + 0 + .set .LANCHOR10,. + 0 .type c_ftl_nand_planes_per_die, %object .size c_ftl_nand_planes_per_die, 2 c_ftl_nand_planes_per_die: .space 2 .section .bss.c_ftl_nand_reserved_blks,"aw",%nobits .align 1 - .set .LANCHOR25,. + 0 + .set .LANCHOR24,. + 0 .type c_ftl_nand_reserved_blks, %object .size c_ftl_nand_reserved_blks, 2 c_ftl_nand_reserved_blks: .space 2 .section .bss.c_ftl_nand_sec_pre_page,"aw",%nobits .align 1 - .set .LANCHOR12,. + 0 + .set .LANCHOR11,. + 0 .type c_ftl_nand_sec_pre_page, %object .size c_ftl_nand_sec_pre_page, 2 c_ftl_nand_sec_pre_page: .space 2 .section .bss.c_ftl_nand_sec_pre_page_shift,"aw",%nobits .align 1 - .set .LANCHOR22,. + 0 + .set .LANCHOR21,. + 0 .type c_ftl_nand_sec_pre_page_shift, %object .size c_ftl_nand_sec_pre_page_shift, 2 c_ftl_nand_sec_pre_page_shift: .space 2 .section .bss.c_ftl_nand_sys_blks_per_plane,"aw",%nobits .align 2 - .set .LANCHOR2,. + 0 + .set .LANCHOR1,. + 0 .type c_ftl_nand_sys_blks_per_plane, %object .size c_ftl_nand_sys_blks_per_plane, 4 c_ftl_nand_sys_blks_per_plane: .space 4 .section .bss.c_ftl_nand_totle_phy_blks,"aw",%nobits .align 2 - .set .LANCHOR8,. + 0 + .set .LANCHOR7,. + 0 .type c_ftl_nand_totle_phy_blks, %object .size c_ftl_nand_totle_phy_blks, 4 c_ftl_nand_totle_phy_blks: .space 4 .section .bss.c_ftl_nand_type,"aw",%nobits .align 1 - .set .LANCHOR9,. + 0 + .set .LANCHOR8,. + 0 .type c_ftl_nand_type, %object .size c_ftl_nand_type, 2 c_ftl_nand_type: .space 2 .section .bss.c_ftl_nand_vendor_region_num,"aw",%nobits .align 1 - .set .LANCHOR28,. + 0 + .set .LANCHOR27,. + 0 .type c_ftl_nand_vendor_region_num, %object .size c_ftl_nand_vendor_region_num, 2 c_ftl_nand_vendor_region_num: .space 2 .section .bss.c_ftl_vendor_part_size,"aw",%nobits .align 1 - .set .LANCHOR16,. + 0 + .set .LANCHOR15,. + 0 .type c_ftl_vendor_part_size, %object .size c_ftl_vendor_part_size, 2 c_ftl_vendor_part_size: .space 2 .section .bss.c_gc_page_buf_num,"aw",%nobits .align 2 - .set .LANCHOR67,. + 0 + .set .LANCHOR66,. + 0 .type c_gc_page_buf_num, %object .size c_gc_page_buf_num, 4 c_gc_page_buf_num: .space 4 .section .bss.c_mlc_erase_count_value,"aw",%nobits .align 1 - .set .LANCHOR14,. + 0 + .set .LANCHOR13,. + 0 .type c_mlc_erase_count_value, %object .size c_mlc_erase_count_value, 2 c_mlc_erase_count_value: @@ -13541,294 +13406,294 @@ check_vpc_table: .space 16384 .section .bss.ftl_gc_temp_power_lost_recovery_flag,"aw",%nobits .align 2 - .set .LANCHOR133,. + 0 + .set .LANCHOR132,. + 0 .type ftl_gc_temp_power_lost_recovery_flag, %object .size ftl_gc_temp_power_lost_recovery_flag, 4 ftl_gc_temp_power_lost_recovery_flag: .space 4 .section .bss.gBbtInfo,"aw",%nobits .align 2 - .set .LANCHOR37,. + 0 + .set .LANCHOR36,. + 0 .type gBbtInfo, %object .size gBbtInfo, 60 gBbtInfo: .space 60 .section .bss.gL2pMapInfo,"aw",%nobits .align 2 - .set .LANCHOR129,. + 0 + .set .LANCHOR128,. + 0 .type gL2pMapInfo, %object .size gL2pMapInfo, 44 gL2pMapInfo: .space 44 .section .bss.gSysFreeQueue,"aw",%nobits .align 1 - .set .LANCHOR38,. + 0 + .set .LANCHOR37,. + 0 .type gSysFreeQueue, %object .size gSysFreeQueue, 2056 gSysFreeQueue: .space 2056 .section .bss.gSysInfo,"aw",%nobits .align 2 - .set .LANCHOR139,. + 0 + .set .LANCHOR138,. + 0 .type gSysInfo, %object .size gSysInfo, 16 gSysInfo: .space 16 .section .bss.gVendorBlkInfo,"aw",%nobits .align 2 - .set .LANCHOR161,. + 0 + .set .LANCHOR160,. + 0 .type gVendorBlkInfo, %object .size gVendorBlkInfo, 44 gVendorBlkInfo: .space 44 .section .bss.g_GlobalDataVersion,"aw",%nobits .align 2 - .set .LANCHOR83,. + 0 + .set .LANCHOR82,. + 0 .type g_GlobalDataVersion, %object .size g_GlobalDataVersion, 4 g_GlobalDataVersion: .space 4 .section .bss.g_GlobalSysVersion,"aw",%nobits .align 2 - .set .LANCHOR82,. + 0 + .set .LANCHOR81,. + 0 .type g_GlobalSysVersion, %object .size g_GlobalSysVersion, 4 g_GlobalSysVersion: .space 4 .section .bss.g_MaxLbaSector,"aw",%nobits .align 2 - .set .LANCHOR34,. + 0 + .set .LANCHOR33,. + 0 .type g_MaxLbaSector, %object .size g_MaxLbaSector, 4 g_MaxLbaSector: .space 4 .section .bss.g_MaxLbn,"aw",%nobits .align 2 - .set .LANCHOR179,. + 0 + .set .LANCHOR178,. + 0 .type g_MaxLbn, %object .size g_MaxLbn, 4 g_MaxLbn: .space 4 .section .bss.g_MaxLpn,"aw",%nobits .align 2 - .set .LANCHOR152,. + 0 + .set .LANCHOR151,. + 0 .type g_MaxLpn, %object .size g_MaxLpn, 4 g_MaxLpn: .space 4 .section .bss.g_VaildLpn,"aw",%nobits .align 2 - .set .LANCHOR59,. + 0 + .set .LANCHOR58,. + 0 .type g_VaildLpn, %object .size g_VaildLpn, 4 g_VaildLpn: .space 4 .section .bss.g_active_superblock,"aw",%nobits .align 2 - .set .LANCHOR51,. + 0 + .set .LANCHOR50,. + 0 .type g_active_superblock, %object .size g_active_superblock, 48 g_active_superblock: .space 48 .section .bss.g_buffer_superblock,"aw",%nobits .align 2 - .set .LANCHOR52,. + 0 + .set .LANCHOR51,. + 0 .type g_buffer_superblock, %object .size g_buffer_superblock, 48 g_buffer_superblock: .space 48 .section .bss.g_cur_erase_blk,"aw",%nobits .align 2 - .set .LANCHOR99,. + 0 + .set .LANCHOR98,. + 0 .type g_cur_erase_blk, %object .size g_cur_erase_blk, 4 g_cur_erase_blk: .space 4 .section .bss.g_ect_tbl_info_size,"aw",%nobits .align 1 - .set .LANCHOR116,. + 0 + .set .LANCHOR115,. + 0 .type g_ect_tbl_info_size, %object .size g_ect_tbl_info_size, 2 g_ect_tbl_info_size: .space 2 .section .bss.g_ect_tbl_power_up_flush,"aw",%nobits .align 1 - .set .LANCHOR164,. + 0 + .set .LANCHOR163,. + 0 .type g_ect_tbl_power_up_flush, %object .size g_ect_tbl_power_up_flush, 2 g_ect_tbl_power_up_flush: .space 2 .section .bss.g_ftl_nand_free_count,"aw",%nobits .align 2 - .set .LANCHOR176,. + 0 + .set .LANCHOR175,. + 0 .type g_ftl_nand_free_count, %object .size g_ftl_nand_free_count, 4 g_ftl_nand_free_count: .space 4 .section .bss.g_gc_bad_block_gc_index,"aw",%nobits .align 1 - .set .LANCHOR76,. + 0 + .set .LANCHOR75,. + 0 .type g_gc_bad_block_gc_index, %object .size g_gc_bad_block_gc_index, 2 g_gc_bad_block_gc_index: .space 2 .section .bss.g_gc_bad_block_temp_num,"aw",%nobits .align 1 - .set .LANCHOR74,. + 0 + .set .LANCHOR73,. + 0 .type g_gc_bad_block_temp_num, %object .size g_gc_bad_block_temp_num, 2 g_gc_bad_block_temp_num: .space 2 .section .bss.g_gc_bad_block_temp_tbl,"aw",%nobits .align 1 - .set .LANCHOR75,. + 0 + .set .LANCHOR74,. + 0 .type g_gc_bad_block_temp_tbl, %object .size g_gc_bad_block_temp_tbl, 34 g_gc_bad_block_temp_tbl: .space 34 .section .bss.g_gc_blk_index,"aw",%nobits .align 1 - .set .LANCHOR102,. + 0 + .set .LANCHOR101,. + 0 .type g_gc_blk_index, %object .size g_gc_blk_index, 2 g_gc_blk_index: .space 2 .section .bss.g_gc_blk_num,"aw",%nobits .align 1 - .set .LANCHOR69,. + 0 + .set .LANCHOR68,. + 0 .type g_gc_blk_num, %object .size g_gc_blk_num, 2 g_gc_blk_num: .space 2 .section .bss.g_gc_cur_blk_max_valid_pages,"aw",%nobits .align 1 - .set .LANCHOR174,. + 0 + .set .LANCHOR173,. + 0 .type g_gc_cur_blk_max_valid_pages, %object .size g_gc_cur_blk_max_valid_pages, 2 g_gc_cur_blk_max_valid_pages: .space 2 .section .bss.g_gc_cur_blk_valid_pages,"aw",%nobits .align 1 - .set .LANCHOR173,. + 0 + .set .LANCHOR172,. + 0 .type g_gc_cur_blk_valid_pages, %object .size g_gc_cur_blk_valid_pages, 2 g_gc_cur_blk_valid_pages: .space 2 .section .bss.g_gc_free_blk_threshold,"aw",%nobits .align 1 - .set .LANCHOR100,. + 0 + .set .LANCHOR99,. + 0 .type g_gc_free_blk_threshold, %object .size g_gc_free_blk_threshold, 2 g_gc_free_blk_threshold: .space 2 .section .bss.g_gc_head_data_block,"aw",%nobits .align 2 - .set .LANCHOR96,. + 0 + .set .LANCHOR95,. + 0 .type g_gc_head_data_block, %object .size g_gc_head_data_block, 4 g_gc_head_data_block: .space 4 .section .bss.g_gc_head_data_block_count,"aw",%nobits .align 2 - .set .LANCHOR97,. + 0 + .set .LANCHOR96,. + 0 .type g_gc_head_data_block_count, %object .size g_gc_head_data_block_count, 4 g_gc_head_data_block_count: .space 4 .section .bss.g_gc_merge_free_blk_threshold,"aw",%nobits .align 1 - .set .LANCHOR101,. + 0 + .set .LANCHOR100,. + 0 .type g_gc_merge_free_blk_threshold, %object .size g_gc_merge_free_blk_threshold, 2 g_gc_merge_free_blk_threshold: .space 2 .section .bss.g_gc_next_blk,"aw",%nobits .align 1 - .set .LANCHOR72,. + 0 + .set .LANCHOR71,. + 0 .type g_gc_next_blk, %object .size g_gc_next_blk, 2 g_gc_next_blk: .space 2 .section .bss.g_gc_next_blk_1,"aw",%nobits .align 1 - .set .LANCHOR73,. + 0 + .set .LANCHOR72,. + 0 .type g_gc_next_blk_1, %object .size g_gc_next_blk_1, 2 g_gc_next_blk_1: .space 2 .section .bss.g_gc_num_req,"aw",%nobits .align 2 - .set .LANCHOR62,. + 0 + .set .LANCHOR61,. + 0 .type g_gc_num_req, %object .size g_gc_num_req, 4 g_gc_num_req: .space 4 .section .bss.g_gc_page_offset,"aw",%nobits .align 1 - .set .LANCHOR70,. + 0 + .set .LANCHOR69,. + 0 .type g_gc_page_offset, %object .size g_gc_page_offset, 2 g_gc_page_offset: .space 2 .section .bss.g_gc_skip_write_count,"aw",%nobits .align 2 - .set .LANCHOR98,. + 0 + .set .LANCHOR97,. + 0 .type g_gc_skip_write_count, %object .size g_gc_skip_write_count, 4 g_gc_skip_write_count: .space 4 .section .bss.g_gc_superblock,"aw",%nobits .align 2 - .set .LANCHOR145,. + 0 + .set .LANCHOR144,. + 0 .type g_gc_superblock, %object .size g_gc_superblock, 48 g_gc_superblock: .space 48 .section .bss.g_gc_temp_superblock,"aw",%nobits .align 2 - .set .LANCHOR53,. + 0 + .set .LANCHOR52,. + 0 .type g_gc_temp_superblock, %object .size g_gc_temp_superblock, 48 g_gc_temp_superblock: .space 48 .section .bss.g_in_gc_progress,"aw",%nobits .align 2 - .set .LANCHOR94,. + 0 + .set .LANCHOR93,. + 0 .type g_in_gc_progress, %object .size g_in_gc_progress, 4 g_in_gc_progress: .space 4 .section .bss.g_in_swl_replace,"aw",%nobits .align 2 - .set .LANCHOR95,. + 0 + .set .LANCHOR94,. + 0 .type g_in_swl_replace, %object .size g_in_swl_replace, 4 g_in_swl_replace: .space 4 .section .bss.g_l2p_last_update_region_id,"aw",%nobits .align 1 - .set .LANCHOR56,. + 0 + .set .LANCHOR55,. + 0 .type g_l2p_last_update_region_id, %object .size g_l2p_last_update_region_id, 2 g_l2p_last_update_region_id: .space 2 .section .bss.g_max_erase_count,"aw",%nobits .align 2 - .set .LANCHOR92,. + 0 + .set .LANCHOR91,. + 0 .type g_max_erase_count, %object .size g_max_erase_count, 4 g_max_erase_count: .space 4 .section .bss.g_min_erase_count,"aw",%nobits .align 2 - .set .LANCHOR93,. + 0 + .set .LANCHOR92,. + 0 .type g_min_erase_count, %object .size g_min_erase_count, 4 g_min_erase_count: .space 4 .section .bss.g_nand_ops,"aw",%nobits .align 2 - .set .LANCHOR78,. + 0 + .set .LANCHOR77,. + 0 .type g_nand_ops, %object .size g_nand_ops, 24 g_nand_ops: @@ -13842,203 +13707,203 @@ g_nand_phy_info: .space 24 .section .bss.g_num_data_superblocks,"aw",%nobits .align 1 - .set .LANCHOR44,. + 0 + .set .LANCHOR43,. + 0 .type g_num_data_superblocks, %object .size g_num_data_superblocks, 2 g_num_data_superblocks: .space 2 .section .bss.g_num_free_superblocks,"aw",%nobits .align 1 - .set .LANCHOR48,. + 0 + .set .LANCHOR47,. + 0 .type g_num_free_superblocks, %object .size g_num_free_superblocks, 2 g_num_free_superblocks: .space 2 .section .bss.g_power_lost_recovery_flag,"aw",%nobits .align 1 - .set .LANCHOR156,. + 0 + .set .LANCHOR155,. + 0 .type g_power_lost_recovery_flag, %object .size g_power_lost_recovery_flag, 2 g_power_lost_recovery_flag: .space 2 .section .bss.g_recovery_page_min_ver,"aw",%nobits .align 2 - .set .LANCHOR134,. + 0 + .set .LANCHOR133,. + 0 .type g_recovery_page_min_ver, %object .size g_recovery_page_min_ver, 4 g_recovery_page_min_ver: .space 4 .section .bss.g_recovery_page_num,"aw",%nobits .align 2 - .set .LANCHOR157,. + 0 + .set .LANCHOR156,. + 0 .type g_recovery_page_num, %object .size g_recovery_page_num, 4 g_recovery_page_num: .space 4 .section .bss.g_recovery_ppa_tbl,"aw",%nobits .align 2 - .set .LANCHOR158,. + 0 + .set .LANCHOR157,. + 0 .type g_recovery_ppa_tbl, %object .size g_recovery_ppa_tbl, 128 g_recovery_ppa_tbl: .space 128 .section .bss.g_sys_ext_data,"aw",%nobits .align 2 - .set .LANCHOR135,. + 0 + .set .LANCHOR134,. + 0 .type g_sys_ext_data, %object .size g_sys_ext_data, 512 g_sys_ext_data: .space 512 .section .bss.g_sys_save_data,"aw",%nobits .align 2 - .set .LANCHOR39,. + 0 + .set .LANCHOR38,. + 0 .type g_sys_save_data, %object .size g_sys_save_data, 48 g_sys_save_data: .space 48 .section .bss.g_tmp_data_superblock_id,"aw",%nobits .align 1 - .set .LANCHOR131,. + 0 + .set .LANCHOR130,. + 0 .type g_tmp_data_superblock_id, %object .size g_tmp_data_superblock_id, 2 g_tmp_data_superblock_id: .space 2 .section .bss.g_totle_avg_erase_count,"aw",%nobits .align 2 - .set .LANCHOR143,. + 0 + .set .LANCHOR142,. + 0 .type g_totle_avg_erase_count, %object .size g_totle_avg_erase_count, 4 g_totle_avg_erase_count: .space 4 .section .bss.g_totle_cache_write_count,"aw",%nobits .align 2 - .set .LANCHOR87,. + 0 + .set .LANCHOR86,. + 0 .type g_totle_cache_write_count, %object .size g_totle_cache_write_count, 4 g_totle_cache_write_count: .space 4 .section .bss.g_totle_discard_page_count,"aw",%nobits .align 2 - .set .LANCHOR86,. + 0 + .set .LANCHOR85,. + 0 .type g_totle_discard_page_count, %object .size g_totle_discard_page_count, 4 g_totle_discard_page_count: .space 4 .section .bss.g_totle_gc_page_count,"aw",%nobits .align 2 - .set .LANCHOR84,. + 0 + .set .LANCHOR83,. + 0 .type g_totle_gc_page_count, %object .size g_totle_gc_page_count, 4 g_totle_gc_page_count: .space 4 .section .bss.g_totle_l2p_write_count,"aw",%nobits .align 2 - .set .LANCHOR88,. + 0 + .set .LANCHOR87,. + 0 .type g_totle_l2p_write_count, %object .size g_totle_l2p_write_count, 4 g_totle_l2p_write_count: .space 4 .section .bss.g_totle_map_block,"aw",%nobits .align 1 - .set .LANCHOR130,. + 0 + .set .LANCHOR129,. + 0 .type g_totle_map_block, %object .size g_totle_map_block, 2 g_totle_map_block: .space 2 .section .bss.g_totle_mlc_erase_count,"aw",%nobits .align 2 - .set .LANCHOR90,. + 0 + .set .LANCHOR89,. + 0 .type g_totle_mlc_erase_count, %object .size g_totle_mlc_erase_count, 4 g_totle_mlc_erase_count: .space 4 .section .bss.g_totle_read_page_count,"aw",%nobits .align 2 - .set .LANCHOR89,. + 0 + .set .LANCHOR88,. + 0 .type g_totle_read_page_count, %object .size g_totle_read_page_count, 4 g_totle_read_page_count: .space 4 .section .bss.g_totle_read_sector,"aw",%nobits .align 2 - .set .LANCHOR163,. + 0 + .set .LANCHOR162,. + 0 .type g_totle_read_sector, %object .size g_totle_read_sector, 4 g_totle_read_sector: .space 4 .section .bss.g_totle_slc_erase_count,"aw",%nobits .align 2 - .set .LANCHOR91,. + 0 + .set .LANCHOR90,. + 0 .type g_totle_slc_erase_count, %object .size g_totle_slc_erase_count, 4 g_totle_slc_erase_count: .space 4 .section .bss.g_totle_swl_count,"aw",%nobits .align 2 - .set .LANCHOR132,. + 0 + .set .LANCHOR131,. + 0 .type g_totle_swl_count, %object .size g_totle_swl_count, 4 g_totle_swl_count: .space 4 .section .bss.g_totle_sys_slc_erase_count,"aw",%nobits .align 2 - .set .LANCHOR80,. + 0 + .set .LANCHOR79,. + 0 .type g_totle_sys_slc_erase_count, %object .size g_totle_sys_slc_erase_count, 4 g_totle_sys_slc_erase_count: .space 4 .section .bss.g_totle_vendor_block,"aw",%nobits .align 1 - .set .LANCHOR35,. + 0 + .set .LANCHOR34,. + 0 .type g_totle_vendor_block, %object .size g_totle_vendor_block, 2 g_totle_vendor_block: .space 2 .section .bss.g_totle_write_page_count,"aw",%nobits .align 2 - .set .LANCHOR85,. + 0 + .set .LANCHOR84,. + 0 .type g_totle_write_page_count, %object .size g_totle_write_page_count, 4 g_totle_write_page_count: .space 4 .section .bss.g_totle_write_sector,"aw",%nobits .align 2 - .set .LANCHOR162,. + 0 + .set .LANCHOR161,. + 0 .type g_totle_write_sector, %object .size g_totle_write_sector, 4 g_totle_write_sector: .space 4 .section .bss.gc_discard_updated,"aw",%nobits .align 2 - .set .LANCHOR167,. + 0 + .set .LANCHOR166,. + 0 .type gc_discard_updated, %object .size gc_discard_updated, 4 gc_discard_updated: .space 4 .section .bss.gc_ink_free_return_value,"aw",%nobits .align 1 - .set .LANCHOR172,. + 0 + .set .LANCHOR171,. + 0 .type gc_ink_free_return_value, %object .size gc_ink_free_return_value, 2 gc_ink_free_return_value: .space 2 .section .bss.gp_ect_tbl_info,"aw",%nobits .align 2 - .set .LANCHOR118,. + 0 + .set .LANCHOR117,. + 0 .type gp_ect_tbl_info, %object .size gp_ect_tbl_info, 4 gp_ect_tbl_info: .space 4 .section .bss.gp_flash_check_buf,"aw",%nobits .align 2 - .set .LANCHOR184,. + 0 + .set .LANCHOR183,. + 0 .type gp_flash_check_buf, %object .size gp_flash_check_buf, 4 gp_flash_check_buf: .space 4 .section .bss.gp_gc_page_buf_info,"aw",%nobits .align 2 - .set .LANCHOR63,. + 0 + .set .LANCHOR62,. + 0 .type gp_gc_page_buf_info, %object .size gp_gc_page_buf_info, 4 gp_gc_page_buf_info: @@ -14051,188 +13916,181 @@ gp_last_act_superblock: .space 4 .section .bss.idb_buf,"aw",%nobits .align 2 - .set .LANCHOR183,. + 0 + .set .LANCHOR182,. + 0 .type idb_buf, %object .size idb_buf, 4 idb_buf: .space 4 .section .bss.idb_need_write_back,"aw",%nobits .align 2 - .set .LANCHOR182,. + 0 + .set .LANCHOR181,. + 0 .type idb_need_write_back, %object .size idb_need_write_back, 4 idb_need_write_back: .space 4 .section .bss.low_format_en,"aw",%nobits .align 2 - .set .LANCHOR181,. + 0 + .set .LANCHOR180,. + 0 .type low_format_en, %object .size low_format_en, 4 low_format_en: - .space 4 - .section .bss.p_blk_mode_table,"aw",%nobits - .align 2 - .set .LANCHOR1,. + 0 - .type p_blk_mode_table, %object - .size p_blk_mode_table, 4 -p_blk_mode_table: .space 4 .section .bss.p_data_block_list_head,"aw",%nobits .align 2 - .set .LANCHOR41,. + 0 + .set .LANCHOR40,. + 0 .type p_data_block_list_head, %object .size p_data_block_list_head, 4 p_data_block_list_head: .space 4 .section .bss.p_data_block_list_table,"aw",%nobits .align 2 - .set .LANCHOR40,. + 0 + .set .LANCHOR39,. + 0 .type p_data_block_list_table, %object .size p_data_block_list_table, 4 p_data_block_list_table: .space 4 .section .bss.p_data_block_list_tail,"aw",%nobits .align 2 - .set .LANCHOR43,. + 0 + .set .LANCHOR42,. + 0 .type p_data_block_list_tail, %object .size p_data_block_list_tail, 4 p_data_block_list_tail: .space 4 .section .bss.p_erase_count_table,"aw",%nobits .align 2 - .set .LANCHOR47,. + 0 + .set .LANCHOR46,. + 0 .type p_erase_count_table, %object .size p_erase_count_table, 4 p_erase_count_table: .space 4 .section .bss.p_free_data_block_list_head,"aw",%nobits .align 2 - .set .LANCHOR46,. + 0 + .set .LANCHOR45,. + 0 .type p_free_data_block_list_head, %object .size p_free_data_block_list_head, 4 p_free_data_block_list_head: .space 4 .section .bss.p_gc_blk_tbl,"aw",%nobits .align 2 - .set .LANCHOR68,. + 0 + .set .LANCHOR67,. + 0 .type p_gc_blk_tbl, %object .size p_gc_blk_tbl, 4 p_gc_blk_tbl: .space 4 .section .bss.p_gc_data_buf,"aw",%nobits .align 2 - .set .LANCHOR64,. + 0 + .set .LANCHOR63,. + 0 .type p_gc_data_buf, %object .size p_gc_data_buf, 4 p_gc_data_buf: .space 4 .section .bss.p_gc_page_info,"aw",%nobits .align 2 - .set .LANCHOR71,. + 0 + .set .LANCHOR70,. + 0 .type p_gc_page_info, %object .size p_gc_page_info, 4 p_gc_page_info: .space 4 .section .bss.p_gc_spare_buf,"aw",%nobits .align 2 - .set .LANCHOR65,. + 0 + .set .LANCHOR64,. + 0 .type p_gc_spare_buf, %object .size p_gc_spare_buf, 4 p_gc_spare_buf: .space 4 .section .bss.p_io_data_buf_0,"aw",%nobits .align 2 - .set .LANCHOR109,. + 0 + .set .LANCHOR108,. + 0 .type p_io_data_buf_0, %object .size p_io_data_buf_0, 4 p_io_data_buf_0: .space 4 .section .bss.p_io_data_buf_1,"aw",%nobits .align 2 - .set .LANCHOR110,. + 0 + .set .LANCHOR109,. + 0 .type p_io_data_buf_1, %object .size p_io_data_buf_1, 4 p_io_data_buf_1: .space 4 .section .bss.p_io_spare_buf,"aw",%nobits .align 2 - .set .LANCHOR115,. + 0 + .set .LANCHOR114,. + 0 .type p_io_spare_buf, %object .size p_io_spare_buf, 4 p_io_spare_buf: .space 4 .section .bss.p_l2p_map_buf,"aw",%nobits .align 2 - .set .LANCHOR126,. + 0 + .set .LANCHOR125,. + 0 .type p_l2p_map_buf, %object .size p_l2p_map_buf, 4 p_l2p_map_buf: .space 4 .section .bss.p_l2p_ram_map,"aw",%nobits .align 2 - .set .LANCHOR55,. + 0 + .set .LANCHOR54,. + 0 .type p_l2p_ram_map, %object .size p_l2p_ram_map, 4 p_l2p_ram_map: .space 4 .section .bss.p_map_block_table,"aw",%nobits .align 2 - .set .LANCHOR119,. + 0 + .set .LANCHOR118,. + 0 .type p_map_block_table, %object .size p_map_block_table, 4 p_map_block_table: .space 4 .section .bss.p_map_block_valid_page_count,"aw",%nobits .align 2 - .set .LANCHOR120,. + 0 + .set .LANCHOR119,. + 0 .type p_map_block_valid_page_count, %object .size p_map_block_valid_page_count, 4 p_map_block_valid_page_count: .space 4 .section .bss.p_map_block_ver_table,"aw",%nobits .align 2 - .set .LANCHOR125,. + 0 + .set .LANCHOR124,. + 0 .type p_map_block_ver_table, %object .size p_map_block_ver_table, 4 p_map_block_ver_table: .space 4 .section .bss.p_map_region_ppn_table,"aw",%nobits .align 2 - .set .LANCHOR124,. + 0 + .set .LANCHOR123,. + 0 .type p_map_region_ppn_table, %object .size p_map_region_ppn_table, 4 p_map_region_ppn_table: .space 4 .section .bss.p_plane_order_table,"aw",%nobits - .set .LANCHOR13,. + 0 + .set .LANCHOR12,. + 0 .type p_plane_order_table, %object .size p_plane_order_table, 32 p_plane_order_table: .space 32 .section .bss.p_swl_mul_table,"aw",%nobits .align 2 - .set .LANCHOR117,. + 0 + .set .LANCHOR116,. + 0 .type p_swl_mul_table, %object .size p_swl_mul_table, 4 p_swl_mul_table: .space 4 .section .bss.p_sys_data_buf,"aw",%nobits .align 2 - .set .LANCHOR106,. + 0 + .set .LANCHOR105,. + 0 .type p_sys_data_buf, %object .size p_sys_data_buf, 4 p_sys_data_buf: .space 4 .section .bss.p_sys_data_buf_1,"aw",%nobits .align 2 - .set .LANCHOR107,. + 0 + .set .LANCHOR106,. + 0 .type p_sys_data_buf_1, %object .size p_sys_data_buf_1, 4 p_sys_data_buf_1: .space 4 .section .bss.p_sys_spare_buf,"aw",%nobits .align 2 - .set .LANCHOR114,. + 0 + .set .LANCHOR113,. + 0 .type p_sys_spare_buf, %object .size p_sys_spare_buf, 4 p_sys_spare_buf: @@ -14245,119 +14103,119 @@ p_valid_page_count_check_table: .space 4 .section .bss.p_valid_page_count_table,"aw",%nobits .align 2 - .set .LANCHOR42,. + 0 + .set .LANCHOR41,. + 0 .type p_valid_page_count_table, %object .size p_valid_page_count_table, 4 p_valid_page_count_table: .space 4 .section .bss.p_vendor_block_table,"aw",%nobits .align 2 - .set .LANCHOR36,. + 0 + .set .LANCHOR35,. + 0 .type p_vendor_block_table, %object .size p_vendor_block_table, 4 p_vendor_block_table: .space 4 .section .bss.p_vendor_block_valid_page_count,"aw",%nobits .align 2 - .set .LANCHOR121,. + 0 + .set .LANCHOR120,. + 0 .type p_vendor_block_valid_page_count, %object .size p_vendor_block_valid_page_count, 4 p_vendor_block_valid_page_count: .space 4 .section .bss.p_vendor_block_ver_table,"aw",%nobits .align 2 - .set .LANCHOR122,. + 0 + .set .LANCHOR121,. + 0 .type p_vendor_block_ver_table, %object .size p_vendor_block_ver_table, 4 p_vendor_block_ver_table: .space 4 .section .bss.p_vendor_data_buf,"aw",%nobits .align 2 - .set .LANCHOR108,. + 0 + .set .LANCHOR107,. + 0 .type p_vendor_data_buf, %object .size p_vendor_data_buf, 4 p_vendor_data_buf: .space 4 .section .bss.p_vendor_region_ppn_table,"aw",%nobits .align 2 - .set .LANCHOR123,. + 0 + .set .LANCHOR122,. + 0 .type p_vendor_region_ppn_table, %object .size p_vendor_region_ppn_table, 4 p_vendor_region_ppn_table: .space 4 .section .bss.req_erase,"aw",%nobits .align 2 - .set .LANCHOR79,. + 0 + .set .LANCHOR78,. + 0 .type req_erase, %object .size req_erase, 4 req_erase: .space 4 .section .bss.req_gc,"aw",%nobits .align 2 - .set .LANCHOR66,. + 0 + .set .LANCHOR65,. + 0 .type req_gc, %object .size req_gc, 4 req_gc: .space 4 .section .bss.req_gc_dst,"aw",%nobits .align 2 - .set .LANCHOR104,. + 0 + .set .LANCHOR103,. + 0 .type req_gc_dst, %object .size req_gc_dst, 4 req_gc_dst: .space 4 .section .bss.req_prgm,"aw",%nobits .align 2 - .set .LANCHOR105,. + 0 + .set .LANCHOR104,. + 0 .type req_prgm, %object .size req_prgm, 4 req_prgm: .space 4 .section .bss.req_read,"aw",%nobits .align 2 - .set .LANCHOR103,. + 0 + .set .LANCHOR102,. + 0 .type req_read, %object .size req_read, 4 req_read: .space 4 .section .bss.req_sys,"aw",%nobits .align 2 - .set .LANCHOR138,. + 0 + .set .LANCHOR137,. + 0 .type req_sys, %object .size req_sys, 20 req_sys: .space 20 .section .bss.sftl_nand_check_buf,"aw",%nobits .align 2 - .set .LANCHOR111,. + 0 + .set .LANCHOR110,. + 0 .type sftl_nand_check_buf, %object .size sftl_nand_check_buf, 4 sftl_nand_check_buf: .space 4 .section .bss.sftl_nand_check_spare_buf,"aw",%nobits .align 2 - .set .LANCHOR113,. + 0 + .set .LANCHOR112,. + 0 .type sftl_nand_check_spare_buf, %object .size sftl_nand_check_spare_buf, 4 sftl_nand_check_spare_buf: .space 4 .section .bss.sftl_temp_buf,"aw",%nobits .align 2 - .set .LANCHOR112,. + 0 + .set .LANCHOR111,. + 0 .type sftl_temp_buf, %object .size sftl_temp_buf, 4 sftl_temp_buf: .space 4 .section .data.ftl_gc_temp_block_bops_scan_page_addr,"aw",%progbits .align 1 - .set .LANCHOR160,. + 0 + .set .LANCHOR159,. + 0 .type ftl_gc_temp_block_bops_scan_page_addr, %object .size ftl_gc_temp_block_bops_scan_page_addr, 2 ftl_gc_temp_block_bops_scan_page_addr: .short -1 .section .data.gFtlInitStatus,"aw",%progbits .align 2 - .set .LANCHOR166,. + 0 + .set .LANCHOR165,. + 0 .type gFtlInitStatus, %object .size gFtlInitStatus, 4 gFtlInitStatus: @@ -14453,224 +14311,224 @@ power_up_flag: .ascii "FtlWrite: lpa error:%x %x\012\000" .section .rodata.FtlWriteToIDB.str1.1,"aMS",%progbits,1 .LC50: - .ascii "write_idblock fail! %x %x %x %x\012\000" + .ascii "write_idblock %x %x\012\000" .LC51: - .ascii "%s idb buffer alloc fail\012\000" + .ascii "write_idblock fail! %x %x %x %x\012\000" .LC52: - .ascii "%p %x %p %x\012\000" + .ascii "%s idb buffer alloc fail\012\000" .section .rodata.INSERT_DATA_LIST.str1.1,"aMS",%progbits,1 .LC1: .ascii "\012!!!!! error @ func:%s - line:%d\012\000" - .section .rodata.__func__.10026,"a",%progbits - .set .LANCHOR175,. + 0 - .type __func__.10026, %object - .size __func__.10026, 23 -__func__.10026: - .ascii "rk_ftl_garbage_collect\000" - .section .rodata.__func__.10298,"a",%progbits - .set .LANCHOR137,. + 0 - .type __func__.10298, %object - .size __func__.10298, 15 -__func__.10298: - .ascii "FlashReadPages\000" - .section .rodata.__func__.10317,"a",%progbits - .set .LANCHOR142,. + 0 - .type __func__.10317, %object - .size __func__.10317, 15 -__func__.10317: - .ascii "FlashProgPages\000" - .section .rodata.__func__.10341,"a",%progbits - .set .LANCHOR77,. + 0 - .type __func__.10341, %object - .size __func__.10341, 17 -__func__.10341: - .ascii "FlashEraseBlocks\000" - .section .rodata.__func__.10456,"a",%progbits - .set .LANCHOR185,. + 0 - .type __func__.10456, %object - .size __func__.10456, 14 -__func__.10456: - .ascii "FtlWriteToIDB\000" - .section .rodata.__func__.8943,"a",%progbits + .section .rodata.__func__.10025,"a",%progbits .set .LANCHOR169,. + 0 - .type __func__.8943, %object - .size __func__.8943, 13 -__func__.8943: - .ascii "FtlProgPages\000" - .section .rodata.__func__.8971,"a",%progbits - .set .LANCHOR177,. + 0 - .type __func__.8971, %object - .size __func__.8971, 9 -__func__.8971: - .ascii "FtlWrite\000" - .section .rodata.__func__.9053,"a",%progbits - .set .LANCHOR128,. + 0 - .type __func__.9053, %object - .size __func__.9053, 14 -__func__.9053: - .ascii "FtlBbt2Bitmap\000" - .section .rodata.__func__.9088,"a",%progbits - .set .LANCHOR141,. + 0 - .type __func__.9088, %object - .size __func__.9088, 11 -__func__.9088: - .ascii "FtlLoadBbt\000" - .section .rodata.__func__.9203,"a",%progbits - .set .LANCHOR49,. + 0 - .type __func__.9203, %object - .size __func__.9203, 17 -__func__.9203: - .ascii "INSERT_FREE_LIST\000" - .section .rodata.__func__.9208,"a",%progbits - .set .LANCHOR45,. + 0 - .type __func__.9208, %object - .size __func__.9208, 17 -__func__.9208: - .ascii "INSERT_DATA_LIST\000" - .section .rodata.__func__.9239,"a",%progbits - .set .LANCHOR50,. + 0 - .type __func__.9239, %object - .size __func__.9239, 17 -__func__.9239: - .ascii "List_remove_node\000" - .section .rodata.__func__.9271,"a",%progbits - .set .LANCHOR54,. + 0 - .type __func__.9271, %object - .size __func__.9271, 22 -__func__.9271: - .ascii "List_update_data_list\000" - .section .rodata.__func__.9280,"a",%progbits - .set .LANCHOR150,. + 0 - .type __func__.9280, %object - .size __func__.9280, 16 -__func__.9280: - .ascii "load_l2p_region\000" - .section .rodata.__func__.9313,"a",%progbits - .set .LANCHOR81,. + 0 - .type __func__.9313, %object - .size __func__.9313, 26 -__func__.9313: - .ascii "ftl_map_blk_alloc_new_blk\000" - .section .rodata.__func__.9324,"a",%progbits - .set .LANCHOR151,. + 0 - .type __func__.9324, %object - .size __func__.9324, 15 -__func__.9324: - .ascii "ftl_map_blk_gc\000" - .section .rodata.__func__.9339,"a",%progbits - .set .LANCHOR148,. + 0 - .type __func__.9339, %object - .size __func__.9339, 31 -__func__.9339: - .ascii "Ftl_write_map_blk_to_last_page\000" - .section .rodata.__func__.9353,"a",%progbits - .set .LANCHOR149,. + 0 - .type __func__.9353, %object - .size __func__.9353, 16 -__func__.9353: - .ascii "FtlMapWritePage\000" - .section .rodata.__func__.9378,"a",%progbits - .set .LANCHOR57,. + 0 - .type __func__.9378, %object - .size __func__.9378, 22 -__func__.9378: - .ascii "select_l2p_ram_region\000" - .section .rodata.__func__.9395,"a",%progbits - .set .LANCHOR153,. + 0 - .type __func__.9395, %object - .size __func__.9395, 9 -__func__.9395: - .ascii "log2phys\000" - .section .rodata.__func__.9459,"a",%progbits - .set .LANCHOR165,. + 0 - .type __func__.9459, %object - .size __func__.9459, 15 -__func__.9459: - .ascii "FtlVpcTblFlush\000" - .section .rodata.__func__.9481,"a",%progbits - .set .LANCHOR140,. + 0 - .type __func__.9481, %object - .size __func__.9481, 14 -__func__.9481: - .ascii "FtlScanSysBlk\000" - .section .rodata.__func__.9537,"a",%progbits - .set .LANCHOR178,. + 0 - .type __func__.9537, %object - .size __func__.9537, 15 -__func__.9537: - .ascii "FtlLoadSysInfo\000" - .section .rodata.__func__.9559,"a",%progbits - .set .LANCHOR180,. + 0 - .type __func__.9559, %object - .size __func__.9559, 18 -__func__.9559: - .ascii "FtlMapTblRecovery\000" - .section .rodata.__func__.9605,"a",%progbits - .set .LANCHOR154,. + 0 - .type __func__.9605, %object - .size __func__.9605, 16 -__func__.9605: - .ascii "FtlReUsePrevPpa\000" - .section .rodata.__func__.9639,"a",%progbits - .set .LANCHOR155,. + 0 - .type __func__.9639, %object - .size __func__.9639, 22 -__func__.9639: - .ascii "FtlRecoverySuperblock\000" - .section .rodata.__func__.9696,"a",%progbits - .set .LANCHOR60,. + 0 - .type __func__.9696, %object - .size __func__.9696, 16 -__func__.9696: - .ascii "make_superblock\000" - .section .rodata.__func__.9717,"a",%progbits - .set .LANCHOR136,. + 0 - .type __func__.9717, %object - .size __func__.9717, 18 -__func__.9717: - .ascii "SupperBlkListInit\000" - .section .rodata.__func__.9744,"a",%progbits - .set .LANCHOR159,. + 0 - .type __func__.9744, %object - .size __func__.9744, 14 -__func__.9744: - .ascii "ftl_check_vpc\000" - .section .rodata.__func__.9809,"a",%progbits - .set .LANCHOR144,. + 0 - .type __func__.9809, %object - .size __func__.9809, 25 -__func__.9809: - .ascii "allocate_data_superblock\000" - .section .rodata.__func__.9830,"a",%progbits - .set .LANCHOR168,. + 0 - .type __func__.9830, %object - .size __func__.9830, 29 -__func__.9830: - .ascii "allocate_new_data_superblock\000" - .section .rodata.__func__.9837,"a",%progbits - .set .LANCHOR61,. + 0 - .type __func__.9837, %object - .size __func__.9837, 19 -__func__.9837: - .ascii "get_new_active_ppa\000" - .section .rodata.__func__.9850,"a",%progbits - .set .LANCHOR146,. + 0 - .type __func__.9850, %object - .size __func__.9850, 16 -__func__.9850: - .ascii "update_vpc_list\000" - .section .rodata.__func__.9857,"a",%progbits - .set .LANCHOR147,. + 0 - .type __func__.9857, %object - .size __func__.9857, 20 -__func__.9857: - .ascii "decrement_vpc_count\000" - .section .rodata.__func__.9927,"a",%progbits - .set .LANCHOR170,. + 0 - .type __func__.9927, %object - .size __func__.9927, 19 -__func__.9927: + .type __func__.10025, %object + .size __func__.10025, 19 +__func__.10025: .ascii "FtlGcFreeTempBlock\000" + .section .rodata.__func__.10124,"a",%progbits + .set .LANCHOR174,. + 0 + .type __func__.10124, %object + .size __func__.10124, 23 +__func__.10124: + .ascii "rk_ftl_garbage_collect\000" + .section .rodata.__func__.10392,"a",%progbits + .set .LANCHOR136,. + 0 + .type __func__.10392, %object + .size __func__.10392, 15 +__func__.10392: + .ascii "FlashReadPages\000" + .section .rodata.__func__.10411,"a",%progbits + .set .LANCHOR141,. + 0 + .type __func__.10411, %object + .size __func__.10411, 15 +__func__.10411: + .ascii "FlashProgPages\000" + .section .rodata.__func__.10435,"a",%progbits + .set .LANCHOR76,. + 0 + .type __func__.10435, %object + .size __func__.10435, 17 +__func__.10435: + .ascii "FlashEraseBlocks\000" + .section .rodata.__func__.10554,"a",%progbits + .set .LANCHOR184,. + 0 + .type __func__.10554, %object + .size __func__.10554, 14 +__func__.10554: + .ascii "FtlWriteToIDB\000" + .section .rodata.__func__.9048,"a",%progbits + .set .LANCHOR168,. + 0 + .type __func__.9048, %object + .size __func__.9048, 13 +__func__.9048: + .ascii "FtlProgPages\000" + .section .rodata.__func__.9076,"a",%progbits + .set .LANCHOR176,. + 0 + .type __func__.9076, %object + .size __func__.9076, 9 +__func__.9076: + .ascii "FtlWrite\000" + .section .rodata.__func__.9158,"a",%progbits + .set .LANCHOR127,. + 0 + .type __func__.9158, %object + .size __func__.9158, 14 +__func__.9158: + .ascii "FtlBbt2Bitmap\000" + .section .rodata.__func__.9193,"a",%progbits + .set .LANCHOR140,. + 0 + .type __func__.9193, %object + .size __func__.9193, 11 +__func__.9193: + .ascii "FtlLoadBbt\000" + .section .rodata.__func__.9308,"a",%progbits + .set .LANCHOR48,. + 0 + .type __func__.9308, %object + .size __func__.9308, 17 +__func__.9308: + .ascii "INSERT_FREE_LIST\000" + .section .rodata.__func__.9313,"a",%progbits + .set .LANCHOR44,. + 0 + .type __func__.9313, %object + .size __func__.9313, 17 +__func__.9313: + .ascii "INSERT_DATA_LIST\000" + .section .rodata.__func__.9344,"a",%progbits + .set .LANCHOR49,. + 0 + .type __func__.9344, %object + .size __func__.9344, 17 +__func__.9344: + .ascii "List_remove_node\000" + .section .rodata.__func__.9376,"a",%progbits + .set .LANCHOR53,. + 0 + .type __func__.9376, %object + .size __func__.9376, 22 +__func__.9376: + .ascii "List_update_data_list\000" + .section .rodata.__func__.9385,"a",%progbits + .set .LANCHOR149,. + 0 + .type __func__.9385, %object + .size __func__.9385, 16 +__func__.9385: + .ascii "load_l2p_region\000" + .section .rodata.__func__.9418,"a",%progbits + .set .LANCHOR80,. + 0 + .type __func__.9418, %object + .size __func__.9418, 26 +__func__.9418: + .ascii "ftl_map_blk_alloc_new_blk\000" + .section .rodata.__func__.9429,"a",%progbits + .set .LANCHOR150,. + 0 + .type __func__.9429, %object + .size __func__.9429, 15 +__func__.9429: + .ascii "ftl_map_blk_gc\000" + .section .rodata.__func__.9444,"a",%progbits + .set .LANCHOR147,. + 0 + .type __func__.9444, %object + .size __func__.9444, 31 +__func__.9444: + .ascii "Ftl_write_map_blk_to_last_page\000" + .section .rodata.__func__.9458,"a",%progbits + .set .LANCHOR148,. + 0 + .type __func__.9458, %object + .size __func__.9458, 16 +__func__.9458: + .ascii "FtlMapWritePage\000" + .section .rodata.__func__.9483,"a",%progbits + .set .LANCHOR56,. + 0 + .type __func__.9483, %object + .size __func__.9483, 22 +__func__.9483: + .ascii "select_l2p_ram_region\000" + .section .rodata.__func__.9500,"a",%progbits + .set .LANCHOR152,. + 0 + .type __func__.9500, %object + .size __func__.9500, 9 +__func__.9500: + .ascii "log2phys\000" + .section .rodata.__func__.9564,"a",%progbits + .set .LANCHOR164,. + 0 + .type __func__.9564, %object + .size __func__.9564, 15 +__func__.9564: + .ascii "FtlVpcTblFlush\000" + .section .rodata.__func__.9586,"a",%progbits + .set .LANCHOR139,. + 0 + .type __func__.9586, %object + .size __func__.9586, 14 +__func__.9586: + .ascii "FtlScanSysBlk\000" + .section .rodata.__func__.9635,"a",%progbits + .set .LANCHOR177,. + 0 + .type __func__.9635, %object + .size __func__.9635, 15 +__func__.9635: + .ascii "FtlLoadSysInfo\000" + .section .rodata.__func__.9657,"a",%progbits + .set .LANCHOR179,. + 0 + .type __func__.9657, %object + .size __func__.9657, 18 +__func__.9657: + .ascii "FtlMapTblRecovery\000" + .section .rodata.__func__.9703,"a",%progbits + .set .LANCHOR153,. + 0 + .type __func__.9703, %object + .size __func__.9703, 16 +__func__.9703: + .ascii "FtlReUsePrevPpa\000" + .section .rodata.__func__.9737,"a",%progbits + .set .LANCHOR154,. + 0 + .type __func__.9737, %object + .size __func__.9737, 22 +__func__.9737: + .ascii "FtlRecoverySuperblock\000" + .section .rodata.__func__.9794,"a",%progbits + .set .LANCHOR59,. + 0 + .type __func__.9794, %object + .size __func__.9794, 16 +__func__.9794: + .ascii "make_superblock\000" + .section .rodata.__func__.9815,"a",%progbits + .set .LANCHOR135,. + 0 + .type __func__.9815, %object + .size __func__.9815, 18 +__func__.9815: + .ascii "SupperBlkListInit\000" + .section .rodata.__func__.9842,"a",%progbits + .set .LANCHOR158,. + 0 + .type __func__.9842, %object + .size __func__.9842, 14 +__func__.9842: + .ascii "ftl_check_vpc\000" + .section .rodata.__func__.9907,"a",%progbits + .set .LANCHOR143,. + 0 + .type __func__.9907, %object + .size __func__.9907, 25 +__func__.9907: + .ascii "allocate_data_superblock\000" + .section .rodata.__func__.9928,"a",%progbits + .set .LANCHOR167,. + 0 + .type __func__.9928, %object + .size __func__.9928, 29 +__func__.9928: + .ascii "allocate_new_data_superblock\000" + .section .rodata.__func__.9935,"a",%progbits + .set .LANCHOR60,. + 0 + .type __func__.9935, %object + .size __func__.9935, 19 +__func__.9935: + .ascii "get_new_active_ppa\000" + .section .rodata.__func__.9948,"a",%progbits + .set .LANCHOR145,. + 0 + .type __func__.9948, %object + .size __func__.9948, 16 +__func__.9948: + .ascii "update_vpc_list\000" + .section .rodata.__func__.9955,"a",%progbits + .set .LANCHOR146,. + 0 + .type __func__.9955, %object + .size __func__.9955, 20 +__func__.9955: + .ascii "decrement_vpc_count\000" .section .rodata.decrement_vpc_count.str1.1,"aMS",%progbits,1 .LC21: .ascii "decrement_vpc_count %x = %d\012\000" @@ -14690,7 +14548,7 @@ __func__.9927: .LC33: .ascii "scan lpa = %x ppa= %x\012\000" .LC34: - .ascii "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" + .ascii "lpa = %x,addr= %x,spare= %x %x %x %x data=%x %x\012" .ascii "\000" .section .rodata.load_l2p_region.str1.1,"aMS",%progbits,1 .LC24: @@ -14715,5 +14573,5 @@ __func__.9927: .ascii "\012\000" .section .rodata.sftl_init.str1.1,"aMS",%progbits,1 .LC49: - .ascii "SFTL version: 5.0.51 20191028\000" + .ascii "SFTL version: 5.0.55 20200925\000" .hidden free diff --git a/drivers/rkflash/rk_sftl_arm_v8.S b/drivers/rkflash/rk_sftl_arm_v8.S index 8ae51384e4..5846acbd25 100644 --- a/drivers/rkflash/rk_sftl_arm_v8.S +++ b/drivers/rkflash/rk_sftl_arm_v8.S @@ -2,7 +2,7 @@ * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd * * SPDX-License-Identifier: GPL-2.0 - * date: 2019-10-28 + * date: 2020-09-25 */ .arch armv8-a+nosimd .file "rk_sftl.c" @@ -32,22 +32,6 @@ l2p_addr_tran.isra.0: str w4, [x2] ret .size l2p_addr_tran.isra.0, .-l2p_addr_tran.isra.0 - .section .text.ftl_set_blk_mode.part.6,"ax",@progbits - .align 2 - .type ftl_set_blk_mode.part.6, %function -ftl_set_blk_mode.part.6: - and w0, w0, 65535 - adrp x2, .LANCHOR1 - ubfx x1, x0, 5, 11 - ldr x3, [x2, #:lo12:.LANCHOR1] - lsl x1, x1, 2 - mov w2, 1 - lsl w2, w2, w0 - ldr w0, [x3, x1] - orr w0, w0, w2 - str w0, [x3, x1] - ret - .size ftl_set_blk_mode.part.6, .-ftl_set_blk_mode.part.6 .section .text.Ftl_log2,"ax",@progbits .align 2 .global Ftl_log2 @@ -55,16 +39,16 @@ ftl_set_blk_mode.part.6: Ftl_log2: mov w2, 1 mov w1, 0 -.L5: +.L4: cmp w2, w0 - bls .L6 + bls .L5 sub w0, w1, #1 ret -.L6: +.L5: add w1, w1, 1 lsl w2, w2, 1 and w1, w1, 65535 - b .L5 + b .L4 .size Ftl_log2, .-Ftl_log2 .section .text.FtlPrintInfo,"ax",@progbits .align 2 @@ -81,25 +65,25 @@ FtlSysBlkNumInit: and w0, w0, 65535 mov w1, 24 cmp w0, 24 - adrp x2, .LANCHOR4 + adrp x2, .LANCHOR3 csel w0, w0, w1, cs - adrp x1, .LANCHOR2 + adrp x1, .LANCHOR1 and w0, w0, 65535 - str w0, [x1, #:lo12:.LANCHOR2] - adrp x1, .LANCHOR3 - ldrh w1, [x1, #:lo12:.LANCHOR3] + str w0, [x1, #:lo12:.LANCHOR1] + adrp x1, .LANCHOR2 + ldrh w1, [x1, #:lo12:.LANCHOR2] mul w1, w1, w0 - str w1, [x2, #:lo12:.LANCHOR4] - adrp x2, .LANCHOR6 - ldrh w2, [x2, #:lo12:.LANCHOR6] - sub w0, w2, w0 + str w1, [x2, #:lo12:.LANCHOR3] adrp x2, .LANCHOR5 - strh w0, [x2, #:lo12:.LANCHOR5] - adrp x0, .LANCHOR8 - ldr w0, [x0, #:lo12:.LANCHOR8] - sub w1, w0, w1 + ldrh w2, [x2, #:lo12:.LANCHOR5] + sub w0, w2, w0 + adrp x2, .LANCHOR4 + strh w0, [x2, #:lo12:.LANCHOR4] adrp x0, .LANCHOR7 - str w1, [x0, #:lo12:.LANCHOR7] + ldr w0, [x0, #:lo12:.LANCHOR7] + sub w1, w0, w1 + adrp x0, .LANCHOR6 + str w1, [x0, #:lo12:.LANCHOR6] mov w0, 0 ret .size FtlSysBlkNumInit, .-FtlSysBlkNumInit @@ -110,200 +94,200 @@ FtlSysBlkNumInit: FtlConstantsInit: stp x29, x30, [sp, -16]! mov x5, x0 - adrp x2, .LANCHOR11 - adrp x1, .LANCHOR6 + adrp x2, .LANCHOR10 + adrp x1, .LANCHOR5 add x29, sp, 0 ldrh w3, [x0] - adrp x0, .LANCHOR9 + adrp x0, .LANCHOR8 ldrh w4, [x5, 2] - adrp x6, .LANCHOR12 - strh w3, [x0, #:lo12:.LANCHOR9] - adrp x0, .LANCHOR10 + adrp x6, .LANCHOR11 + strh w3, [x0, #:lo12:.LANCHOR8] + adrp x0, .LANCHOR9 ldrh w7, [x5, 14] - strh w4, [x0, #:lo12:.LANCHOR10] + strh w4, [x0, #:lo12:.LANCHOR9] ldrh w8, [x5, 4] cmp w7, 4 ldrh w0, [x5, 6] - strh w8, [x2, #:lo12:.LANCHOR11] - strh w0, [x1, #:lo12:.LANCHOR6] - strh w7, [x6, #:lo12:.LANCHOR12] - bne .L10 + strh w8, [x2, #:lo12:.LANCHOR10] + strh w0, [x1, #:lo12:.LANCHOR5] + strh w7, [x6, #:lo12:.LANCHOR11] + bne .L9 lsr w0, w0, 1 - strh w0, [x1, #:lo12:.LANCHOR6] + strh w0, [x1, #:lo12:.LANCHOR5] mov w0, 8 - strh w0, [x6, #:lo12:.LANCHOR12] -.L11: - adrp x7, .LANCHOR13 - add x7, x7, :lo12:.LANCHOR13 + strh w0, [x6, #:lo12:.LANCHOR11] +.L10: + adrp x7, .LANCHOR12 + add x7, x7, :lo12:.LANCHOR12 mov x0, 0 -.L12: +.L11: strb w0, [x0, x7] add x0, x0, 1 cmp x0, 32 - bne .L12 - adrp x0, .LANCHOR14 + bne .L11 + adrp x0, .LANCHOR13 mov w7, 5 cmp w3, 1 - strh w7, [x0, #:lo12:.LANCHOR14] - adrp x7, .LANCHOR15 - strh wzr, [x7, #:lo12:.LANCHOR15] - bne .L13 - strh w3, [x0, #:lo12:.LANCHOR14] -.L13: - adrp x0, .LANCHOR16 + strh w7, [x0, #:lo12:.LANCHOR13] + adrp x7, .LANCHOR14 + strh wzr, [x7, #:lo12:.LANCHOR14] + bne .L12 + strh w3, [x0, #:lo12:.LANCHOR13] +.L12: + adrp x0, .LANCHOR15 mov w3, 640 - strh w3, [x0, #:lo12:.LANCHOR16] - ldrh w0, [x2, #:lo12:.LANCHOR11] - adrp x2, .LANCHOR3 - ldrh w3, [x1, #:lo12:.LANCHOR6] - adrp x1, .LANCHOR17 + strh w3, [x0, #:lo12:.LANCHOR15] + ldrh w0, [x2, #:lo12:.LANCHOR10] + adrp x2, .LANCHOR2 + ldrh w3, [x1, #:lo12:.LANCHOR5] + adrp x1, .LANCHOR16 mul w4, w4, w0 mul w0, w0, w3 and w4, w4, 65535 - strh w4, [x2, #:lo12:.LANCHOR3] + strh w4, [x2, #:lo12:.LANCHOR2] and w0, w0, 65535 - strh w0, [x1, #:lo12:.LANCHOR17] + strh w0, [x1, #:lo12:.LANCHOR16] bl Ftl_log2 ldrh w7, [x5, 12] - adrp x1, .LANCHOR18 - ldrh w6, [x6, #:lo12:.LANCHOR12] - adrp x8, .LANCHOR19 - strh w0, [x1, #:lo12:.LANCHOR18] - adrp x0, .LANCHOR20 + adrp x1, .LANCHOR17 + ldrh w6, [x6, #:lo12:.LANCHOR11] + adrp x8, .LANCHOR18 + strh w0, [x1, #:lo12:.LANCHOR17] + adrp x0, .LANCHOR19 mul w1, w4, w7 - strh w7, [x8, #:lo12:.LANCHOR19] - strh w7, [x0, #:lo12:.LANCHOR20] - adrp x0, .LANCHOR21 - strh w1, [x0, #:lo12:.LANCHOR21] + strh w7, [x8, #:lo12:.LANCHOR18] + strh w7, [x0, #:lo12:.LANCHOR19] + adrp x0, .LANCHOR20 + strh w1, [x0, #:lo12:.LANCHOR20] mov w0, w6 bl Ftl_log2 and w10, w0, 65535 - adrp x2, .LANCHOR22 + adrp x2, .LANCHOR21 ubfiz w1, w6, 9, 7 - strh w0, [x2, #:lo12:.LANCHOR22] + strh w0, [x2, #:lo12:.LANCHOR21] + adrp x0, .LANCHOR22 + strh w1, [x0, #:lo12:.LANCHOR22] adrp x0, .LANCHOR23 + ubfx w1, w1, 8, 8 strh w1, [x0, #:lo12:.LANCHOR23] adrp x0, .LANCHOR24 - ubfx w1, w1, 8, 8 - strh w1, [x0, #:lo12:.LANCHOR24] - adrp x0, .LANCHOR25 ldrh w1, [x5, 20] - adrp x5, .LANCHOR27 - strh w1, [x0, #:lo12:.LANCHOR25] + adrp x5, .LANCHOR26 + strh w1, [x0, #:lo12:.LANCHOR24] mul w0, w4, w3 - adrp x1, .LANCHOR8 - str w0, [x1, #:lo12:.LANCHOR8] - adrp x1, .LANCHOR26 + adrp x1, .LANCHOR7 + str w0, [x1, #:lo12:.LANCHOR7] + adrp x1, .LANCHOR25 mul w0, w0, w6 mul w6, w6, w7 mul w0, w0, w7 mov x7, x2 asr w0, w0, 11 - str w0, [x1, #:lo12:.LANCHOR26] + str w0, [x1, #:lo12:.LANCHOR25] mov w0, 5120 sdiv w0, w0, w6 and w0, w0, 65535 cmp w0, 4 - bls .L14 -.L20: - strh w0, [x5, #:lo12:.LANCHOR27] - adrp x1, .LANCHOR28 + bls .L13 +.L19: + strh w0, [x5, #:lo12:.LANCHOR26] + adrp x1, .LANCHOR27 mov w0, 640 lsl w3, w3, 6 asr w0, w0, w10 add w0, w0, 2 - strh w0, [x1, #:lo12:.LANCHOR28] + strh w0, [x1, #:lo12:.LANCHOR27] add w0, w10, 9 - adrp x1, .LANCHOR30 + adrp x1, .LANCHOR29 cmp w4, 1 asr w3, w3, w0 - adrp x0, .LANCHOR29 - adrp x6, .LANCHOR2 - strh w3, [x0, #:lo12:.LANCHOR29] + adrp x0, .LANCHOR28 + adrp x6, .LANCHOR1 + strh w3, [x0, #:lo12:.LANCHOR28] and w3, w3, 65535 mul w0, w3, w4 add w3, w3, 8 - str w0, [x1, #:lo12:.LANCHOR30] - ldrh w0, [x5, #:lo12:.LANCHOR27] + str w0, [x1, #:lo12:.LANCHOR29] + ldrh w0, [x5, #:lo12:.LANCHOR26] udiv w0, w0, w4 mov x4, x1 add w3, w0, w3 - beq .L16 -.L21: - str w3, [x6, #:lo12:.LANCHOR2] - ldrh w0, [x6, #:lo12:.LANCHOR2] + beq .L15 +.L20: + str w3, [x6, #:lo12:.LANCHOR1] + ldrh w0, [x6, #:lo12:.LANCHOR1] bl FtlSysBlkNumInit - ldr w1, [x6, #:lo12:.LANCHOR2] - adrp x0, .LANCHOR31 + ldr w1, [x6, #:lo12:.LANCHOR1] + adrp x0, .LANCHOR30 ldp x29, x30, [sp], 16 - str w1, [x0, #:lo12:.LANCHOR31] - adrp x0, .LANCHOR7 - ldrh w1, [x8, #:lo12:.LANCHOR19] - ldr w0, [x0, #:lo12:.LANCHOR7] + str w1, [x0, #:lo12:.LANCHOR30] + adrp x0, .LANCHOR6 + ldrh w1, [x8, #:lo12:.LANCHOR18] + ldr w0, [x0, #:lo12:.LANCHOR6] lsl w0, w0, 2 mul w0, w0, w1 - ldrh w1, [x7, #:lo12:.LANCHOR22] + ldrh w1, [x7, #:lo12:.LANCHOR21] add w1, w1, 9 lsr w0, w0, w1 - adrp x1, .LANCHOR32 + adrp x1, .LANCHOR31 add w0, w0, 2 - strh w0, [x1, #:lo12:.LANCHOR32] - adrp x0, .LANCHOR33 + strh w0, [x1, #:lo12:.LANCHOR31] + adrp x0, .LANCHOR32 mov w1, 32 - strh w1, [x0, #:lo12:.LANCHOR33] - adrp x0, .LANCHOR34 - str wzr, [x0, #:lo12:.LANCHOR34] - ldrh w0, [x5, #:lo12:.LANCHOR27] + strh w1, [x0, #:lo12:.LANCHOR32] + adrp x0, .LANCHOR33 + str wzr, [x0, #:lo12:.LANCHOR33] + ldrh w0, [x5, #:lo12:.LANCHOR26] add w0, w0, 3 - strh w0, [x5, #:lo12:.LANCHOR27] - ldr w0, [x4, #:lo12:.LANCHOR30] + strh w0, [x5, #:lo12:.LANCHOR26] + ldr w0, [x4, #:lo12:.LANCHOR29] add w0, w0, 3 - str w0, [x4, #:lo12:.LANCHOR30] + str w0, [x4, #:lo12:.LANCHOR29] mov w0, 0 ret -.L10: +.L9: cmp w7, 8 - bne .L11 + bne .L10 cmp w8, 1 - bne .L11 + bne .L10 lsr w0, w0, 1 - strh w0, [x1, #:lo12:.LANCHOR6] + strh w0, [x1, #:lo12:.LANCHOR5] mov w0, 2 - strh w0, [x2, #:lo12:.LANCHOR11] - b .L11 -.L14: + strh w0, [x2, #:lo12:.LANCHOR10] + b .L10 +.L13: mov w0, 4 - b .L20 -.L16: + b .L19 +.L15: add w3, w3, 4 - b .L21 + b .L20 .size FtlConstantsInit, .-FtlConstantsInit .section .text.IsBlkInVendorPart,"ax",@progbits .align 2 .global IsBlkInVendorPart .type IsBlkInVendorPart, %function IsBlkInVendorPart: - adrp x1, .LANCHOR35 + adrp x1, .LANCHOR34 and w0, w0, 65535 - ldrh w1, [x1, #:lo12:.LANCHOR35] - cbz w1, .L26 - adrp x1, .LANCHOR27 - ldrh w2, [x1, #:lo12:.LANCHOR27] - adrp x1, .LANCHOR36 - ldr x3, [x1, #:lo12:.LANCHOR36] + ldrh w1, [x1, #:lo12:.LANCHOR34] + cbz w1, .L25 + adrp x1, .LANCHOR26 + ldrh w2, [x1, #:lo12:.LANCHOR26] + adrp x1, .LANCHOR35 + ldr x3, [x1, #:lo12:.LANCHOR35] mov x1, 0 -.L24: +.L23: cmp w2, w1, uxth - bhi .L25 -.L26: + bhi .L24 +.L25: mov w0, 0 ret -.L25: +.L24: add x1, x1, 1 add x4, x3, x1, lsl 1 ldrh w4, [x4, -2] cmp w4, w0 - bne .L24 + bne .L23 mov w0, 1 ret .size IsBlkInVendorPart, .-IsBlkInVendorPart @@ -320,8 +304,8 @@ FtlCacheWriteBack: .global sftl_get_density .type sftl_get_density, %function sftl_get_density: - adrp x0, .LANCHOR34 - ldr w0, [x0, #:lo12:.LANCHOR34] + adrp x0, .LANCHOR33 + ldr w0, [x0, #:lo12:.LANCHOR33] ret .size sftl_get_density, .-sftl_get_density .section .text.FtlBbmMapBadBlock,"ax",@progbits @@ -331,13 +315,13 @@ sftl_get_density: FtlBbmMapBadBlock: stp x29, x30, [sp, -32]! and w1, w0, 65535 - adrp x0, .LANCHOR17 + adrp x0, .LANCHOR16 mov w4, 1 add x29, sp, 0 - ldrh w0, [x0, #:lo12:.LANCHOR17] + ldrh w0, [x0, #:lo12:.LANCHOR16] str x19, [sp, 16] - adrp x19, .LANCHOR37 - add x19, x19, :lo12:.LANCHOR37 + adrp x19, .LANCHOR36 + add x19, x19, :lo12:.LANCHOR36 udiv w3, w1, w0 and w2, w3, 65535 msub w3, w3, w0, w1 @@ -366,13 +350,13 @@ FtlBbmMapBadBlock: .global FtlBbmIsBadBlock .type FtlBbmIsBadBlock, %function FtlBbmIsBadBlock: - adrp x1, .LANCHOR17 + adrp x1, .LANCHOR16 and w0, w0, 65535 - ldrh w1, [x1, #:lo12:.LANCHOR17] + ldrh w1, [x1, #:lo12:.LANCHOR16] udiv w2, w0, w1 msub w0, w2, w1, w0 - adrp x1, .LANCHOR37 - add x1, x1, :lo12:.LANCHOR37 + adrp x1, .LANCHOR36 + add x1, x1, :lo12:.LANCHOR36 add x2, x1, x2, uxth 3 and w0, w0, 65535 ubfx x3, x0, 5, 11 @@ -394,12 +378,12 @@ FtlBbtInfoPrint: .global V2P_block .type V2P_block, %function V2P_block: - adrp x2, .LANCHOR11 + adrp x2, .LANCHOR10 and w0, w0, 65535 - adrp x4, .LANCHOR17 + adrp x4, .LANCHOR16 and w1, w1, 65535 - ldrh w2, [x2, #:lo12:.LANCHOR11] - ldrh w4, [x4, #:lo12:.LANCHOR17] + ldrh w2, [x2, #:lo12:.LANCHOR10] + ldrh w4, [x4, #:lo12:.LANCHOR16] udiv w3, w0, w2 msub w0, w3, w2, w0 madd w2, w2, w1, w0 @@ -412,10 +396,10 @@ V2P_block: .type P2V_plane, %function P2V_plane: and w3, w0, 65535 - adrp x0, .LANCHOR11 - ldrh w1, [x0, #:lo12:.LANCHOR11] - adrp x0, .LANCHOR17 - ldrh w2, [x0, #:lo12:.LANCHOR17] + adrp x0, .LANCHOR10 + ldrh w1, [x0, #:lo12:.LANCHOR10] + adrp x0, .LANCHOR16 + ldrh w2, [x0, #:lo12:.LANCHOR16] udiv w0, w3, w1 udiv w2, w3, w2 msub w0, w0, w1, w3 @@ -428,12 +412,12 @@ P2V_plane: .type P2V_block_in_plane, %function P2V_block_in_plane: and w2, w0, 65535 - adrp x0, .LANCHOR17 - ldrh w1, [x0, #:lo12:.LANCHOR17] + adrp x0, .LANCHOR16 + ldrh w1, [x0, #:lo12:.LANCHOR16] udiv w0, w2, w1 msub w0, w0, w1, w2 - adrp x1, .LANCHOR11 - ldrh w1, [x1, #:lo12:.LANCHOR11] + adrp x1, .LANCHOR10 + ldrh w1, [x1, #:lo12:.LANCHOR10] and w0, w0, 65535 udiv w0, w0, w1 ret @@ -445,12 +429,12 @@ P2V_block_in_plane: ftl_cmp_data_ver: cmp w0, w1 mov w2, -2147483648 - bls .L38 + bls .L37 sub w1, w0, w1 cmp w1, w2 cset w0, ls ret -.L38: +.L37: sub w1, w1, w0 cmp w1, w2 cset w0, hi @@ -461,8 +445,8 @@ ftl_cmp_data_ver: .global FtlFreeSysBlkQueueEmpty .type FtlFreeSysBlkQueueEmpty, %function FtlFreeSysBlkQueueEmpty: - adrp x0, .LANCHOR38+6 - ldrh w0, [x0, #:lo12:.LANCHOR38+6] + adrp x0, .LANCHOR37+6 + ldrh w0, [x0, #:lo12:.LANCHOR37+6] cmp w0, 0 cset w0, eq ret @@ -472,8 +456,8 @@ FtlFreeSysBlkQueueEmpty: .global FtlFreeSysBlkQueueFull .type FtlFreeSysBlkQueueFull, %function FtlFreeSysBlkQueueFull: - adrp x0, .LANCHOR38+6 - ldrh w0, [x0, #:lo12:.LANCHOR38+6] + adrp x0, .LANCHOR37+6 + ldrh w0, [x0, #:lo12:.LANCHOR37+6] cmp w0, 1024 cset w0, eq ret @@ -483,27 +467,27 @@ FtlFreeSysBlkQueueFull: .global FtlFreeSysBLkSort .type FtlFreeSysBLkSort, %function FtlFreeSysBLkSort: - adrp x0, .LANCHOR38 - add x1, x0, :lo12:.LANCHOR38 + adrp x0, .LANCHOR37 + add x1, x0, :lo12:.LANCHOR37 ldrh w2, [x1, 6] - cbz w2, .L42 - adrp x2, .LANCHOR39+28 + cbz w2, .L41 + adrp x2, .LANCHOR38+28 ldrh w3, [x1, 2] mov w6, 0 mov w4, 0 - ldrh w5, [x2, #:lo12:.LANCHOR39+28] + ldrh w5, [x2, #:lo12:.LANCHOR38+28] ldrh w2, [x1, 4] and w5, w5, 31 -.L44: +.L43: cmp w5, w4 - bgt .L45 - cbz w6, .L42 - add x0, x0, :lo12:.LANCHOR38 + bgt .L44 + cbz w6, .L41 + add x0, x0, :lo12:.LANCHOR37 strh w3, [x0, 2] strh w2, [x0, 4] -.L42: +.L41: ret -.L45: +.L44: add x6, x1, x3, sxtw 1 add w4, w4, 1 add w3, w3, 1 @@ -515,37 +499,37 @@ FtlFreeSysBLkSort: mov w6, 1 add w2, w2, w6 and w2, w2, 1023 - b .L44 + b .L43 .size FtlFreeSysBLkSort, .-FtlFreeSysBLkSort .section .text.IsInFreeQueue,"ax",@progbits .align 2 .global IsInFreeQueue .type IsInFreeQueue, %function IsInFreeQueue: - adrp x1, .LANCHOR38 - add x1, x1, :lo12:.LANCHOR38 + adrp x1, .LANCHOR37 + add x1, x1, :lo12:.LANCHOR37 and w0, w0, 65535 ldrh w4, [x1, 6] cmp w4, 1024 - beq .L55 + beq .L54 ldrh w5, [x1, 2] mov w3, 0 -.L53: +.L52: cmp w3, w4 - bcc .L54 -.L55: + bcc .L53 +.L54: mov w0, 0 ret -.L54: +.L53: add w2, w3, w5 ubfiz x2, x2, 1, 10 add x2, x1, x2 ldrh w2, [x2, 8] cmp w2, w0 - beq .L56 + beq .L55 add w3, w3, 1 - b .L53 -.L56: + b .L52 +.L55: mov w0, 1 ret .size IsInFreeQueue, .-IsInFreeQueue @@ -554,33 +538,33 @@ IsInFreeQueue: .global insert_data_list .type insert_data_list, %function insert_data_list: - adrp x1, .LANCHOR5 + adrp x1, .LANCHOR4 and w0, w0, 65535 - ldrh w12, [x1, #:lo12:.LANCHOR5] + ldrh w12, [x1, #:lo12:.LANCHOR4] cmp w12, w0 - bls .L59 - adrp x1, .LANCHOR40 + bls .L58 + adrp x1, .LANCHOR39 mov w8, 6 - ldr x4, [x1, #:lo12:.LANCHOR40] + ldr x4, [x1, #:lo12:.LANCHOR39] umull x10, w0, w8 mov w1, -1 add x3, x4, x10 strh w1, [x3, 2] strh w1, [x4, x10] - adrp x1, .LANCHOR41 + adrp x1, .LANCHOR40 mov x15, x1 - ldr x7, [x1, #:lo12:.LANCHOR41] - cbnz x7, .L60 - str x3, [x1, #:lo12:.LANCHOR41] -.L59: + ldr x7, [x1, #:lo12:.LANCHOR40] + cbnz x7, .L59 + str x3, [x1, #:lo12:.LANCHOR40] +.L58: mov w0, 0 ret -.L60: - adrp x1, .LANCHOR42 +.L59: + adrp x1, .LANCHOR41 mov x2, -6148914691236517206 movk x2, 0xaaab, lsl 0 mov w6, 0 - ldr x13, [x1, #:lo12:.LANCHOR42] + ldr x13, [x1, #:lo12:.LANCHOR41] ubfiz x1, x0, 1, 16 mov w16, 65535 ldrh w5, [x13, x1] @@ -593,48 +577,48 @@ insert_data_list: mul x1, x1, x2 mov x2, x7 and w1, w1, 65535 -.L65: +.L64: add w6, w6, 1 and w6, w6, 65535 cmp w12, w6 - bcc .L59 + bcc .L58 cmp w1, w0 - beq .L59 + beq .L58 ldrh w14, [x2, 4] - cbz w14, .L63 + cbz w14, .L62 ubfiz x11, x1, 1, 16 ldrh w11, [x13, x11] mul w11, w11, w14 cmp w5, w11 - bls .L63 + bls .L62 ldrh w11, [x2] cmp w11, w16 - bne .L64 + bne .L63 strh w1, [x3, 2] strh w0, [x2] - adrp x0, .LANCHOR43 - str x3, [x0, #:lo12:.LANCHOR43] - b .L59 -.L64: + adrp x0, .LANCHOR42 + str x3, [x0, #:lo12:.LANCHOR42] + b .L58 +.L63: umaddl x2, w11, w8, x4 mov w1, w11 - b .L65 -.L63: + b .L64 +.L62: strh w1, [x4, x10] cmp x2, x7 ldrh w1, [x2, 2] strh w1, [x3, 2] - bne .L66 + bne .L65 strh w0, [x2, 2] - str x3, [x15, #:lo12:.LANCHOR41] - b .L59 -.L66: + str x3, [x15, #:lo12:.LANCHOR40] + b .L58 +.L65: ldrh w1, [x2, 2] mov w3, 6 umull x1, w1, w3 strh w0, [x4, x1] strh w0, [x2, 2] - b .L59 + b .L58 .size insert_data_list, .-insert_data_list .section .text.INSERT_DATA_LIST,"ax",@progbits .align 2 @@ -644,23 +628,23 @@ INSERT_DATA_LIST: stp x29, x30, [sp, -16]! add x29, sp, 0 bl insert_data_list - adrp x1, .LANCHOR44 - ldrh w0, [x1, #:lo12:.LANCHOR44] + adrp x1, .LANCHOR43 + ldrh w0, [x1, #:lo12:.LANCHOR43] add w0, w0, 1 and w0, w0, 65535 - strh w0, [x1, #:lo12:.LANCHOR44] - adrp x1, .LANCHOR5 - ldrh w1, [x1, #:lo12:.LANCHOR5] + strh w0, [x1, #:lo12:.LANCHOR43] + adrp x1, .LANCHOR4 + ldrh w1, [x1, #:lo12:.LANCHOR4] cmp w1, w0 - bcs .L71 + bcs .L70 ldp x29, x30, [sp], 16 mov w2, 214 - adrp x1, .LANCHOR45 + adrp x1, .LANCHOR44 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR45 + add x1, x1, :lo12:.LANCHOR44 add x0, x0, :lo12:.LC1 b printf -.L71: +.L70: ldp x29, x30, [sp], 16 ret .size INSERT_DATA_LIST, .-INSERT_DATA_LIST @@ -672,28 +656,28 @@ insert_free_list: and w0, w0, 65535 mov w7, 65535 cmp w0, w7 - beq .L75 - adrp x1, .LANCHOR40 + beq .L74 + adrp x1, .LANCHOR39 mov w6, 6 - ldr x3, [x1, #:lo12:.LANCHOR40] + ldr x3, [x1, #:lo12:.LANCHOR39] umull x8, w0, w6 mov w1, -1 add x4, x3, x8 strh w1, [x4, 2] strh w1, [x3, x8] - adrp x1, .LANCHOR46 + adrp x1, .LANCHOR45 mov x12, x1 - ldr x5, [x1, #:lo12:.LANCHOR46] - cbnz x5, .L76 - str x4, [x1, #:lo12:.LANCHOR46] -.L75: + ldr x5, [x1, #:lo12:.LANCHOR45] + cbnz x5, .L75 + str x4, [x1, #:lo12:.LANCHOR45] +.L74: mov w0, 0 ret -.L76: - adrp x1, .LANCHOR47 +.L75: + adrp x1, .LANCHOR46 mov x2, -6148914691236517206 movk x2, 0xaaab, lsl 0 - ldr x11, [x1, #:lo12:.LANCHOR47] + ldr x11, [x1, #:lo12:.LANCHOR46] ubfiz x1, x0, 1, 16 ldrh w13, [x11, x1] sub x1, x5, x3 @@ -701,37 +685,37 @@ insert_free_list: mul x1, x1, x2 mov x2, x5 and w1, w1, 65535 -.L79: +.L78: ubfiz x10, x1, 1, 16 ldrh w10, [x11, x10] cmp w10, w13 - bcs .L77 + bcs .L76 ldrh w10, [x2] cmp w10, w7 - bne .L78 + bne .L77 strh w1, [x4, 2] strh w0, [x2] - b .L75 -.L78: + b .L74 +.L77: umaddl x2, w10, w6, x3 mov w1, w10 - b .L79 -.L77: + b .L78 +.L76: ldrh w6, [x2, 2] cmp x2, x5 strh w6, [x4, 2] strh w1, [x3, x8] - bne .L80 + bne .L79 strh w0, [x2, 2] - str x4, [x12, #:lo12:.LANCHOR46] - b .L75 -.L80: + str x4, [x12, #:lo12:.LANCHOR45] + b .L74 +.L79: ldrh w1, [x2, 2] mov w4, 6 umull x1, w1, w4 strh w0, [x3, x1] strh w0, [x2, 2] - b .L75 + b .L74 .size insert_free_list, .-insert_free_list .section .text.INSERT_FREE_LIST,"ax",@progbits .align 2 @@ -741,23 +725,23 @@ INSERT_FREE_LIST: stp x29, x30, [sp, -16]! add x29, sp, 0 bl insert_free_list - adrp x1, .LANCHOR48 - ldrh w0, [x1, #:lo12:.LANCHOR48] + adrp x1, .LANCHOR47 + ldrh w0, [x1, #:lo12:.LANCHOR47] add w0, w0, 1 and w0, w0, 65535 - strh w0, [x1, #:lo12:.LANCHOR48] - adrp x1, .LANCHOR5 - ldrh w1, [x1, #:lo12:.LANCHOR5] + strh w0, [x1, #:lo12:.LANCHOR47] + adrp x1, .LANCHOR4 + ldrh w1, [x1, #:lo12:.LANCHOR4] cmp w1, w0 - bcs .L81 + bcs .L80 ldp x29, x30, [sp], 16 mov w2, 207 - adrp x1, .LANCHOR49 + adrp x1, .LANCHOR48 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR49 + add x1, x1, :lo12:.LANCHOR48 add x0, x0, :lo12:.LC1 b printf -.L81: +.L80: ldp x29, x30, [sp], 16 ret .size INSERT_FREE_LIST, .-INSERT_FREE_LIST @@ -770,37 +754,37 @@ List_remove_node: and w1, w1, 65535 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR40 + adrp x20, .LANCHOR39 stp x21, x22, [sp, 32] mov x22, x0 mov w0, 6 str x23, [sp, 48] - ldr x23, [x20, #:lo12:.LANCHOR40] + ldr x23, [x20, #:lo12:.LANCHOR39] umull x21, w1, w0 mov w0, 65535 add x19, x23, x21 ldrh w1, [x19, 2] cmp w1, w0 - bne .L85 + bne .L84 ldr x0, [x22] cmp x19, x0 - beq .L85 - adrp x1, .LANCHOR50 + beq .L84 + adrp x1, .LANCHOR49 adrp x0, .LC1 mov w2, 372 - add x1, x1, :lo12:.LANCHOR50 + add x1, x1, :lo12:.LANCHOR49 add x0, x0, :lo12:.LC1 bl printf -.L85: +.L84: ldr x0, [x22] mov w1, 65535 cmp x19, x0 ldrh w0, [x23, x21] - bne .L86 + bne .L85 cmp w0, w1 - bne .L87 + bne .L86 str xzr, [x22] -.L88: +.L87: mov w0, -1 strh w0, [x23, x21] strh w0, [x19, 2] @@ -810,35 +794,35 @@ List_remove_node: ldr x23, [sp, 48] ldp x29, x30, [sp], 64 ret -.L87: - ldr x1, [x20, #:lo12:.LANCHOR40] +.L86: + ldr x1, [x20, #:lo12:.LANCHOR39] mov w2, 6 umaddl x0, w0, w2, x1 mov w1, -1 str x0, [x22] strh w1, [x0, 2] - b .L88 -.L86: + b .L87 +.L85: cmp w0, w1 ldrh w1, [x19, 2] - bne .L89 + bne .L88 cmp w1, w0 - beq .L88 + beq .L87 mov w0, 6 mov w2, -1 umull x1, w1, w0 - ldr x0, [x20, #:lo12:.LANCHOR40] + ldr x0, [x20, #:lo12:.LANCHOR39] strh w2, [x0, x1] - b .L88 -.L89: - ldr x2, [x20, #:lo12:.LANCHOR40] + b .L87 +.L88: + ldr x2, [x20, #:lo12:.LANCHOR39] mov w3, 6 umaddl x4, w0, w3, x2 strh w1, [x4, 2] ldrh w1, [x19, 2] umull x1, w1, w3 strh w0, [x2, x1] - b .L88 + b .L87 .size List_remove_node, .-List_remove_node .section .text.List_pop_index_node,"ax",@progbits .align 2 @@ -846,18 +830,18 @@ List_remove_node: .type List_pop_index_node, %function List_pop_index_node: ldr x2, [x0] - cbz x2, .L97 + cbz x2, .L96 stp x29, x30, [sp, -32]! - adrp x3, .LANCHOR40 + adrp x3, .LANCHOR39 and w1, w1, 65535 mov w4, 65535 add x29, sp, 0 str x19, [sp, 16] mov w5, 6 - ldr x19, [x3, #:lo12:.LANCHOR40] -.L93: - cbnz w1, .L94 -.L96: + ldr x19, [x3, #:lo12:.LANCHOR39] +.L92: + cbnz w1, .L93 +.L95: sub x19, x2, x19 mov x2, -6148914691236517206 asr x19, x19, 1 @@ -870,15 +854,15 @@ List_pop_index_node: ldr x19, [sp, 16] ldp x29, x30, [sp], 32 ret -.L94: +.L93: ldrh w3, [x2] cmp w3, w4 - beq .L96 + beq .L95 sub w1, w1, #1 umaddl x2, w3, w5, x19 and w1, w1, 65535 - b .L93 -.L97: + b .L92 +.L96: mov w0, 65535 ret .size List_pop_index_node, .-List_pop_index_node @@ -896,28 +880,28 @@ List_pop_head_node: .type List_get_gc_head_node, %function List_get_gc_head_node: and w2, w0, 65535 - adrp x0, .LANCHOR41 - ldr x1, [x0, #:lo12:.LANCHOR41] - cbz x1, .L108 adrp x0, .LANCHOR40 + ldr x1, [x0, #:lo12:.LANCHOR40] + cbz x1, .L107 + adrp x0, .LANCHOR39 mov w4, 6 - ldr x3, [x0, #:lo12:.LANCHOR40] + ldr x3, [x0, #:lo12:.LANCHOR39] mov w0, 65535 -.L105: - cbz w2, .L106 +.L104: + cbz w2, .L105 ldrh w1, [x1] cmp w1, w0 - bne .L107 + bne .L106 ret -.L107: +.L106: sub w2, w2, #1 umaddl x1, w1, w4, x3 and w2, w2, 65535 - b .L105 -.L108: + b .L104 +.L107: mov w0, 65535 ret -.L106: +.L105: sub x0, x1, x3 mov x1, -6148914691236517206 asr x0, x0, 1 @@ -935,35 +919,35 @@ List_update_data_list: add x29, sp, 0 stp x19, x20, [sp, 16] and w19, w0, 65535 - adrp x0, .LANCHOR51 + adrp x0, .LANCHOR50 stp x21, x22, [sp, 32] stp x23, x24, [sp, 48] - ldrh w0, [x0, #:lo12:.LANCHOR51] + ldrh w0, [x0, #:lo12:.LANCHOR50] stp x25, x26, [sp, 64] cmp w0, w19 - beq .L111 + beq .L110 + adrp x0, .LANCHOR51 + ldrh w0, [x0, #:lo12:.LANCHOR51] + cmp w0, w19 + beq .L110 adrp x0, .LANCHOR52 ldrh w0, [x0, #:lo12:.LANCHOR52] cmp w0, w19 - beq .L111 - adrp x0, .LANCHOR53 - ldrh w0, [x0, #:lo12:.LANCHOR53] - cmp w0, w19 - beq .L111 - adrp x0, .LANCHOR40 + beq .L110 + adrp x0, .LANCHOR39 mov w21, 6 - adrp x24, .LANCHOR41 + adrp x24, .LANCHOR40 mov x26, x0 umull x21, w19, w21 - ldr x23, [x0, #:lo12:.LANCHOR40] - ldr x1, [x24, #:lo12:.LANCHOR41] + ldr x23, [x0, #:lo12:.LANCHOR39] + ldr x1, [x24, #:lo12:.LANCHOR40] add x22, x23, x21 cmp x22, x1 - beq .L111 - adrp x1, .LANCHOR42 + beq .L110 + adrp x1, .LANCHOR41 ubfiz x0, x19, 1, 16 mov x25, x1 - ldr x2, [x1, #:lo12:.LANCHOR42] + ldr x2, [x1, #:lo12:.LANCHOR41] mov w1, 65535 ldrh w20, [x2, x0] ldrh w0, [x22, 4] @@ -972,60 +956,60 @@ List_update_data_list: ldrh w0, [x22, 2] csinv w20, w20, wzr, ne cmp w0, w1 - bne .L114 + bne .L113 ldrh w1, [x23, x21] cmp w1, w0 - bne .L114 - adrp x1, .LANCHOR54 + bne .L113 + adrp x1, .LANCHOR53 adrp x0, .LC1 mov w2, 463 - add x1, x1, :lo12:.LANCHOR54 + add x1, x1, :lo12:.LANCHOR53 add x0, x0, :lo12:.LC1 bl printf -.L114: +.L113: ldrh w0, [x22, 2] mov w1, 65535 cmp w0, w1 - bne .L115 + bne .L114 ldrh w1, [x23, x21] cmp w1, w0 - beq .L111 -.L115: + beq .L110 +.L114: mov w1, 6 mov x2, -6148914691236517206 movk x2, 0xaaab, lsl 0 umull x0, w0, w1 asr x1, x0, 1 mul x1, x1, x2 - ldr x2, [x25, #:lo12:.LANCHOR42] + ldr x2, [x25, #:lo12:.LANCHOR41] ldrh w1, [x2, x1, lsl 1] - ldr x2, [x26, #:lo12:.LANCHOR40] + ldr x2, [x26, #:lo12:.LANCHOR39] add x0, x2, x0 ldrh w2, [x0, 4] cmp w2, 0 mul w0, w1, w2 csinv w0, w0, wzr, ne cmp w20, w0 - bcs .L111 - adrp x20, .LANCHOR44 + bcs .L110 + adrp x20, .LANCHOR43 mov w1, w19 - add x0, x24, :lo12:.LANCHOR41 + add x0, x24, :lo12:.LANCHOR40 bl List_remove_node - ldrh w0, [x20, #:lo12:.LANCHOR44] - cbnz w0, .L117 - adrp x1, .LANCHOR54 + ldrh w0, [x20, #:lo12:.LANCHOR43] + cbnz w0, .L116 + adrp x1, .LANCHOR53 adrp x0, .LC1 mov w2, 474 - add x1, x1, :lo12:.LANCHOR54 + add x1, x1, :lo12:.LANCHOR53 add x0, x0, :lo12:.LC1 bl printf -.L117: - ldrh w0, [x20, #:lo12:.LANCHOR44] +.L116: + ldrh w0, [x20, #:lo12:.LANCHOR43] sub w0, w0, #1 - strh w0, [x20, #:lo12:.LANCHOR44] + strh w0, [x20, #:lo12:.LANCHOR43] mov w0, w19 bl INSERT_DATA_LIST -.L111: +.L110: mov w0, 0 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] @@ -1040,158 +1024,124 @@ List_update_data_list: .type select_l2p_ram_region, %function select_l2p_ram_region: stp x29, x30, [sp, -32]! - adrp x0, .LANCHOR33 + adrp x0, .LANCHOR32 mov x1, 0 mov w3, 65535 add x29, sp, 0 - ldrh w2, [x0, #:lo12:.LANCHOR33] - adrp x0, .LANCHOR55 + ldrh w2, [x0, #:lo12:.LANCHOR32] + adrp x0, .LANCHOR54 str x19, [sp, 16] - ldr x0, [x0, #:lo12:.LANCHOR55] -.L122: + ldr x0, [x0, #:lo12:.LANCHOR54] +.L121: and w19, w1, 65535 cmp w19, w2 - bcc .L124 + bcc .L123 add x3, x0, 4 mov w19, w2 mov w5, -2147483648 mov w1, 0 -.L125: +.L124: cmp w1, w2 - bne .L127 + bne .L126 cmp w19, w2 - bcc .L123 - adrp x1, .LANCHOR56 + bcc .L122 + adrp x1, .LANCHOR55 mov w19, w2 mov w3, -1 - ldrh w4, [x1, #:lo12:.LANCHOR56] + ldrh w4, [x1, #:lo12:.LANCHOR55] mov w1, 0 -.L128: +.L127: cmp w1, w2 - bne .L130 + bne .L129 cmp w19, w1 - bcc .L123 + bcc .L122 mov w2, 789 - adrp x1, .LANCHOR57 + adrp x1, .LANCHOR56 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR57 + add x1, x1, :lo12:.LANCHOR56 add x0, x0, :lo12:.LC1 bl printf - b .L123 -.L124: + b .L122 +.L123: add x1, x1, 1 add x4, x0, x1, lsl 4 ldrh w4, [x4, -16] cmp w4, w3 - bne .L122 -.L123: + bne .L121 +.L122: mov w0, w19 ldr x19, [sp, 16] ldp x29, x30, [sp], 32 ret -.L127: +.L126: ldr w4, [x3] - tbnz w4, #31, .L126 + tbnz w4, #31, .L125 cmp w5, w4 - bls .L126 + bls .L125 mov w5, w4 mov w19, w1 -.L126: +.L125: add w1, w1, 1 add x3, x3, 16 and w1, w1, 65535 - b .L125 -.L130: + b .L124 +.L129: ldr w6, [x0, 4] cmp w3, w6 - bls .L129 + bls .L128 ldrh w5, [x0] cmp w5, w4 csel w3, w3, w6, eq csel w19, w19, w1, eq -.L129: +.L128: add w1, w1, 1 add x0, x0, 16 and w1, w1, 65535 - b .L128 + b .L127 .size select_l2p_ram_region, .-select_l2p_ram_region .section .text.FtlUpdateVaildLpn,"ax",@progbits .align 2 .global FtlUpdateVaildLpn .type FtlUpdateVaildLpn, %function FtlUpdateVaildLpn: - adrp x2, .LANCHOR58 + adrp x2, .LANCHOR57 mov x3, x2 - ldrh w1, [x2, #:lo12:.LANCHOR58] + ldrh w1, [x2, #:lo12:.LANCHOR57] cmp w1, 4 - bhi .L133 - cbnz w0, .L133 + bhi .L132 + cbnz w0, .L132 add w1, w1, 1 - strh w1, [x2, #:lo12:.LANCHOR58] + strh w1, [x2, #:lo12:.LANCHOR57] ret -.L133: - adrp x1, .LANCHOR5 - adrp x0, .LANCHOR59 - strh wzr, [x3, #:lo12:.LANCHOR58] +.L132: + adrp x1, .LANCHOR4 + adrp x0, .LANCHOR58 + strh wzr, [x3, #:lo12:.LANCHOR57] mov w2, 0 - ldrh w5, [x1, #:lo12:.LANCHOR5] - adrp x1, .LANCHOR42 - str wzr, [x0, #:lo12:.LANCHOR59] + ldrh w5, [x1, #:lo12:.LANCHOR4] + adrp x1, .LANCHOR41 + str wzr, [x0, #:lo12:.LANCHOR58] mov w3, 0 - ldr x6, [x1, #:lo12:.LANCHOR42] + ldr x6, [x1, #:lo12:.LANCHOR41] mov w7, 65535 mov x1, 0 -.L134: +.L133: cmp w5, w1, uxth - bhi .L136 - cbz w3, .L132 - str w2, [x0, #:lo12:.LANCHOR59] -.L132: + bhi .L135 + cbz w3, .L131 + str w2, [x0, #:lo12:.LANCHOR58] +.L131: ret -.L136: +.L135: ldrh w4, [x6, x1, lsl 1] cmp w4, w7 - beq .L135 + beq .L134 add w2, w2, w4 mov w3, 1 -.L135: +.L134: add x1, x1, 1 - b .L134 + b .L133 .size FtlUpdateVaildLpn, .-FtlUpdateVaildLpn - .section .text.ftl_set_blk_mode,"ax",@progbits - .align 2 - .global ftl_set_blk_mode - .type ftl_set_blk_mode, %function -ftl_set_blk_mode: - and w0, w0, 65535 - cbz w1, .L143 - b ftl_set_blk_mode.part.6 -.L143: - adrp x1, .LANCHOR1 - ubfx x2, x0, 5, 11 - lsl x2, x2, 2 - ldr x3, [x1, #:lo12:.LANCHOR1] - mov w1, 1 - lsl w0, w1, w0 - ldr w1, [x3, x2] - bic w0, w1, w0 - str w0, [x3, x2] - ret - .size ftl_set_blk_mode, .-ftl_set_blk_mode - .section .text.ftl_get_blk_mode,"ax",@progbits - .align 2 - .global ftl_get_blk_mode - .type ftl_get_blk_mode, %function -ftl_get_blk_mode: - and w1, w0, 65535 - adrp x0, .LANCHOR1 - ldr x0, [x0, #:lo12:.LANCHOR1] - ubfx x2, x1, 5, 11 - ldr w0, [x0, x2, lsl 2] - lsr w0, w0, w1 - and w0, w0, 1 - ret - .size ftl_get_blk_mode, .-ftl_get_blk_mode .section .text.ftl_sb_update_avl_pages,"ax",@progbits .align 2 .global ftl_sb_update_avl_pages @@ -1200,51 +1150,51 @@ ftl_sb_update_avl_pages: and w2, w2, 65535 and w6, w1, 65535 ubfiz x4, x2, 1, 16 - adrp x1, .LANCHOR3 + adrp x1, .LANCHOR2 add x4, x4, 16 strh wzr, [x0, 4] add x4, x0, x4 - ldrh w3, [x1, #:lo12:.LANCHOR3] + ldrh w3, [x1, #:lo12:.LANCHOR2] mov w1, 65535 -.L146: +.L142: cmp w2, w3 - bcc .L148 - adrp x1, .LANCHOR19 + bcc .L144 + adrp x1, .LANCHOR18 ubfiz x3, x3, 1, 16 add x3, x3, 16 add x2, x0, 16 - ldrh w1, [x1, #:lo12:.LANCHOR19] + ldrh w1, [x1, #:lo12:.LANCHOR18] add x3, x0, x3 mov w5, 65535 sub w1, w1, #1 and w1, w1, 65535 sub w1, w1, w6 -.L149: +.L145: cmp x2, x3 - bne .L151 + bne .L147 ret -.L148: +.L144: ldrh w5, [x4] cmp w5, w1 - beq .L147 + beq .L143 ldrh w5, [x0, 4] add w5, w5, 1 strh w5, [x0, 4] -.L147: +.L143: add w2, w2, 1 add x4, x4, 2 and w2, w2, 65535 - b .L146 -.L151: + b .L142 +.L147: ldrh w4, [x2] cmp w4, w5 - beq .L150 + beq .L146 ldrh w4, [x0, 4] add w4, w1, w4 strh w4, [x0, 4] -.L150: +.L146: add x2, x2, 2 - b .L149 + b .L145 .size ftl_sb_update_avl_pages, .-ftl_sb_update_avl_pages .section .text.FtlSlcSuperblockCheck,"ax",@progbits .align 2 @@ -1252,38 +1202,38 @@ ftl_sb_update_avl_pages: .type FtlSlcSuperblockCheck, %function FtlSlcSuperblockCheck: ldrh w1, [x0, 4] - cbz w1, .L152 + cbz w1, .L148 ldrh w2, [x0] mov w1, 65535 cmp w2, w1 - beq .L152 + beq .L148 ldrb w2, [x0, 6] add x2, x2, 8 ldrh w3, [x0, x2, lsl 1] - adrp x2, .LANCHOR3 - ldrh w4, [x2, #:lo12:.LANCHOR3] + adrp x2, .LANCHOR2 + ldrh w4, [x2, #:lo12:.LANCHOR2] mov w2, w1 -.L155: +.L151: cmp w3, w2 - beq .L157 -.L152: + beq .L153 +.L148: ret -.L157: +.L153: ldrb w1, [x0, 6] add w1, w1, 1 and w1, w1, 255 strb w1, [x0, 6] cmp w1, w4 - bne .L156 + bne .L152 ldrh w1, [x0, 2] strb wzr, [x0, 6] add w1, w1, 1 strh w1, [x0, 2] -.L156: +.L152: ldrb w1, [x0, 6] add x1, x1, 8 ldrh w3, [x0, x1, lsl 1] - b .L155 + b .L151 .size FtlSlcSuperblockCheck, .-FtlSlcSuperblockCheck .section .text.make_superblock,"ax",@progbits .align 2 @@ -1295,65 +1245,65 @@ make_superblock: ldrh w1, [x0] str x19, [sp, 16] mov x19, x0 - adrp x0, .LANCHOR5 - ldrh w0, [x0, #:lo12:.LANCHOR5] + adrp x0, .LANCHOR4 + ldrh w0, [x0, #:lo12:.LANCHOR4] cmp w1, w0 - bcc .L159 - adrp x1, .LANCHOR60 + bcc .L155 + adrp x1, .LANCHOR59 adrp x0, .LC1 - mov w2, 2148 - add x1, x1, :lo12:.LANCHOR60 + mov w2, 2150 + add x1, x1, :lo12:.LANCHOR59 add x0, x0, :lo12:.LC1 bl printf -.L159: - adrp x0, .LANCHOR3 - adrp x7, .LANCHOR13 +.L155: + adrp x0, .LANCHOR2 + adrp x7, .LANCHOR12 add x6, x19, 16 - add x7, x7, :lo12:.LANCHOR13 - ldrh w8, [x0, #:lo12:.LANCHOR3] + add x7, x7, :lo12:.LANCHOR12 + ldrh w8, [x0, #:lo12:.LANCHOR2] mov x5, 0 strh wzr, [x19, 4] mov w10, -1 strb wzr, [x19, 7] -.L160: +.L156: cmp w8, w5, uxth - bhi .L162 - adrp x1, .LANCHOR19 + bhi .L158 + adrp x1, .LANCHOR18 ldrb w0, [x19, 7] strb wzr, [x19, 9] - ldrh w1, [x1, #:lo12:.LANCHOR19] + ldrh w1, [x1, #:lo12:.LANCHOR18] mul w0, w0, w1 ldrh w1, [x19] strh w0, [x19, 4] - adrp x0, .LANCHOR47 - ldr x0, [x0, #:lo12:.LANCHOR47] + adrp x0, .LANCHOR46 + ldr x0, [x0, #:lo12:.LANCHOR46] ldrh w1, [x0, x1, lsl 1] mov w0, 10000 cmp w1, w0 - bls .L163 + bls .L159 mov w0, 1 strb w0, [x19, 9] -.L163: +.L159: mov w0, 0 ldr x19, [sp, 16] ldp x29, x30, [sp], 32 ret -.L162: +.L158: ldrh w1, [x19] ldrb w0, [x7, x5] bl V2P_block mov w4, w0 strh w10, [x6] bl FtlBbmIsBadBlock - cbnz w0, .L161 + cbnz w0, .L157 strh w4, [x6] ldrb w0, [x19, 7] add w0, w0, 1 strb w0, [x19, 7] -.L161: +.L157: add x5, x5, 1 add x6, x6, 2 - b .L160 + b .L156 .size make_superblock, .-make_superblock .section .text.update_multiplier_value,"ax",@progbits .align 2 @@ -1361,55 +1311,55 @@ make_superblock: .type update_multiplier_value, %function update_multiplier_value: and w6, w0, 65535 - adrp x0, .LANCHOR3 + adrp x0, .LANCHOR2 mov x7, 0 - adrp x8, .LANCHOR13 - ldrh w10, [x0, #:lo12:.LANCHOR3] - adrp x0, .LANCHOR19 + adrp x8, .LANCHOR12 + ldrh w10, [x0, #:lo12:.LANCHOR2] + adrp x0, .LANCHOR18 mov w5, 0 - add x8, x8, :lo12:.LANCHOR13 - ldrh w11, [x0, #:lo12:.LANCHOR19] + add x8, x8, :lo12:.LANCHOR12 + ldrh w11, [x0, #:lo12:.LANCHOR18] cmp w10, w7, uxth - bhi .L177 - cbz w5, .L175 + bhi .L173 + cbz w5, .L171 mov w0, 32768 sdiv w5, w0, w5 -.L176: - adrp x0, .LANCHOR40 +.L172: + adrp x0, .LANCHOR39 mov w1, 6 - ldr x0, [x0, #:lo12:.LANCHOR40] + ldr x0, [x0, #:lo12:.LANCHOR39] umaddl x6, w6, w1, x0 mov w0, 0 strh w5, [x6, 4] ret -.L170: +.L166: mov w5, 0 - b .L169 -.L175: + b .L165 +.L171: mov w5, 0 - b .L176 -.L177: + b .L172 +.L173: stp x29, x30, [sp, -16]! add x29, sp, 0 -.L168: +.L164: ldrb w0, [x8, x7] mov w1, w6 bl V2P_block bl FtlBbmIsBadBlock - cbnz w0, .L167 + cbnz w0, .L163 add w5, w5, w11 and w5, w5, 65535 -.L167: +.L163: add x7, x7, 1 cmp w10, w7, uxth - bhi .L168 - cbz w5, .L170 + bhi .L164 + cbz w5, .L166 mov w0, 32768 sdiv w5, w0, w5 -.L169: - adrp x0, .LANCHOR40 +.L165: + adrp x0, .LANCHOR39 mov w1, 6 - ldr x0, [x0, #:lo12:.LANCHOR40] + ldr x0, [x0, #:lo12:.LANCHOR39] umaddl x6, w6, w1, x0 mov w0, 0 strh w5, [x6, 4] @@ -1421,22 +1371,22 @@ update_multiplier_value: .global GetFreeBlockMinEraseCount .type GetFreeBlockMinEraseCount, %function GetFreeBlockMinEraseCount: - adrp x0, .LANCHOR46 - ldr x0, [x0, #:lo12:.LANCHOR46] - cbz x0, .L180 - adrp x1, .LANCHOR40 - ldr x1, [x1, #:lo12:.LANCHOR40] + adrp x0, .LANCHOR45 + ldr x0, [x0, #:lo12:.LANCHOR45] + cbz x0, .L176 + adrp x1, .LANCHOR39 + ldr x1, [x1, #:lo12:.LANCHOR39] sub x0, x0, x1 mov x1, -6148914691236517206 asr x0, x0, 1 movk x1, 0xaaab, lsl 0 mul x0, x0, x1 - adrp x1, .LANCHOR47 - ldr x1, [x1, #:lo12:.LANCHOR47] + adrp x1, .LANCHOR46 + ldr x1, [x1, #:lo12:.LANCHOR46] and x0, x0, 65535 ldrh w0, [x1, x0, lsl 1] ret -.L180: +.L176: mov w0, 0 ret .size GetFreeBlockMinEraseCount, .-GetFreeBlockMinEraseCount @@ -1445,21 +1395,21 @@ GetFreeBlockMinEraseCount: .global GetFreeBlockMaxEraseCount .type GetFreeBlockMaxEraseCount, %function GetFreeBlockMaxEraseCount: - adrp x1, .LANCHOR46 + adrp x1, .LANCHOR45 and w0, w0, 65535 - ldr x1, [x1, #:lo12:.LANCHOR46] - cbz x1, .L188 - adrp x2, .LANCHOR48 + ldr x1, [x1, #:lo12:.LANCHOR45] + cbz x1, .L184 + adrp x2, .LANCHOR47 mov w3, 7 mov w5, 6 mov w6, 65535 - ldrh w2, [x2, #:lo12:.LANCHOR48] + ldrh w2, [x2, #:lo12:.LANCHOR47] mul w2, w2, w3 asr w2, w2, 3 cmp w0, w2 csel w0, w2, w0, gt - adrp x2, .LANCHOR40 - ldr x3, [x2, #:lo12:.LANCHOR40] + adrp x2, .LANCHOR39 + ldr x3, [x2, #:lo12:.LANCHOR39] mov x2, -6148914691236517206 movk x2, 0xaaab, lsl 0 sub x1, x1, x3 @@ -1467,25 +1417,25 @@ GetFreeBlockMaxEraseCount: mul x1, x1, x2 mov w2, 0 and w1, w1, 65535 -.L184: +.L180: cmp w0, w2 - beq .L187 + beq .L183 umull x4, w1, w5 ldrh w4, [x3, x4] cmp w4, w6 - bne .L185 -.L187: - adrp x0, .LANCHOR47 + bne .L181 +.L183: + adrp x0, .LANCHOR46 ubfiz x1, x1, 1, 16 - ldr x0, [x0, #:lo12:.LANCHOR47] + ldr x0, [x0, #:lo12:.LANCHOR46] ldrh w0, [x0, x1] ret -.L185: +.L181: add w2, w2, 1 mov w1, w4 and w2, w2, 65535 - b .L184 -.L188: + b .L180 +.L184: mov w0, 0 ret .size GetFreeBlockMaxEraseCount, .-GetFreeBlockMaxEraseCount @@ -1497,18 +1447,18 @@ free_data_superblock: and w0, w0, 65535 mov w1, 65535 cmp w0, w1 - beq .L192 + beq .L188 stp x29, x30, [sp, -16]! - adrp x2, .LANCHOR42 + adrp x2, .LANCHOR41 ubfiz x1, x0, 1, 16 add x29, sp, 0 - ldr x2, [x2, #:lo12:.LANCHOR42] + ldr x2, [x2, #:lo12:.LANCHOR41] strh wzr, [x2, x1] bl INSERT_FREE_LIST mov w0, 0 ldp x29, x30, [sp], 16 ret -.L192: +.L188: mov w0, 0 ret .size free_data_superblock, .-free_data_superblock @@ -1525,49 +1475,49 @@ get_new_active_ppa: mov w0, 65535 str x21, [sp, 32] cmp w1, w0 - bne .L196 - adrp x1, .LANCHOR61 + bne .L192 + adrp x1, .LANCHOR60 adrp x0, .LC1 - mov w2, 2781 - add x1, x1, :lo12:.LANCHOR61 + mov w2, 2785 + add x1, x1, :lo12:.LANCHOR60 add x0, x0, :lo12:.LC1 bl printf -.L196: - adrp x21, .LANCHOR19 +.L192: + adrp x21, .LANCHOR18 ldrh w1, [x19, 2] - ldrh w0, [x21, #:lo12:.LANCHOR19] + ldrh w0, [x21, #:lo12:.LANCHOR18] cmp w1, w0 - bne .L197 - adrp x1, .LANCHOR61 + bne .L193 + adrp x1, .LANCHOR60 adrp x0, .LC1 - mov w2, 2782 - add x1, x1, :lo12:.LANCHOR61 + mov w2, 2786 + add x1, x1, :lo12:.LANCHOR60 add x0, x0, :lo12:.LC1 bl printf -.L197: +.L193: ldrh w0, [x19, 4] - cbnz w0, .L198 - adrp x1, .LANCHOR61 + cbnz w0, .L194 + adrp x1, .LANCHOR60 adrp x0, .LC1 - mov w2, 2783 - add x1, x1, :lo12:.LANCHOR61 + mov w2, 2787 + add x1, x1, :lo12:.LANCHOR60 add x0, x0, :lo12:.LC1 bl printf -.L198: +.L194: ldrb w0, [x19, 6] - adrp x1, .LANCHOR3 + adrp x1, .LANCHOR2 strb wzr, [x19, 10] add x0, x0, 8 - ldrh w3, [x1, #:lo12:.LANCHOR3] + ldrh w3, [x1, #:lo12:.LANCHOR2] mov w1, 65535 ldrh w0, [x19, x0, lsl 1] -.L199: +.L195: cmp w0, w1 - beq .L201 + beq .L197 ldrh w20, [x19, 2] - ldrh w2, [x21, #:lo12:.LANCHOR19] + ldrh w2, [x21, #:lo12:.LANCHOR18] cmp w20, w2 - bcs .L205 + bcs .L201 ldrh w1, [x19, 4] orr w20, w20, w0, lsl 10 ldrb w0, [x19, 6] @@ -1575,101 +1525,101 @@ get_new_active_ppa: sub w1, w1, #1 and w1, w1, 65535 strh w1, [x19, 4] -.L204: +.L200: add w0, w0, 1 and w0, w0, 255 cmp w3, w0 - bne .L203 + bne .L199 ldrh w0, [x19, 2] add w0, w0, 1 strh w0, [x19, 2] mov w0, 0 -.L203: +.L199: add x5, x19, x0, sxtw 1 ldrh w5, [x5, 16] cmp w5, w4 - beq .L204 + beq .L200 strb w0, [x19, 6] ldrh w0, [x19, 2] cmp w0, w2 - bne .L195 - cbz w1, .L195 - adrp x1, .LANCHOR61 + bne .L191 + cbz w1, .L191 + adrp x1, .LANCHOR60 adrp x0, .LC1 - mov w2, 2806 - add x1, x1, :lo12:.LANCHOR61 + mov w2, 2810 + add x1, x1, :lo12:.LANCHOR60 add x0, x0, :lo12:.LC1 bl printf -.L195: +.L191: mov w0, w20 ldr x21, [sp, 32] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 48 ret -.L201: +.L197: ldrb w0, [x19, 6] add w0, w0, 1 and w0, w0, 255 strb w0, [x19, 6] cmp w0, w3 - bne .L200 + bne .L196 ldrh w0, [x19, 2] strb wzr, [x19, 6] add w0, w0, 1 strh w0, [x19, 2] -.L200: +.L196: ldrb w0, [x19, 6] add x0, x0, 8 ldrh w0, [x19, x0, lsl 1] - b .L199 -.L205: - mov w20, 65535 b .L195 +.L201: + mov w20, 65535 + b .L191 .size get_new_active_ppa, .-get_new_active_ppa .section .text.FtlGcBufInit,"ax",@progbits .align 2 .global FtlGcBufInit .type FtlGcBufInit, %function FtlGcBufInit: - adrp x1, .LANCHOR63 - adrp x0, .LANCHOR62 - adrp x7, .LANCHOR64 - adrp x6, .LANCHOR65 - ldr x5, [x1, #:lo12:.LANCHOR63] + adrp x1, .LANCHOR62 + adrp x0, .LANCHOR61 + adrp x7, .LANCHOR63 + adrp x6, .LANCHOR64 + ldr x5, [x1, #:lo12:.LANCHOR62] + adrp x1, .LANCHOR22 + str wzr, [x0, #:lo12:.LANCHOR61] + adrp x0, .LANCHOR2 + ldrh w10, [x1, #:lo12:.LANCHOR22] adrp x1, .LANCHOR23 - str wzr, [x0, #:lo12:.LANCHOR62] - adrp x0, .LANCHOR3 - ldrh w10, [x1, #:lo12:.LANCHOR23] - adrp x1, .LANCHOR24 - ldrh w0, [x0, #:lo12:.LANCHOR3] + ldrh w0, [x0, #:lo12:.LANCHOR2] mov w8, 24 - ldrh w11, [x1, #:lo12:.LANCHOR24] - adrp x1, .LANCHOR66 - ldr x14, [x7, #:lo12:.LANCHOR64] + ldrh w11, [x1, #:lo12:.LANCHOR23] + adrp x1, .LANCHOR65 + ldr x14, [x7, #:lo12:.LANCHOR63] mov x3, x5 - ldr x4, [x1, #:lo12:.LANCHOR66] + ldr x4, [x1, #:lo12:.LANCHOR65] mov w2, 0 - ldr x15, [x6, #:lo12:.LANCHOR65] + ldr x15, [x6, #:lo12:.LANCHOR64] nop // between mem op and mult-accumulate umaddl x8, w0, w8, x5 add x4, x4, 8 mov w1, 0 mov w16, 1 -.L212: +.L208: add w13, w2, w10 add w12, w1, w11 cmp x3, x8 - bne .L213 - adrp x1, .LANCHOR67 - ldr x7, [x7, #:lo12:.LANCHOR64] - ldr x6, [x6, #:lo12:.LANCHOR65] + bne .L209 + adrp x1, .LANCHOR66 + ldr x7, [x7, #:lo12:.LANCHOR63] + ldr x6, [x6, #:lo12:.LANCHOR64] mov w8, 24 - ldr w4, [x1, #:lo12:.LANCHOR67] -.L214: + ldr w4, [x1, #:lo12:.LANCHOR66] +.L210: cmp w0, w4 - bcc .L215 + bcc .L211 ret -.L213: +.L209: asr w2, w2, 2 asr w1, w1, 2 add x2, x14, x2, sxtw 2 @@ -1681,8 +1631,8 @@ FtlGcBufInit: add x4, x4, 32 mov w1, w12 mov w2, w13 - b .L212 -.L215: + b .L208 +.L211: umull x3, w0, w8 mul w1, w10, w0 add x2, x5, x3 @@ -1696,44 +1646,44 @@ FtlGcBufInit: asr w1, w1, 2 add x1, x6, x1, sxtw 2 str x1, [x2, 8] - b .L214 + b .L210 .size FtlGcBufInit, .-FtlGcBufInit .section .text.FtlGcBufFree,"ax",@progbits .align 2 .global FtlGcBufFree .type FtlGcBufFree, %function FtlGcBufFree: - adrp x2, .LANCHOR67 + adrp x2, .LANCHOR66 mov w3, 0 mov w8, 24 - ldr w7, [x2, #:lo12:.LANCHOR67] - adrp x2, .LANCHOR63 - ldr x5, [x2, #:lo12:.LANCHOR63] -.L217: + ldr w7, [x2, #:lo12:.LANCHOR66] + adrp x2, .LANCHOR62 + ldr x5, [x2, #:lo12:.LANCHOR62] +.L213: cmp w3, w1 - bcs .L216 + bcs .L212 ubfiz x4, x3, 5, 16 mov w2, 0 add x4, x0, x4 - b .L222 -.L218: + b .L218 +.L214: add w2, w2, 1 and w2, w2, 65535 -.L222: +.L218: cmp w2, w7 - bcs .L219 + bcs .L215 umull x6, w2, w8 add x10, x5, x6 ldr x11, [x5, x6] ldr x6, [x4, 8] cmp x11, x6 - bne .L218 + bne .L214 str wzr, [x10, 16] -.L219: +.L215: add w3, w3, 1 and w3, w3, 65535 - b .L217 -.L216: + b .L213 +.L212: ret .size FtlGcBufFree, .-FtlGcBufFree .section .text.FtlGcBufAlloc,"ax",@progbits @@ -1741,38 +1691,38 @@ FtlGcBufFree: .global FtlGcBufAlloc .type FtlGcBufAlloc, %function FtlGcBufAlloc: - adrp x2, .LANCHOR67 + adrp x2, .LANCHOR66 mov w3, 0 mov w7, 24 mov w8, 1 - ldr w5, [x2, #:lo12:.LANCHOR67] - adrp x2, .LANCHOR63 - ldr x6, [x2, #:lo12:.LANCHOR63] -.L224: + ldr w5, [x2, #:lo12:.LANCHOR66] + adrp x2, .LANCHOR62 + ldr x6, [x2, #:lo12:.LANCHOR62] +.L220: cmp w3, w1 - bcs .L223 + bcs .L219 mov w2, 0 - b .L229 -.L225: + b .L225 +.L221: add w2, w2, 1 and w2, w2, 65535 -.L229: +.L225: cmp w2, w5 - bcs .L226 + bcs .L222 umaddl x4, w2, w7, x6 ldr w10, [x4, 16] - cbnz w10, .L225 + cbnz w10, .L221 ubfiz x2, x3, 5, 16 ldr x10, [x4] add x2, x0, x2 str w8, [x4, 16] ldr x4, [x4, 8] stp x10, x4, [x2, 8] -.L226: +.L222: add w3, w3, 1 and w3, w3, 65535 - b .L224 -.L223: + b .L220 +.L219: ret .size FtlGcBufAlloc, .-FtlGcBufAlloc .section .text.IsBlkInGcList,"ax",@progbits @@ -1780,23 +1730,23 @@ FtlGcBufAlloc: .global IsBlkInGcList .type IsBlkInGcList, %function IsBlkInGcList: - adrp x1, .LANCHOR68 + adrp x1, .LANCHOR67 and w0, w0, 65535 - ldrh w2, [x1, #:lo12:.LANCHOR68] - adrp x1, .LANCHOR69 - ldr x3, [x1, #:lo12:.LANCHOR69] + ldrh w2, [x1, #:lo12:.LANCHOR67] + adrp x1, .LANCHOR68 + ldr x3, [x1, #:lo12:.LANCHOR68] mov x1, 0 -.L231: +.L227: cmp w2, w1, uxth - bhi .L233 + bhi .L229 mov w0, 0 ret -.L233: +.L229: add x1, x1, 1 add x4, x3, x1, lsl 1 ldrh w4, [x4, -2] cmp w4, w0 - bne .L231 + bne .L227 mov w0, 1 ret .size IsBlkInGcList, .-IsBlkInGcList @@ -1813,40 +1763,40 @@ FtlGcUpdatePage: add x29, sp, 0 bl P2V_block_in_plane and w7, w0, 65535 - adrp x4, .LANCHOR68 - adrp x2, .LANCHOR69 + adrp x4, .LANCHOR67 + adrp x2, .LANCHOR68 mov x3, 0 - ldrh w1, [x4, #:lo12:.LANCHOR68] - ldr x5, [x2, #:lo12:.LANCHOR69] -.L236: + ldrh w1, [x4, #:lo12:.LANCHOR67] + ldr x5, [x2, #:lo12:.LANCHOR68] +.L232: and w2, w3, 65535 cmp w2, w1 - bcc .L238 - bne .L237 + bcc .L234 + bne .L233 and x3, x3, 65535 strh w0, [x5, x3, lsl 1] - ldrh w0, [x4, #:lo12:.LANCHOR68] + ldrh w0, [x4, #:lo12:.LANCHOR67] add w0, w0, 1 - strh w0, [x4, #:lo12:.LANCHOR68] - b .L237 -.L238: + strh w0, [x4, #:lo12:.LANCHOR67] + b .L233 +.L234: add x3, x3, 1 add x2, x5, x3, lsl 1 ldrh w2, [x2, -2] cmp w2, w7 - bne .L236 -.L237: - adrp x4, .LANCHOR70 - adrp x1, .LANCHOR71 + bne .L232 +.L233: + adrp x4, .LANCHOR69 + adrp x1, .LANCHOR70 mov w3, 12 - ldrh w0, [x4, #:lo12:.LANCHOR70] - ldr x5, [x1, #:lo12:.LANCHOR71] + ldrh w0, [x4, #:lo12:.LANCHOR69] + ldr x5, [x1, #:lo12:.LANCHOR70] umull x3, w0, w3 add w0, w0, 1 add x7, x5, x3 stp w10, w8, [x7, 4] str w6, [x5, x3] - strh w0, [x4, #:lo12:.LANCHOR70] + strh w0, [x4, #:lo12:.LANCHOR69] ldp x29, x30, [sp], 16 ret .size FtlGcUpdatePage, .-FtlGcUpdatePage @@ -1855,27 +1805,27 @@ FtlGcUpdatePage: .global FtlGcRefreshBlock .type FtlGcRefreshBlock, %function FtlGcRefreshBlock: - adrp x4, .LANCHOR72 + adrp x4, .LANCHOR71 and w0, w0, 65535 - ldrh w5, [x4, #:lo12:.LANCHOR72] + ldrh w5, [x4, #:lo12:.LANCHOR71] cmp w5, w0 - beq .L241 - adrp x1, .LANCHOR73 - ldrh w3, [x1, #:lo12:.LANCHOR73] + beq .L237 + adrp x1, .LANCHOR72 + ldrh w3, [x1, #:lo12:.LANCHOR72] cmp w0, w3 - beq .L241 + beq .L237 mov w2, 65535 cmp w5, w2 - bne .L242 - strh w0, [x4, #:lo12:.LANCHOR72] -.L241: + bne .L238 + strh w0, [x4, #:lo12:.LANCHOR71] +.L237: mov w0, 0 ret -.L242: +.L238: cmp w3, w2 - bne .L241 - strh w0, [x1, #:lo12:.LANCHOR73] - b .L241 + bne .L237 + strh w0, [x1, #:lo12:.LANCHOR72] + b .L237 .size FtlGcRefreshBlock, .-FtlGcRefreshBlock .section .text.FtlGcMarkBadPhyBlk,"ax",@progbits .align 2 @@ -1888,29 +1838,29 @@ FtlGcMarkBadPhyBlk: add x29, sp, 0 bl P2V_block_in_plane bl FtlGcRefreshBlock - adrp x1, .LANCHOR74 - adrp x3, .LANCHOR75 - add x3, x3, :lo12:.LANCHOR75 + adrp x1, .LANCHOR73 + adrp x3, .LANCHOR74 + add x3, x3, :lo12:.LANCHOR74 mov x2, 0 - ldrh w0, [x1, #:lo12:.LANCHOR74] -.L244: + ldrh w0, [x1, #:lo12:.LANCHOR73] +.L240: cmp w0, w2, uxth - bhi .L246 + bhi .L242 cmp w0, 15 - bhi .L245 + bhi .L241 add w2, w0, 1 - strh w2, [x1, #:lo12:.LANCHOR74] - adrp x1, .LANCHOR75 - add x1, x1, :lo12:.LANCHOR75 + strh w2, [x1, #:lo12:.LANCHOR73] + adrp x1, .LANCHOR74 + add x1, x1, :lo12:.LANCHOR74 strh w6, [x1, w0, sxtw 1] - b .L245 -.L246: + b .L241 +.L242: add x2, x2, 1 add x4, x3, x2, lsl 1 ldrh w4, [x4, -2] cmp w4, w6 - bne .L244 -.L245: + bne .L240 +.L241: mov w0, 0 ldp x29, x30, [sp], 16 ret @@ -1920,35 +1870,35 @@ FtlGcMarkBadPhyBlk: .global FtlGcReFreshBadBlk .type FtlGcReFreshBadBlk, %function FtlGcReFreshBadBlk: - adrp x0, .LANCHOR74 - ldrh w0, [x0, #:lo12:.LANCHOR74] - cbz w0, .L255 - adrp x1, .LANCHOR72 - ldrh w2, [x1, #:lo12:.LANCHOR72] + adrp x0, .LANCHOR73 + ldrh w0, [x0, #:lo12:.LANCHOR73] + cbz w0, .L251 + adrp x1, .LANCHOR71 + ldrh w2, [x1, #:lo12:.LANCHOR71] mov w1, 65535 cmp w2, w1 - bne .L255 + bne .L251 stp x29, x30, [sp, -16]! - adrp x6, .LANCHOR76 + adrp x6, .LANCHOR75 add x29, sp, 0 - ldrh w1, [x6, #:lo12:.LANCHOR76] + ldrh w1, [x6, #:lo12:.LANCHOR75] cmp w1, w0 - bcc .L250 - strh wzr, [x6, #:lo12:.LANCHOR76] -.L250: - ldrh w1, [x6, #:lo12:.LANCHOR76] - adrp x0, .LANCHOR75 - add x0, x0, :lo12:.LANCHOR75 + bcc .L246 + strh wzr, [x6, #:lo12:.LANCHOR75] +.L246: + ldrh w1, [x6, #:lo12:.LANCHOR75] + adrp x0, .LANCHOR74 + add x0, x0, :lo12:.LANCHOR74 ldrh w0, [x0, x1, lsl 1] bl P2V_block_in_plane bl FtlGcRefreshBlock - ldrh w0, [x6, #:lo12:.LANCHOR76] + ldrh w0, [x6, #:lo12:.LANCHOR75] ldp x29, x30, [sp], 16 add w0, w0, 1 - strh w0, [x6, #:lo12:.LANCHOR76] + strh w0, [x6, #:lo12:.LANCHOR75] mov w0, 0 ret -.L255: +.L251: mov w0, 0 ret .size FtlGcReFreshBadBlk, .-FtlGcReFreshBadBlk @@ -1992,9 +1942,9 @@ rknand_print_hex: mov x19, 0 mov w20, 0 adrp x26, .LC3 -.L261: +.L257: cmp w27, w19 - bhi .L267 + bhi .L263 ldp x19, x20, [sp, 16] adrp x0, .LC5 ldp x21, x22, [sp, 32] @@ -2004,40 +1954,40 @@ rknand_print_hex: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 96 b printf -.L267: - cbnz w20, .L262 +.L263: + cbnz w20, .L258 mov w2, w21 mov x1, x28 mov x0, x24 bl printf -.L262: +.L258: cmp w23, 4 - bne .L263 + bne .L259 ldr w1, [x22, x19, lsl 2] -.L270: +.L266: add x0, x26, :lo12:.LC3 -.L269: +.L265: bl printf add w20, w20, 1 cmp w20, 15 - bls .L266 + bls .L262 mov w20, 0 adrp x0, .LC5 add x0, x0, :lo12:.LC5 bl printf -.L266: +.L262: add x19, x19, 1 add w21, w21, w23 - b .L261 -.L263: + b .L257 +.L259: cmp w23, 2 - bne .L265 + bne .L261 ldrh w1, [x22, x19, lsl 1] - b .L270 -.L265: + b .L266 +.L261: ldrb w1, [x22, x19] mov x0, x25 - b .L269 + b .L265 .size rknand_print_hex, .-rknand_print_hex .section .text.FlashEraseBlocks,"ax",@progbits .align 2 @@ -2058,34 +2008,34 @@ FlashEraseBlocks: add x23, x21, 4 stp x25, x26, [sp, 64] add x23, x20, x23 - adrp x25, .LANCHOR78 + adrp x25, .LANCHOR77 str x27, [sp, 80] lsl w26, w24, 3 mov x22, x0 - add x27, x25, :lo12:.LANCHOR78 -.L272: + add x27, x25, :lo12:.LANCHOR77 +.L268: cmp x19, x23 - beq .L286 + beq .L282 ldr w0, [x19] add x2, x29, 104 add x1, x29, 108 bl l2p_addr_tran.isra.0 ldr w0, [x29, 104] - cbnz w0, .L273 + cbnz w0, .L269 ldr w1, [x29, 108] cmp w26, w1 - bls .L273 + bls .L269 mov x19, x20 add x21, x20, x21 adrp x22, .LC6 - adrp x20, .LANCHOR77 + adrp x20, .LANCHOR76 add x22, x22, :lo12:.LC6 - add x20, x20, :lo12:.LANCHOR77 + add x20, x20, :lo12:.LANCHOR76 mov w23, -1 -.L274: +.L270: cmp x19, x21 - bne .L275 -.L286: + bne .L271 +.L282: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -2094,7 +2044,7 @@ FlashEraseBlocks: ldr x27, [sp, 80] ldp x29, x30, [sp], 112 ret -.L275: +.L271: ldr w2, [x29, 108] mov x1, x20 str w23, [x19] @@ -2113,34 +2063,34 @@ FlashEraseBlocks: mov w2, w3 add x0, x0, :lo12:.LC8 bl rknand_print_hex - b .L274 -.L273: - add x1, x25, :lo12:.LANCHOR78 + b .L270 +.L269: + add x1, x25, :lo12:.LANCHOR77 ldr x2, [x1, 8] ldr w1, [x29, 108] blr x2 - cbnz w0, .L276 + cbnz w0, .L272 str wzr, [x19, -4] -.L277: +.L273: add x0, x22, :lo12:.LANCHOR0 ldrh w0, [x0, 14] cmp w0, 4 - bne .L279 + bne .L275 ldrb w0, [x29, 104] ldr x2, [x27, 8] ldr w1, [x29, 108] add w1, w24, w1 blr x2 - cbz w0, .L279 + cbz w0, .L275 mov w0, -1 str w0, [x19, -4] -.L279: +.L275: add x19, x19, 32 - b .L272 -.L276: + b .L268 +.L272: mov w0, -1 str w0, [x19, -4] - b .L277 + b .L273 .size FlashEraseBlocks, .-FlashEraseBlocks .section .text.FtlFreeSysBlkQueueIn,"ax",@progbits .align 2 @@ -2155,37 +2105,37 @@ FtlFreeSysBlkQueueIn: sub w2, w20, #1 mov w0, 65533 cmp w0, w2, uxth - bcc .L288 - adrp x0, .LANCHOR38 - add x2, x0, :lo12:.LANCHOR38 + bcc .L284 + adrp x0, .LANCHOR37 + add x2, x0, :lo12:.LANCHOR37 mov x19, x0 ldrh w2, [x2, 6] cmp w2, 1024 - beq .L288 + beq .L284 and w1, w1, 65535 - cbz w1, .L290 + cbz w1, .L286 mov w0, w20 bl P2V_block_in_plane and w21, w0, 65535 - adrp x0, .LANCHOR79 + adrp x0, .LANCHOR78 lsl w1, w20, 10 mov w2, 1 - ldr x0, [x0, #:lo12:.LANCHOR79] + ldr x0, [x0, #:lo12:.LANCHOR78] str w1, [x0, 4] mov w1, w2 bl FlashEraseBlocks - adrp x1, .LANCHOR47 + adrp x1, .LANCHOR46 ubfiz x0, x21, 1, 16 - ldr x2, [x1, #:lo12:.LANCHOR47] + ldr x2, [x1, #:lo12:.LANCHOR46] ldrh w1, [x2, x0] add w1, w1, 1 strh w1, [x2, x0] - adrp x1, .LANCHOR80 - ldr w0, [x1, #:lo12:.LANCHOR80] + adrp x1, .LANCHOR79 + ldr w0, [x1, #:lo12:.LANCHOR79] add w0, w0, 1 - str w0, [x1, #:lo12:.LANCHOR80] -.L290: - add x0, x19, :lo12:.LANCHOR38 + str w0, [x1, #:lo12:.LANCHOR79] +.L286: + add x0, x19, :lo12:.LANCHOR37 ldrh w1, [x0, 6] add w1, w1, 1 strh w1, [x0, 6] @@ -2195,7 +2145,7 @@ FtlFreeSysBlkQueueIn: and w1, w1, 1023 strh w1, [x0, 4] strh w20, [x2, 8] -.L288: +.L284: ldp x19, x20, [sp, 16] ldr x21, [sp, 32] ldp x29, x30, [sp], 48 @@ -2206,14 +2156,14 @@ FtlFreeSysBlkQueueIn: .global FtlFreeSysBlkQueueOut .type FtlFreeSysBlkQueueOut, %function FtlFreeSysBlkQueueOut: - adrp x0, .LANCHOR38 - add x1, x0, :lo12:.LANCHOR38 + adrp x0, .LANCHOR37 + add x1, x0, :lo12:.LANCHOR37 stp x29, x30, [sp, -32]! add x29, sp, 0 ldrh w2, [x1, 6] stp x19, x20, [sp, 16] mov x19, x0 - cbz w2, .L302 + cbz w2, .L298 ldrh w0, [x1, 2] sub w2, w2, #1 strh w2, [x1, 6] @@ -2222,34 +2172,34 @@ FtlFreeSysBlkQueueOut: add w0, w0, 1 and w0, w0, 1023 strh w0, [x1, 2] - adrp x0, .LANCHOR79 + adrp x0, .LANCHOR78 ldrh w20, [x3, 8] - ldr x0, [x0, #:lo12:.LANCHOR79] + ldr x0, [x0, #:lo12:.LANCHOR78] lsl w1, w20, 10 str w1, [x0, 4] mov w1, w2 bl FlashEraseBlocks - adrp x1, .LANCHOR80 - ldr w0, [x1, #:lo12:.LANCHOR80] + adrp x1, .LANCHOR79 + ldr w0, [x1, #:lo12:.LANCHOR79] add w0, w0, 1 - str w0, [x1, #:lo12:.LANCHOR80] -.L299: + str w0, [x1, #:lo12:.LANCHOR79] +.L295: sub w0, w20, #1 mov w1, 65533 cmp w1, w0, uxth - bcs .L300 - add x0, x19, :lo12:.LANCHOR38 + bcs .L296 + add x0, x19, :lo12:.LANCHOR37 mov w1, w20 ldrh w2, [x0, 6] adrp x0, .LC9 add x0, x0, :lo12:.LC9 bl printf -.L301: - b .L301 -.L302: +.L297: + b .L297 +.L298: mov w20, 65535 - b .L299 -.L300: + b .L295 +.L296: mov w0, w20 ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 @@ -2268,27 +2218,27 @@ ftl_map_blk_alloc_new_blk: mov w20, 0 ldr x0, [x0, 16] str x21, [sp, 32] -.L305: +.L301: cmp w20, w1 - beq .L309 + beq .L305 mov x21, x0 ldrh w2, [x0], 2 - cbnz w2, .L306 + cbnz w2, .L302 bl FtlFreeSysBlkQueueOut and w1, w0, 65535 strh w0, [x21] sub w2, w1, #1 mov w0, 65533 cmp w0, w2, uxth - bcs .L307 - adrp x0, .LANCHOR38+6 - ldrh w2, [x0, #:lo12:.LANCHOR38+6] + bcs .L303 + adrp x0, .LANCHOR37+6 + ldrh w2, [x0, #:lo12:.LANCHOR37+6] adrp x0, .LC10 add x0, x0, :lo12:.LC10 bl printf -.L308: - b .L308 -.L307: +.L304: + b .L304 +.L303: ldr w0, [x19, 48] strh wzr, [x19, 2] add w0, w0, 1 @@ -2297,26 +2247,26 @@ ftl_map_blk_alloc_new_blk: strh w20, [x19] add w0, w0, 1 strh w0, [x19, 8] -.L309: +.L305: ldrh w0, [x19, 10] cmp w0, w20 - bhi .L311 - adrp x1, .LANCHOR81 + bhi .L307 + adrp x1, .LANCHOR80 adrp x0, .LC1 mov w2, 578 - add x1, x1, :lo12:.LANCHOR81 + add x1, x1, :lo12:.LANCHOR80 add x0, x0, :lo12:.LC1 bl printf -.L311: +.L307: mov w0, 0 ldr x21, [sp, 32] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 48 ret -.L306: +.L302: add w20, w20, 1 and w20, w20, 65535 - b .L305 + b .L301 .size ftl_map_blk_alloc_new_blk, .-ftl_map_blk_alloc_new_blk .section .text.ftl_memset,"ax",@progbits .align 2 @@ -2332,24 +2282,26 @@ ftl_memset: .type FtlMemInit, %function FtlMemInit: stp x29, x30, [sp, -64]! - adrp x0, .LANCHOR82 + adrp x0, .LANCHOR81 mov w1, 65535 add x29, sp, 0 + str wzr, [x0, #:lo12:.LANCHOR81] + adrp x0, .LANCHOR82 + stp x19, x20, [sp, 16] + adrp x19, .LANCHOR20 str wzr, [x0, #:lo12:.LANCHOR82] adrp x0, .LANCHOR83 - stp x19, x20, [sp, 16] - adrp x19, .LANCHOR21 + stp x21, x22, [sp, 32] + adrp x21, .LANCHOR2 str wzr, [x0, #:lo12:.LANCHOR83] adrp x0, .LANCHOR84 - stp x21, x22, [sp, 32] - adrp x22, .LANCHOR3 + str x23, [sp, 48] + adrp x22, .LANCHOR22 str wzr, [x0, #:lo12:.LANCHOR84] adrp x0, .LANCHOR85 - str x23, [sp, 48] - adrp x21, .LANCHOR23 + adrp x23, .LANCHOR23 str wzr, [x0, #:lo12:.LANCHOR85] adrp x0, .LANCHOR86 - adrp x23, .LANCHOR24 str wzr, [x0, #:lo12:.LANCHOR86] adrp x0, .LANCHOR87 str wzr, [x0, #:lo12:.LANCHOR87] @@ -2359,10 +2311,10 @@ FtlMemInit: str wzr, [x0, #:lo12:.LANCHOR89] adrp x0, .LANCHOR90 str wzr, [x0, #:lo12:.LANCHOR90] + adrp x0, .LANCHOR79 + str wzr, [x0, #:lo12:.LANCHOR79] adrp x0, .LANCHOR91 str wzr, [x0, #:lo12:.LANCHOR91] - adrp x0, .LANCHOR80 - str wzr, [x0, #:lo12:.LANCHOR80] adrp x0, .LANCHOR92 str wzr, [x0, #:lo12:.LANCHOR92] adrp x0, .LANCHOR93 @@ -2370,72 +2322,74 @@ FtlMemInit: adrp x0, .LANCHOR94 str wzr, [x0, #:lo12:.LANCHOR94] adrp x0, .LANCHOR95 - str wzr, [x0, #:lo12:.LANCHOR95] + str w1, [x0, #:lo12:.LANCHOR95] adrp x0, .LANCHOR96 - str w1, [x0, #:lo12:.LANCHOR96] + adrp x1, .LANCHOR71 + str wzr, [x0, #:lo12:.LANCHOR96] adrp x0, .LANCHOR97 - adrp x1, .LANCHOR72 str wzr, [x0, #:lo12:.LANCHOR97] adrp x0, .LANCHOR98 str wzr, [x0, #:lo12:.LANCHOR98] - adrp x0, .LANCHOR99 - str wzr, [x0, #:lo12:.LANCHOR99] mov w0, -1 + strh w0, [x1, #:lo12:.LANCHOR71] + adrp x1, .LANCHOR72 strh w0, [x1, #:lo12:.LANCHOR72] - adrp x1, .LANCHOR73 - strh w0, [x1, #:lo12:.LANCHOR73] - adrp x0, .LANCHOR100 + adrp x0, .LANCHOR99 mov w1, 32 + strh w1, [x0, #:lo12:.LANCHOR99] + adrp x0, .LANCHOR100 + mov w1, 128 strh w1, [x0, #:lo12:.LANCHOR100] adrp x0, .LANCHOR101 - mov w1, 128 - strh w1, [x0, #:lo12:.LANCHOR101] - adrp x0, .LANCHOR102 - strh wzr, [x0, #:lo12:.LANCHOR102] - adrp x0, .LANCHOR74 - strh wzr, [x0, #:lo12:.LANCHOR74] - adrp x0, .LANCHOR76 - strh wzr, [x0, #:lo12:.LANCHOR76] - ldrh w0, [x19, #:lo12:.LANCHOR21] + strh wzr, [x0, #:lo12:.LANCHOR101] + adrp x0, .LANCHOR73 + strh wzr, [x0, #:lo12:.LANCHOR73] + adrp x0, .LANCHOR75 + strh wzr, [x0, #:lo12:.LANCHOR75] + ldrh w0, [x19, #:lo12:.LANCHOR20] lsl w0, w0, 1 bl ftl_malloc - adrp x1, .LANCHOR69 - str x0, [x1, #:lo12:.LANCHOR69] + adrp x1, .LANCHOR68 + str x0, [x1, #:lo12:.LANCHOR68] mov w0, 12 - ldrh w1, [x19, #:lo12:.LANCHOR21] + ldrh w1, [x19, #:lo12:.LANCHOR20] mul w0, w1, w0 bl ftl_malloc - ldrh w19, [x22, #:lo12:.LANCHOR3] - adrp x1, .LANCHOR71 + ldrh w19, [x21, #:lo12:.LANCHOR2] + adrp x1, .LANCHOR70 lsl w20, w19, 5 lsl w19, w19, 7 - str x0, [x1, #:lo12:.LANCHOR71] + str x0, [x1, #:lo12:.LANCHOR70] mov w0, w19 bl ftl_malloc + adrp x1, .LANCHOR102 + str x0, [x1, #:lo12:.LANCHOR102] + mov w0, w20 + bl ftl_malloc adrp x1, .LANCHOR103 str x0, [x1, #:lo12:.LANCHOR103] - mov w0, w20 + mov w0, w19 bl ftl_malloc adrp x1, .LANCHOR104 str x0, [x1, #:lo12:.LANCHOR104] + mov w0, w20 + bl ftl_malloc + adrp x1, .LANCHOR78 + str x0, [x1, #:lo12:.LANCHOR78] + mov w0, w20 + bl ftl_malloc + adrp x20, .LANCHOR66 + adrp x1, .LANCHOR65 + ldrh w19, [x22, #:lo12:.LANCHOR22] + str x0, [x1, #:lo12:.LANCHOR65] + ldrh w0, [x21, #:lo12:.LANCHOR2] + lsl w0, w0, 1 + add w0, w0, 1 + str w0, [x20, #:lo12:.LANCHOR66] mov w0, w19 bl ftl_malloc adrp x1, .LANCHOR105 str x0, [x1, #:lo12:.LANCHOR105] - mov w0, w20 - bl ftl_malloc - adrp x1, .LANCHOR79 - str x0, [x1, #:lo12:.LANCHOR79] - mov w0, w20 - bl ftl_malloc - adrp x20, .LANCHOR67 - adrp x1, .LANCHOR66 - ldrh w19, [x21, #:lo12:.LANCHOR23] - str x0, [x1, #:lo12:.LANCHOR66] - ldrh w0, [x22, #:lo12:.LANCHOR3] - lsl w0, w0, 1 - add w0, w0, 1 - str w0, [x20, #:lo12:.LANCHOR67] mov w0, w19 bl ftl_malloc adrp x1, .LANCHOR106 @@ -2444,206 +2398,196 @@ FtlMemInit: bl ftl_malloc adrp x1, .LANCHOR107 str x0, [x1, #:lo12:.LANCHOR107] - mov w0, w19 - bl ftl_malloc - adrp x1, .LANCHOR108 - str x0, [x1, #:lo12:.LANCHOR108] - ldr w0, [x20, #:lo12:.LANCHOR67] + ldr w0, [x20, #:lo12:.LANCHOR66] mul w0, w19, w0 bl ftl_malloc - adrp x1, .LANCHOR64 - str x0, [x1, #:lo12:.LANCHOR64] - mov w0, w19 - bl ftl_malloc - adrp x1, .LANCHOR109 - str x0, [x1, #:lo12:.LANCHOR109] - mov w0, w19 - bl ftl_malloc - adrp x1, .LANCHOR110 - str x0, [x1, #:lo12:.LANCHOR110] - mov w0, 24 - ldr w1, [x20, #:lo12:.LANCHOR67] - mul w0, w1, w0 - bl ftl_malloc adrp x1, .LANCHOR63 str x0, [x1, #:lo12:.LANCHOR63] mov w0, w19 bl ftl_malloc - adrp x1, .LANCHOR111 - str x0, [x1, #:lo12:.LANCHOR111] + adrp x1, .LANCHOR108 + str x0, [x1, #:lo12:.LANCHOR108] mov w0, w19 bl ftl_malloc - adrp x1, .LANCHOR112 - str x0, [x1, #:lo12:.LANCHOR112] - adrp x0, .LANCHOR12 - ldrh w0, [x0, #:lo12:.LANCHOR12] + adrp x1, .LANCHOR109 + str x0, [x1, #:lo12:.LANCHOR109] + mov w0, 24 + ldr w1, [x20, #:lo12:.LANCHOR66] + mul w0, w1, w0 + bl ftl_malloc + adrp x1, .LANCHOR62 + str x0, [x1, #:lo12:.LANCHOR62] + mov w0, w19 + bl ftl_malloc + adrp x1, .LANCHOR110 + str x0, [x1, #:lo12:.LANCHOR110] + mov w0, w19 + bl ftl_malloc + adrp x1, .LANCHOR111 + str x0, [x1, #:lo12:.LANCHOR111] + adrp x0, .LANCHOR11 + ldrh w0, [x0, #:lo12:.LANCHOR11] lsl w0, w0, 2 bl ftl_malloc - adrp x1, .LANCHOR113 - ldrh w19, [x23, #:lo12:.LANCHOR24] - str x0, [x1, #:lo12:.LANCHOR113] - ldrh w0, [x22, #:lo12:.LANCHOR3] - adrp x22, .LANCHOR30 + adrp x1, .LANCHOR112 + ldrh w19, [x23, #:lo12:.LANCHOR23] + str x0, [x1, #:lo12:.LANCHOR112] + ldrh w0, [x21, #:lo12:.LANCHOR2] + adrp x21, .LANCHOR29 mul w19, w19, w0 mov w0, w19 bl ftl_malloc - adrp x1, .LANCHOR114 - str x0, [x1, #:lo12:.LANCHOR114] + adrp x1, .LANCHOR113 + str x0, [x1, #:lo12:.LANCHOR113] lsl w0, w19, 2 bl ftl_malloc - adrp x19, .LANCHOR6 - adrp x1, .LANCHOR115 - str x0, [x1, #:lo12:.LANCHOR115] - ldrh w1, [x23, #:lo12:.LANCHOR24] - ldr w0, [x20, #:lo12:.LANCHOR67] - adrp x20, .LANCHOR116 + adrp x19, .LANCHOR115 + adrp x1, .LANCHOR114 + str x0, [x1, #:lo12:.LANCHOR114] + ldrh w1, [x23, #:lo12:.LANCHOR23] + ldr w0, [x20, #:lo12:.LANCHOR66] + adrp x20, .LANCHOR5 mul w0, w1, w0 bl ftl_malloc - adrp x1, .LANCHOR65 - str x0, [x1, #:lo12:.LANCHOR65] - ldrh w0, [x19, #:lo12:.LANCHOR6] + adrp x1, .LANCHOR64 + str x0, [x1, #:lo12:.LANCHOR64] + ldrh w0, [x20, #:lo12:.LANCHOR5] ubfiz w0, w0, 1, 15 - strh w0, [x20, #:lo12:.LANCHOR116] + strh w0, [x19, #:lo12:.LANCHOR115] and w0, w0, 65534 bl ftl_malloc + adrp x1, .LANCHOR116 + str x0, [x1, #:lo12:.LANCHOR116] + ldrh w0, [x19, #:lo12:.LANCHOR115] + add x0, x0, 547 + lsr x0, x0, 9 + strh w0, [x19, #:lo12:.LANCHOR115] + lsl w0, w0, 9 + bl ftl_malloc adrp x1, .LANCHOR117 str x0, [x1, #:lo12:.LANCHOR117] - ldrh w0, [x20, #:lo12:.LANCHOR116] - add x0, x0, 547 - lsr x0, x0, 9 - strh w0, [x20, #:lo12:.LANCHOR116] - lsl w0, w0, 9 + adrp x1, .LANCHOR46 + add x0, x0, 32 + str x0, [x1, #:lo12:.LANCHOR46] + ldrh w0, [x20, #:lo12:.LANCHOR5] + lsl w0, w0, 1 + bl ftl_malloc + ldr w19, [x21, #:lo12:.LANCHOR29] + adrp x1, .LANCHOR41 + str x0, [x1, #:lo12:.LANCHOR41] + lsl w19, w19, 1 + mov w0, w19 bl ftl_malloc adrp x1, .LANCHOR118 str x0, [x1, #:lo12:.LANCHOR118] - adrp x1, .LANCHOR47 - add x0, x0, 32 - str x0, [x1, #:lo12:.LANCHOR47] - ldrh w0, [x19, #:lo12:.LANCHOR6] - lsl w0, w0, 1 - bl ftl_malloc - ldr w20, [x22, #:lo12:.LANCHOR30] - adrp x1, .LANCHOR42 - str x0, [x1, #:lo12:.LANCHOR42] - lsl w20, w20, 1 - mov w0, w20 + mov w0, w19 bl ftl_malloc + adrp x19, .LANCHOR26 adrp x1, .LANCHOR119 str x0, [x1, #:lo12:.LANCHOR119] - mov w0, w20 + ldrh w0, [x19, #:lo12:.LANCHOR26] + lsl w0, w0, 1 + bl ftl_malloc + adrp x1, .LANCHOR35 + str x0, [x1, #:lo12:.LANCHOR35] + ldrh w0, [x19, #:lo12:.LANCHOR26] + lsl w0, w0, 1 bl ftl_malloc - adrp x20, .LANCHOR27 adrp x1, .LANCHOR120 str x0, [x1, #:lo12:.LANCHOR120] - ldrh w0, [x19, #:lo12:.LANCHOR6] - lsr w0, w0, 3 - add w0, w0, 4 - bl ftl_malloc - adrp x1, .LANCHOR1 - str x0, [x1, #:lo12:.LANCHOR1] - ldrh w0, [x20, #:lo12:.LANCHOR27] - lsl w0, w0, 1 - bl ftl_malloc - adrp x1, .LANCHOR36 - str x0, [x1, #:lo12:.LANCHOR36] - ldrh w0, [x20, #:lo12:.LANCHOR27] - lsl w0, w0, 1 + ldrh w0, [x19, #:lo12:.LANCHOR26] + adrp x19, .LANCHOR27 + lsl w0, w0, 2 bl ftl_malloc adrp x1, .LANCHOR121 str x0, [x1, #:lo12:.LANCHOR121] - ldrh w0, [x20, #:lo12:.LANCHOR27] - adrp x20, .LANCHOR28 + ldrh w0, [x19, #:lo12:.LANCHOR27] lsl w0, w0, 2 bl ftl_malloc + ldrh w2, [x19, #:lo12:.LANCHOR27] adrp x1, .LANCHOR122 + adrp x19, .LANCHOR32 str x0, [x1, #:lo12:.LANCHOR122] - ldrh w0, [x20, #:lo12:.LANCHOR28] - lsl w0, w0, 2 - bl ftl_malloc - ldrh w2, [x20, #:lo12:.LANCHOR28] - adrp x1, .LANCHOR123 - adrp x20, .LANCHOR33 - str x0, [x1, #:lo12:.LANCHOR123] mov w1, 0 lsl w2, w2, 2 bl ftl_memset - adrp x0, .LANCHOR32 - ldrh w0, [x0, #:lo12:.LANCHOR32] + adrp x0, .LANCHOR31 + ldrh w0, [x0, #:lo12:.LANCHOR31] + lsl w0, w0, 2 + bl ftl_malloc + adrp x1, .LANCHOR123 + str x0, [x1, #:lo12:.LANCHOR123] + ldr w0, [x21, #:lo12:.LANCHOR29] lsl w0, w0, 2 bl ftl_malloc adrp x1, .LANCHOR124 str x0, [x1, #:lo12:.LANCHOR124] - ldr w0, [x22, #:lo12:.LANCHOR30] - lsl w0, w0, 2 + ldrh w0, [x19, #:lo12:.LANCHOR32] + lsl w0, w0, 4 + bl ftl_malloc + adrp x1, .LANCHOR54 + str x0, [x1, #:lo12:.LANCHOR54] + ldrh w1, [x19, #:lo12:.LANCHOR32] + adrp x19, .LANCHOR126 + ldrh w0, [x22, #:lo12:.LANCHOR22] + mul w0, w1, w0 bl ftl_malloc adrp x1, .LANCHOR125 str x0, [x1, #:lo12:.LANCHOR125] - ldrh w0, [x20, #:lo12:.LANCHOR33] - lsl w0, w0, 4 - bl ftl_malloc - adrp x1, .LANCHOR55 - str x0, [x1, #:lo12:.LANCHOR55] - ldrh w1, [x20, #:lo12:.LANCHOR33] - adrp x20, .LANCHOR10 - ldrh w0, [x21, #:lo12:.LANCHOR23] - mul w0, w1, w0 - bl ftl_malloc - adrp x1, .LANCHOR126 - str x0, [x1, #:lo12:.LANCHOR126] mov w0, 6 - ldrh w1, [x19, #:lo12:.LANCHOR6] - adrp x19, .LANCHOR127 + ldrh w1, [x20, #:lo12:.LANCHOR5] + adrp x20, .LANCHOR9 mul w0, w1, w0 bl ftl_malloc - adrp x1, .LANCHOR40 - str x0, [x1, #:lo12:.LANCHOR40] - adrp x0, .LANCHOR17 - ldrh w1, [x20, #:lo12:.LANCHOR10] - ldrh w0, [x0, #:lo12:.LANCHOR17] + adrp x1, .LANCHOR39 + str x0, [x1, #:lo12:.LANCHOR39] + adrp x0, .LANCHOR16 + ldrh w1, [x20, #:lo12:.LANCHOR9] + ldrh w0, [x0, #:lo12:.LANCHOR16] add w0, w0, 31 asr w0, w0, 5 - strh w0, [x19, #:lo12:.LANCHOR127] + strh w0, [x19, #:lo12:.LANCHOR126] mul w0, w1, w0 lsl w0, w0, 2 bl ftl_malloc - adrp x1, .LANCHOR37 - ldrh w5, [x19, #:lo12:.LANCHOR127] - add x2, x1, :lo12:.LANCHOR37 - ldrh w7, [x20, #:lo12:.LANCHOR10] + adrp x1, .LANCHOR36 + ldrh w5, [x19, #:lo12:.LANCHOR126] + add x2, x1, :lo12:.LANCHOR36 + ldrh w7, [x20, #:lo12:.LANCHOR9] add x6, x2, 40 mov w3, w5 str x0, [x2, 32] mov x0, 1 -.L315: +.L311: cmp w0, w7 - bcc .L316 + bcc .L312 mov w2, 8 sub w2, w2, w0 add x2, x2, 1 - add x1, x1, :lo12:.LANCHOR37 + add x1, x1, :lo12:.LANCHOR36 mov x3, 0 -.L317: +.L313: add x3, x3, 1 cmp x2, x3 - bne .L318 + bne .L314 mov w0, 0 ldr x23, [sp, 48] ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x29, x30, [sp], 64 ret -.L316: +.L312: ldr x4, [x2, 32] add w0, w0, 1 add x4, x4, x3, uxtw 2 add w3, w3, w5 str x4, [x6], 8 - b .L315 -.L318: + b .L311 +.L314: add x4, x0, x3 add x4, x1, x4, lsl 3 str xzr, [x4, 24] - b .L317 + b .L313 .size FtlMemInit, .-FtlMemInit .section .text.FtlBbt2Bitmap,"ax",@progbits .align 2 @@ -2654,13 +2598,13 @@ FtlBbt2Bitmap: add x29, sp, 0 stp x21, x22, [sp, 32] mov x22, x0 - adrp x0, .LANCHOR127 + adrp x0, .LANCHOR126 stp x23, x24, [sp, 48] - adrp x21, .LANCHOR17 - adrp x23, .LANCHOR128 - ldrh w2, [x0, #:lo12:.LANCHOR127] - add x21, x21, :lo12:.LANCHOR17 - add x23, x23, :lo12:.LANCHOR128 + adrp x21, .LANCHOR16 + adrp x23, .LANCHOR127 + ldrh w2, [x0, #:lo12:.LANCHOR126] + add x21, x21, :lo12:.LANCHOR16 + add x23, x23, :lo12:.LANCHOR127 stp x19, x20, [sp, 16] mov w24, 65535 mov x19, 0 @@ -2669,19 +2613,19 @@ FtlBbt2Bitmap: mov w1, 0 mov x0, x20 bl ftl_memset -.L323: +.L319: ldrh w0, [x22, x19] cmp w0, w24 - beq .L320 + beq .L316 ldrh w1, [x21] cmp w1, w0 - bhi .L322 + bhi .L318 adrp x0, .LC1 mov w2, 74 mov x1, x23 add x0, x0, :lo12:.LC1 bl printf -.L322: +.L318: ldrh w2, [x22, x19] mov w1, 1 add x19, x19, 2 @@ -2692,8 +2636,8 @@ FtlBbt2Bitmap: ldr w1, [x20, x0] orr w1, w1, w2 str w1, [x20, x0] - bne .L323 -.L320: + bne .L319 +.L316: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -2705,11 +2649,11 @@ FtlBbt2Bitmap: .global FtlBbtMemInit .type FtlBbtMemInit, %function FtlBbtMemInit: - adrp x1, .LANCHOR37 - add x0, x1, :lo12:.LANCHOR37 + adrp x1, .LANCHOR36 + add x0, x1, :lo12:.LANCHOR36 mov w2, -1 add x0, x0, 12 - strh w2, [x1, #:lo12:.LANCHOR37] + strh w2, [x1, #:lo12:.LANCHOR36] mov w2, 16 strh wzr, [x0, -6] mov w1, 255 @@ -2721,11 +2665,11 @@ FtlBbtMemInit: .type FtlFreeSysBlkQueueInit, %function FtlFreeSysBlkQueueInit: stp x29, x30, [sp, -16]! - adrp x1, .LANCHOR38 - add x3, x1, :lo12:.LANCHOR38 + adrp x1, .LANCHOR37 + add x3, x1, :lo12:.LANCHOR37 mov w2, 2048 add x29, sp, 0 - strh w0, [x1, #:lo12:.LANCHOR38] + strh w0, [x1, #:lo12:.LANCHOR37] mov w1, 0 strh wzr, [x3, 2] add x0, x3, 8 @@ -2756,21 +2700,21 @@ ftl_free_no_use_map_blk: str x25, [sp, 64] bl ftl_memset mov w0, 0 -.L331: +.L327: ldrh w1, [x19, 6] cmp w1, w0 - bhi .L335 - adrp x0, .LANCHOR20 + bhi .L331 + adrp x0, .LANCHOR19 mov w23, 0 mov w20, 0 - ldrh w1, [x0, #:lo12:.LANCHOR20] + ldrh w1, [x0, #:lo12:.LANCHOR19] ldrh w0, [x19] strh w1, [x21, x0, lsl 1] ldrh w24, [x21] -.L336: +.L332: ldrh w0, [x19, 10] cmp w0, w20 - bhi .L340 + bhi .L336 mov w0, w23 ldr x25, [sp, 64] ldp x19, x20, [sp, 16] @@ -2778,64 +2722,64 @@ ftl_free_no_use_map_blk: ldp x23, x24, [sp, 48] ldp x29, x30, [sp], 80 ret -.L335: +.L331: ubfiz x1, x0, 2, 16 ldr w2, [x20, x1] mov w1, 0 ubfx x2, x2, 10, 16 -.L332: +.L328: ldrh w3, [x19, 10] cmp w3, w1 - bhi .L334 + bhi .L330 add w0, w0, 1 and w0, w0, 65535 - b .L331 -.L334: + b .L327 +.L330: ubfiz x3, x1, 1, 16 ldrh w4, [x22, x3] cmp w4, w2 - bne .L333 - cbz w2, .L333 + bne .L329 + cbz w2, .L329 ldrh w4, [x21, x3] add w4, w4, 1 strh w4, [x21, x3] -.L333: +.L329: add w1, w1, 1 and w1, w1, 65535 - b .L332 -.L340: + b .L328 +.L336: ubfiz x0, x20, 1, 16 ldrh w1, [x21, x0] cmp w24, w1 - bls .L337 + bls .L333 add x25, x22, x0 ldrh w0, [x22, x0] - cbnz w0, .L338 -.L339: + cbnz w0, .L334 +.L335: add w20, w20, 1 and w20, w20, 65535 - b .L336 -.L337: - cbnz w1, .L339 + b .L332 +.L333: + cbnz w1, .L335 add x25, x22, x0 ldrh w0, [x22, x0] - cbz w0, .L339 -.L341: + cbz w0, .L335 +.L337: mov w1, 1 bl FtlFreeSysBlkQueueIn strh wzr, [x25] ldrh w0, [x19, 8] sub w0, w0, #1 strh w0, [x19, 8] - b .L339 -.L342: - mov w24, 0 - b .L341 + b .L335 .L338: + mov w24, 0 + b .L337 +.L334: mov w23, w20 - cbz w1, .L342 + cbz w1, .L338 mov w24, w1 - b .L339 + b .L335 .size ftl_free_no_use_map_blk, .-ftl_free_no_use_map_blk .section .text.FtlL2PDataInit,"ax",@progbits .align 2 @@ -2846,66 +2790,66 @@ FtlL2PDataInit: mov w1, 0 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x19, .LANCHOR120 - adrp x20, .LANCHOR30 + adrp x19, .LANCHOR119 + adrp x20, .LANCHOR29 stp x21, x22, [sp, 32] - ldr x0, [x19, #:lo12:.LANCHOR120] - adrp x22, .LANCHOR23 - ldr w2, [x20, #:lo12:.LANCHOR30] - adrp x21, .LANCHOR33 + ldr x0, [x19, #:lo12:.LANCHOR119] + adrp x22, .LANCHOR22 + ldr w2, [x20, #:lo12:.LANCHOR29] + adrp x21, .LANCHOR32 str x23, [sp, 48] - adrp x23, .LANCHOR126 + adrp x23, .LANCHOR125 lsl w2, w2, 1 bl ftl_memset - ldrh w0, [x21, #:lo12:.LANCHOR33] + ldrh w0, [x21, #:lo12:.LANCHOR32] mov w1, 255 - ldrh w2, [x22, #:lo12:.LANCHOR23] + ldrh w2, [x22, #:lo12:.LANCHOR22] mul w2, w2, w0 - ldr x0, [x23, #:lo12:.LANCHOR126] + ldr x0, [x23, #:lo12:.LANCHOR125] bl ftl_memset - adrp x0, .LANCHOR55 - ldrh w3, [x21, #:lo12:.LANCHOR33] - ldr x6, [x23, #:lo12:.LANCHOR126] + adrp x0, .LANCHOR54 + ldrh w3, [x21, #:lo12:.LANCHOR32] + ldr x6, [x23, #:lo12:.LANCHOR125] mov x1, 0 - ldr x0, [x0, #:lo12:.LANCHOR55] + ldr x0, [x0, #:lo12:.LANCHOR54] mov w2, -1 - ldrh w5, [x22, #:lo12:.LANCHOR23] + ldrh w5, [x22, #:lo12:.LANCHOR22] add x3, x0, x3, lsl 4 -.L352: +.L348: add x4, x1, x5 cmp x0, x3 - bne .L353 - adrp x1, .LANCHOR129 - add x0, x1, :lo12:.LANCHOR129 + bne .L349 + adrp x1, .LANCHOR128 + add x0, x1, :lo12:.LANCHOR128 ldp x21, x22, [sp, 32] - strh w2, [x1, #:lo12:.LANCHOR129] - ldr w1, [x20, #:lo12:.LANCHOR30] + strh w2, [x1, #:lo12:.LANCHOR128] + ldr w1, [x20, #:lo12:.LANCHOR29] strh w1, [x0, 10] mov w1, -3902 strh w1, [x0, 4] - adrp x1, .LANCHOR130 + adrp x1, .LANCHOR129 ldr x23, [sp, 48] strh w2, [x0, 2] - ldrh w1, [x1, #:lo12:.LANCHOR130] + ldrh w1, [x1, #:lo12:.LANCHOR129] strh w1, [x0, 8] - adrp x1, .LANCHOR32 - ldrh w1, [x1, #:lo12:.LANCHOR32] + adrp x1, .LANCHOR31 + ldrh w1, [x1, #:lo12:.LANCHOR31] strh w1, [x0, 6] - adrp x1, .LANCHOR119 - ldr x1, [x1, #:lo12:.LANCHOR119] + adrp x1, .LANCHOR118 + ldr x1, [x1, #:lo12:.LANCHOR118] str x1, [x0, 16] - adrp x1, .LANCHOR125 - ldr x1, [x1, #:lo12:.LANCHOR125] - str x1, [x0, 24] - ldr x1, [x19, #:lo12:.LANCHOR120] - ldp x19, x20, [sp, 16] - str x1, [x0, 32] adrp x1, .LANCHOR124 ldr x1, [x1, #:lo12:.LANCHOR124] + str x1, [x0, 24] + ldr x1, [x19, #:lo12:.LANCHOR119] + ldp x19, x20, [sp, 16] + str x1, [x0, 32] + adrp x1, .LANCHOR123 + ldr x1, [x1, #:lo12:.LANCHOR123] str x1, [x0, 40] ldp x29, x30, [sp], 64 ret -.L353: +.L349: and x1, x1, -4 strh w2, [x0] add x1, x6, x1 @@ -2913,7 +2857,7 @@ FtlL2PDataInit: str x1, [x0, 8] add x0, x0, 16 mov x1, x4 - b .L352 + b .L348 .size FtlL2PDataInit, .-FtlL2PDataInit .section .text.FtlVariablesInit,"ax",@progbits .align 2 @@ -2921,49 +2865,49 @@ FtlL2PDataInit: .type FtlVariablesInit, %function FtlVariablesInit: stp x29, x30, [sp, -32]! - adrp x0, .LANCHOR131 + adrp x0, .LANCHOR130 mov w1, -1 add x29, sp, 0 - strh w1, [x0, #:lo12:.LANCHOR131] - adrp x0, .LANCHOR132 + strh w1, [x0, #:lo12:.LANCHOR130] + adrp x0, .LANCHOR131 mov w1, -1 str x19, [sp, 16] + str wzr, [x0, #:lo12:.LANCHOR131] + adrp x0, .LANCHOR132 + adrp x19, .LANCHOR5 str wzr, [x0, #:lo12:.LANCHOR132] adrp x0, .LANCHOR133 - adrp x19, .LANCHOR6 - str wzr, [x0, #:lo12:.LANCHOR133] - adrp x0, .LANCHOR134 - str w1, [x0, #:lo12:.LANCHOR134] + str w1, [x0, #:lo12:.LANCHOR133] + adrp x0, .LANCHOR34 + mov w1, 0 + strh wzr, [x0, #:lo12:.LANCHOR34] + adrp x0, .LANCHOR26 + ldrh w2, [x0, #:lo12:.LANCHOR26] adrp x0, .LANCHOR35 - mov w1, 0 - strh wzr, [x0, #:lo12:.LANCHOR35] - adrp x0, .LANCHOR27 - ldrh w2, [x0, #:lo12:.LANCHOR27] - adrp x0, .LANCHOR36 - ldr x0, [x0, #:lo12:.LANCHOR36] + ldr x0, [x0, #:lo12:.LANCHOR35] lsl w2, w2, 1 bl ftl_memset - adrp x0, .LANCHOR47 - ldrh w2, [x19, #:lo12:.LANCHOR6] + adrp x0, .LANCHOR46 + ldrh w2, [x19, #:lo12:.LANCHOR5] mov w1, 0 - ldr x0, [x0, #:lo12:.LANCHOR47] + ldr x0, [x0, #:lo12:.LANCHOR46] lsl w2, w2, 1 bl ftl_memset - adrp x0, .LANCHOR117 - ldrh w2, [x19, #:lo12:.LANCHOR6] + adrp x0, .LANCHOR116 + ldrh w2, [x19, #:lo12:.LANCHOR5] mov w1, 0 - ldr x0, [x0, #:lo12:.LANCHOR117] + ldr x0, [x0, #:lo12:.LANCHOR116] lsl w2, w2, 1 bl ftl_memset mov w2, 48 mov w1, 0 - adrp x0, .LANCHOR39 - add x0, x0, :lo12:.LANCHOR39 + adrp x0, .LANCHOR38 + add x0, x0, :lo12:.LANCHOR38 bl ftl_memset mov w2, 512 mov w1, 0 - adrp x0, .LANCHOR135 - add x0, x0, :lo12:.LANCHOR135 + adrp x0, .LANCHOR134 + add x0, x0, :lo12:.LANCHOR134 bl ftl_memset bl FtlGcBufInit bl FtlL2PDataInit @@ -2978,120 +2922,120 @@ FtlVariablesInit: .type SupperBlkListInit, %function SupperBlkListInit: stp x29, x30, [sp, -96]! - adrp x0, .LANCHOR6 + adrp x0, .LANCHOR5 mov w1, 0 add x29, sp, 0 - ldrh w2, [x0, #:lo12:.LANCHOR6] + ldrh w2, [x0, #:lo12:.LANCHOR5] mov w0, 6 stp x23, x24, [sp, 48] - adrp x24, .LANCHOR40 + adrp x24, .LANCHOR39 stp x19, x20, [sp, 16] - adrp x23, .LANCHOR44 + adrp x23, .LANCHOR43 stp x21, x22, [sp, 32] - adrp x22, .LANCHOR48 + adrp x22, .LANCHOR47 mul w2, w2, w0 - ldr x0, [x24, #:lo12:.LANCHOR40] + ldr x0, [x24, #:lo12:.LANCHOR39] stp x25, x26, [sp, 64] - adrp x25, .LANCHOR5 + adrp x25, .LANCHOR4 str x27, [sp, 80] - adrp x26, .LANCHOR13 - add x25, x25, :lo12:.LANCHOR5 - add x26, x26, :lo12:.LANCHOR13 + adrp x26, .LANCHOR12 + add x25, x25, :lo12:.LANCHOR4 + add x26, x26, :lo12:.LANCHOR12 bl ftl_memset mov w21, 0 - adrp x0, .LANCHOR46 + adrp x0, .LANCHOR45 mov w20, 0 mov w19, 0 - strh wzr, [x23, #:lo12:.LANCHOR44] - str xzr, [x0, #:lo12:.LANCHOR46] - adrp x0, .LANCHOR41 - strh wzr, [x22, #:lo12:.LANCHOR48] - adrp x27, .LANCHOR3 - str xzr, [x0, #:lo12:.LANCHOR41] - adrp x0, .LANCHOR43 - str xzr, [x0, #:lo12:.LANCHOR43] -.L358: + strh wzr, [x23, #:lo12:.LANCHOR43] + str xzr, [x0, #:lo12:.LANCHOR45] + adrp x0, .LANCHOR40 + strh wzr, [x22, #:lo12:.LANCHOR47] + adrp x27, .LANCHOR2 + str xzr, [x0, #:lo12:.LANCHOR40] + adrp x0, .LANCHOR42 + str xzr, [x0, #:lo12:.LANCHOR42] +.L354: ldrh w0, [x25] cmp w19, w0 - bcs .L365 - adrp x0, .LANCHOR19 - ldrh w8, [x27, #:lo12:.LANCHOR3] + bcs .L361 + adrp x0, .LANCHOR18 + ldrh w8, [x27, #:lo12:.LANCHOR2] mov x6, 0 mov w5, 0 - ldrh w7, [x0, #:lo12:.LANCHOR19] - b .L366 -.L360: + ldrh w7, [x0, #:lo12:.LANCHOR18] + b .L362 +.L356: ldrb w0, [x26, x6] mov w1, w19 bl V2P_block bl FtlBbmIsBadBlock - cbnz w0, .L359 + cbnz w0, .L355 add w5, w5, w7 and w5, w5, 65535 -.L359: +.L355: add x6, x6, 1 -.L366: +.L362: cmp w8, w6, uxth - bhi .L360 - cbz w5, .L361 + bhi .L356 + cbz w5, .L357 mov w0, 32768 sdiv w5, w0, w5 -.L362: - ldr x1, [x24, #:lo12:.LANCHOR40] +.L358: + ldr x1, [x24, #:lo12:.LANCHOR39] mov w0, 6 umaddl x0, w19, w0, x1 strh w5, [x0, 4] + adrp x0, .LANCHOR50 + ldrh w0, [x0, #:lo12:.LANCHOR50] + cmp w0, w19 + beq .L359 adrp x0, .LANCHOR51 ldrh w0, [x0, #:lo12:.LANCHOR51] cmp w0, w19 - beq .L363 + beq .L359 adrp x0, .LANCHOR52 ldrh w0, [x0, #:lo12:.LANCHOR52] cmp w0, w19 - beq .L363 - adrp x0, .LANCHOR53 - ldrh w0, [x0, #:lo12:.LANCHOR53] - cmp w0, w19 - beq .L363 - adrp x1, .LANCHOR42 + beq .L359 + adrp x1, .LANCHOR41 ubfiz x0, x19, 1, 16 - ldr x1, [x1, #:lo12:.LANCHOR42] + ldr x1, [x1, #:lo12:.LANCHOR41] ldrh w0, [x1, x0] - cbnz w0, .L364 + cbnz w0, .L360 add w21, w21, 1 mov w0, w19 and w21, w21, 65535 bl INSERT_FREE_LIST -.L363: +.L359: add w19, w19, 1 and w19, w19, 65535 - b .L358 -.L361: - adrp x1, .LANCHOR42 + b .L354 +.L357: + adrp x1, .LANCHOR41 ubfiz x0, x19, 1, 16 mov w2, -1 - ldr x1, [x1, #:lo12:.LANCHOR42] + ldr x1, [x1, #:lo12:.LANCHOR41] strh w2, [x1, x0] - b .L362 -.L364: + b .L358 +.L360: add w20, w20, 1 mov w0, w19 and w20, w20, 65535 bl INSERT_DATA_LIST - b .L363 -.L365: - strh w20, [x23, #:lo12:.LANCHOR44] + b .L359 +.L361: + strh w20, [x23, #:lo12:.LANCHOR43] add w20, w20, w21 - strh w21, [x22, #:lo12:.LANCHOR48] + strh w21, [x22, #:lo12:.LANCHOR47] cmp w20, w0 - ble .L367 - adrp x1, .LANCHOR136 + ble .L363 + adrp x1, .LANCHOR135 adrp x0, .LC1 - mov w2, 2210 - add x1, x1, :lo12:.LANCHOR136 + mov w2, 2212 + add x1, x1, :lo12:.LANCHOR135 add x0, x0, :lo12:.LC1 bl printf -.L367: +.L363: mov w0, 0 ldr x27, [sp, 80] ldp x19, x20, [sp, 16] @@ -3107,25 +3051,25 @@ SupperBlkListInit: .type FtlGcPageVarInit, %function FtlGcPageVarInit: stp x29, x30, [sp, -32]! - adrp x0, .LANCHOR68 + adrp x0, .LANCHOR67 mov w1, 255 add x29, sp, 0 - strh wzr, [x0, #:lo12:.LANCHOR68] - adrp x0, .LANCHOR70 - str x19, [sp, 16] - adrp x19, .LANCHOR21 - strh wzr, [x0, #:lo12:.LANCHOR70] + strh wzr, [x0, #:lo12:.LANCHOR67] adrp x0, .LANCHOR69 - ldrh w2, [x19, #:lo12:.LANCHOR21] - ldr x0, [x0, #:lo12:.LANCHOR69] + str x19, [sp, 16] + adrp x19, .LANCHOR20 + strh wzr, [x0, #:lo12:.LANCHOR69] + adrp x0, .LANCHOR68 + ldrh w2, [x19, #:lo12:.LANCHOR20] + ldr x0, [x0, #:lo12:.LANCHOR68] lsl w2, w2, 1 bl ftl_memset - ldrh w2, [x19, #:lo12:.LANCHOR21] + ldrh w2, [x19, #:lo12:.LANCHOR20] mov w0, 12 mov w1, 255 mul w2, w2, w0 - adrp x0, .LANCHOR71 - ldr x0, [x0, #:lo12:.LANCHOR71] + adrp x0, .LANCHOR70 + ldr x0, [x0, #:lo12:.LANCHOR70] bl ftl_memset ldr x19, [sp, 16] ldp x29, x30, [sp], 32 @@ -3144,38 +3088,38 @@ FlashGetBadBlockList: mov w20, w1 mov w1, 255 bl ftl_memset - adrp x0, .LANCHOR78 + adrp x0, .LANCHOR77 mov w1, w20 - ldr x2, [x0, #:lo12:.LANCHOR78] + ldr x2, [x0, #:lo12:.LANCHOR77] mov x0, x19 blr x2 and w0, w0, 65535 cmp w0, 50 - bls .L372 + bls .L368 mov w2, 256 mov w1, 255 mov x0, x19 bl ftl_memset mov w0, 0 -.L372: +.L368: adrp x1, .LANCHOR0+14 ldrh w1, [x1, #:lo12:.LANCHOR0+14] cmp w1, 4 - bne .L376 + bne .L372 mov x1, 0 -.L374: +.L370: cmp w0, w1, uxth - bhi .L375 -.L376: + bhi .L371 +.L372: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 ret -.L375: +.L371: ldrh w2, [x19, x1, lsl 1] lsr w2, w2, 1 strh w2, [x19, x1, lsl 1] add x1, x1, 1 - b .L374 + b .L370 .size FlashGetBadBlockList, .-FlashGetBadBlockList .section .text.ftl_memcpy,"ax",@progbits .align 2 @@ -3198,18 +3142,18 @@ FlashReadPages: add x2, x21, :lo12:.LANCHOR0 str x27, [sp, 80] stp x23, x24, [sp, 48] - adrp x24, .LANCHOR137 + adrp x24, .LANCHOR136 stp x19, x20, [sp, 16] add x23, x0, x1 ldrh w27, [x2, 12] mov x19, x0 stp x25, x26, [sp, 64] - add x24, x24, :lo12:.LANCHOR137 + add x24, x24, :lo12:.LANCHOR136 adrp x25, .LC1 add x25, x25, :lo12:.LC1 -.L380: +.L376: cmp x23, x19 - bne .L393 + bne .L389 ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -3218,38 +3162,38 @@ FlashReadPages: ldr x27, [sp, 80] ldp x29, x30, [sp], 112 ret -.L393: +.L389: ldr x0, [x19, 8] - cbz x0, .L381 + cbz x0, .L377 ldr x0, [x19, 16] - cbnz x0, .L382 -.L381: + cbnz x0, .L378 +.L377: mov w2, 90 mov x1, x24 mov x0, x25 bl printf -.L382: +.L378: ldr w0, [x19, 4] add x2, x29, 104 add x1, x29, 108 bl l2p_addr_tran.isra.0 ldr w0, [x29, 104] cmp w0, 3 - bls .L383 + bls .L379 mov w0, -1 str w0, [x19] -.L384: +.L380: add x19, x19, 32 - b .L380 -.L383: + b .L376 +.L379: ldr x20, [x19, 8] - adrp x26, .LANCHOR111 + adrp x26, .LANCHOR110 tst x20, 63 - beq .L385 - ldr x20, [x26, #:lo12:.LANCHOR111] -.L385: - adrp x22, .LANCHOR78 - add x22, x22, :lo12:.LANCHOR78 + beq .L381 + ldr x20, [x26, #:lo12:.LANCHOR110] +.L381: + adrp x22, .LANCHOR77 + add x22, x22, :lo12:.LANCHOR77 ldr w1, [x29, 108] mov x2, x20 ldr x3, [x19, 16] @@ -3259,7 +3203,7 @@ FlashReadPages: add x0, x21, :lo12:.LANCHOR0 ldrh w0, [x0, 14] cmp w0, 4 - bne .L387 + bne .L383 ldrb w0, [x29, 104] add x2, x20, 2048 ldr x4, [x22, 24] @@ -3269,65 +3213,65 @@ FlashReadPages: add x3, x3, 8 blr x4 cmn w0, #1 - beq .L388 + beq .L384 ldr x1, [x19, 16] ldr w2, [x1, 12] cmn w2, #1 - bne .L389 + bne .L385 ldr w2, [x1, 8] cmn w2, #1 - bne .L389 + bne .L385 ldr w1, [x1] cmn w1, #1 - beq .L389 -.L388: + beq .L385 +.L384: mov w1, -1 str w1, [x19] -.L389: +.L385: ldr w1, [x19] cmn w1, #1 - beq .L390 + beq .L386 cmp w0, 256 - bne .L390 + bne .L386 str w0, [x19] -.L390: +.L386: ldr w3, [x19] cmp w3, 256 ccmn w3, #1, 4, ne - bne .L387 + bne .L383 ldr w1, [x19, 4] adrp x0, .LC11 ldr w2, [x29, 108] add x0, x0, :lo12:.LC11 bl printf ldr x1, [x19, 8] - cbz x1, .L392 + cbz x1, .L388 mov w3, 4 adrp x0, .LC12 mov w2, w3 add x0, x0, :lo12:.LC12 bl rknand_print_hex -.L392: +.L388: ldr x1, [x19, 16] - cbz x1, .L387 + cbz x1, .L383 mov w3, 4 adrp x0, .LC13 mov w2, w3 add x0, x0, :lo12:.LC13 bl rknand_print_hex -.L387: - ldr x0, [x26, #:lo12:.LANCHOR111] +.L383: + ldr x0, [x26, #:lo12:.LANCHOR110] cmp x20, x0 - bne .L384 + bne .L380 ldr x0, [x19, 8] cmp x20, x0 - beq .L384 - adrp x1, .LANCHOR12 - ldrh w2, [x1, #:lo12:.LANCHOR12] + beq .L380 + adrp x1, .LANCHOR11 + ldrh w2, [x1, #:lo12:.LANCHOR11] mov x1, x20 lsl w2, w2, 9 bl ftl_memcpy - b .L384 + b .L380 .size FlashReadPages, .-FlashReadPages .section .text.FtlLoadFactoryBbt,"ax",@progbits .align 2 @@ -3335,34 +3279,34 @@ FlashReadPages: .type FtlLoadFactoryBbt, %function FtlLoadFactoryBbt: stp x29, x30, [sp, -112]! - adrp x2, .LANCHOR106 - adrp x0, .LANCHOR138 - add x1, x0, :lo12:.LANCHOR138 + adrp x2, .LANCHOR105 + adrp x0, .LANCHOR137 + add x1, x0, :lo12:.LANCHOR137 add x29, sp, 0 - ldr x2, [x2, #:lo12:.LANCHOR106] + ldr x2, [x2, #:lo12:.LANCHOR105] stp x21, x22, [sp, 32] mov x22, x0 stp x25, x26, [sp, 64] - adrp x26, .LANCHOR17 + adrp x26, .LANCHOR16 stp x27, x28, [sp, 80] - add x28, x26, :lo12:.LANCHOR17 + add x28, x26, :lo12:.LANCHOR16 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR37 + adrp x20, .LANCHOR36 stp x23, x24, [sp, 48] - add x20, x20, :lo12:.LANCHOR37 + add x20, x20, :lo12:.LANCHOR36 str x2, [x1, 8] - adrp x2, .LANCHOR114 - adrp x23, .LANCHOR10 + adrp x2, .LANCHOR113 + adrp x23, .LANCHOR9 add x20, x20, 12 - ldr x25, [x2, #:lo12:.LANCHOR114] - add x23, x23, :lo12:.LANCHOR10 + ldr x25, [x2, #:lo12:.LANCHOR113] + add x23, x23, :lo12:.LANCHOR9 mov w21, 0 mov w27, -1 str x25, [x1, 16] -.L420: +.L416: ldrh w0, [x23] cmp w21, w0 - bcc .L425 + bcc .L421 ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -3371,18 +3315,18 @@ FtlLoadFactoryBbt: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 112 ret -.L425: - ldrh w19, [x26, #:lo12:.LANCHOR17] - add x24, x22, :lo12:.LANCHOR138 +.L421: + ldrh w19, [x26, #:lo12:.LANCHOR16] + add x24, x22, :lo12:.LANCHOR137 strh w27, [x20] mov w3, 61664 sub w19, w19, #1 and w19, w19, 65535 -.L421: +.L417: ldrh w0, [x28] sub w1, w0, #15 cmp w1, w19 - bgt .L423 + bgt .L419 madd w0, w0, w21, w19 mov w2, 1 str w3, [x29, 108] @@ -3394,19 +3338,19 @@ FtlLoadFactoryBbt: ldr w0, [x24] ldr w3, [x29, 108] cmn w0, #1 - beq .L422 + beq .L418 ldrh w0, [x25] cmp w0, w3 - bne .L422 + bne .L418 strh w19, [x20] -.L423: +.L419: add w21, w21, 1 add x20, x20, 2 - b .L420 -.L422: + b .L416 +.L418: sub w19, w19, #1 and w19, w19, 65535 - b .L421 + b .L417 .size FtlLoadFactoryBbt, .-FtlLoadFactoryBbt .section .text.FtlGetLastWrittenPage,"ax",@progbits .align 2 @@ -3420,15 +3364,15 @@ FtlGetLastWrittenPage: mov w23, w1 stp x19, x20, [sp, 16] stp x21, x22, [sp, 32] - bne .L431 - adrp x1, .LANCHOR20 - ldrh w19, [x1, #:lo12:.LANCHOR20] -.L432: - adrp x1, .LANCHOR112 + bne .L427 + adrp x1, .LANCHOR19 + ldrh w19, [x1, #:lo12:.LANCHOR19] +.L428: + adrp x1, .LANCHOR111 sub w19, w19, #1 sxth w19, w19 lsl w21, w0, 10 - ldr x1, [x1, #:lo12:.LANCHOR112] + ldr x1, [x1, #:lo12:.LANCHOR111] orr w0, w19, w21 str x1, [x29, 72] add x1, x29, 96 @@ -3440,24 +3384,24 @@ FtlGetLastWrittenPage: bl FlashReadPages ldr w0, [x29, 96] cmn w0, #1 - bne .L433 + bne .L429 mov w22, 0 mov w24, 2 -.L434: +.L430: cmp w22, w19 - ble .L437 -.L433: + ble .L433 +.L429: mov w0, w19 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] ldp x29, x30, [sp], 160 ret -.L431: - adrp x1, .LANCHOR19 - ldrh w19, [x1, #:lo12:.LANCHOR19] - b .L432 -.L437: +.L427: + adrp x1, .LANCHOR18 + ldrh w19, [x1, #:lo12:.LANCHOR18] + b .L428 +.L433: add w20, w22, w19 mov w2, w23 mov w1, 1 @@ -3469,20 +3413,20 @@ FtlGetLastWrittenPage: bl FlashReadPages ldr w0, [x29, 96] cmn w0, #1 - bne .L435 + bne .L431 ldr w0, [x29, 100] cmn w0, #1 - bne .L435 + bne .L431 ldr w0, [x29, 64] cmn w0, #1 - beq .L435 + beq .L431 sub w19, w20, #1 sxth w19, w19 - b .L434 -.L435: + b .L430 +.L431: add w20, w20, 1 sxth w22, w20 - b .L434 + b .L430 .size FtlGetLastWrittenPage, .-FtlGetLastWrittenPage .section .text.FtlScanSysBlk,"ax",@progbits .align 2 @@ -3493,83 +3437,83 @@ FtlScanSysBlk: mov w1, 0 add x29, sp, 0 stp x25, x26, [sp, 64] - adrp x25, .LANCHOR125 + adrp x25, .LANCHOR124 stp x21, x22, [sp, 32] - adrp x21, .LANCHOR30 - ldr x0, [x25, #:lo12:.LANCHOR125] - adrp x22, .LANCHOR122 - ldr w2, [x21, #:lo12:.LANCHOR30] + adrp x21, .LANCHOR29 + ldr x0, [x25, #:lo12:.LANCHOR124] + adrp x22, .LANCHOR121 + ldr w2, [x21, #:lo12:.LANCHOR29] stp x19, x20, [sp, 16] - adrp x20, .LANCHOR130 + adrp x20, .LANCHOR129 stp x23, x24, [sp, 48] - adrp x23, .LANCHOR35 + adrp x23, .LANCHOR34 stp x27, x28, [sp, 80] - adrp x27, .LANCHOR119 + adrp x27, .LANCHOR118 lsl w2, w2, 2 - strh wzr, [x20, #:lo12:.LANCHOR130] - strh wzr, [x23, #:lo12:.LANCHOR35] + strh wzr, [x20, #:lo12:.LANCHOR129] + strh wzr, [x23, #:lo12:.LANCHOR34] bl ftl_memset - ldr x0, [x27, #:lo12:.LANCHOR119] + ldr x0, [x27, #:lo12:.LANCHOR118] mov w1, 0 - ldr w2, [x21, #:lo12:.LANCHOR30] - adrp x19, .LANCHOR27 - adrp x28, .LANCHOR36 - adrp x24, .LANCHOR139 + ldr w2, [x21, #:lo12:.LANCHOR29] + adrp x19, .LANCHOR26 + adrp x28, .LANCHOR35 + adrp x24, .LANCHOR138 lsl w2, w2, 1 bl ftl_memset - ldr x0, [x22, #:lo12:.LANCHOR122] + ldr x0, [x22, #:lo12:.LANCHOR121] mov w1, 0 - ldrh w2, [x19, #:lo12:.LANCHOR27] + ldrh w2, [x19, #:lo12:.LANCHOR26] lsl w2, w2, 2 bl ftl_memset - ldr x0, [x28, #:lo12:.LANCHOR36] + ldr x0, [x28, #:lo12:.LANCHOR35] mov w1, 0 - ldrh w2, [x19, #:lo12:.LANCHOR27] + ldrh w2, [x19, #:lo12:.LANCHOR26] lsl w2, w2, 1 bl ftl_memset mov w2, 16 mov w1, 255 - add x0, x24, :lo12:.LANCHOR139 + add x0, x24, :lo12:.LANCHOR138 bl ftl_memset - adrp x0, .LANCHOR5 + adrp x0, .LANCHOR4 stp x22, x25, [x29, 144] str x27, [x29, 160] - ldrh w0, [x0, #:lo12:.LANCHOR5] + ldrh w0, [x0, #:lo12:.LANCHOR4] str w0, [x29, 172] - adrp x0, .LANCHOR6 - add x0, x0, :lo12:.LANCHOR6 + adrp x0, .LANCHOR5 + add x0, x0, :lo12:.LANCHOR5 str x0, [x29, 120] - adrp x0, .LANCHOR82 - add x0, x0, :lo12:.LANCHOR82 + adrp x0, .LANCHOR81 + add x0, x0, :lo12:.LANCHOR81 str x0, [x29, 112] -.L443: +.L439: ldr x0, [x29, 120] ldr w1, [x29, 172] ldrh w0, [x0] cmp w0, w1 - bls .L483 - adrp x0, .LANCHOR3 - adrp x25, .LANCHOR103 - adrp x6, .LANCHOR13 + bls .L479 + adrp x0, .LANCHOR2 + adrp x25, .LANCHOR102 + adrp x6, .LANCHOR12 mov x5, 0 - ldrh w12, [x0, #:lo12:.LANCHOR3] - adrp x0, .LANCHOR64 - ldr x7, [x25, #:lo12:.LANCHOR103] + ldrh w12, [x0, #:lo12:.LANCHOR2] + adrp x0, .LANCHOR63 + ldr x7, [x25, #:lo12:.LANCHOR102] mov w22, 0 - ldr x11, [x0, #:lo12:.LANCHOR64] - adrp x0, .LANCHOR65 - add x6, x6, :lo12:.LANCHOR13 - ldr x10, [x0, #:lo12:.LANCHOR65] - adrp x0, .LANCHOR24 - ldrh w8, [x0, #:lo12:.LANCHOR24] - b .L484 -.L445: + ldr x11, [x0, #:lo12:.LANCHOR63] + adrp x0, .LANCHOR64 + add x6, x6, :lo12:.LANCHOR12 + ldr x10, [x0, #:lo12:.LANCHOR64] + adrp x0, .LANCHOR23 + ldrh w8, [x0, #:lo12:.LANCHOR23] + b .L480 +.L441: ldrh w1, [x29, 172] ldrb w0, [x6, x5] bl V2P_block and w4, w0, 65535 bl FtlBbmIsBadBlock - cbnz w0, .L444 + cbnz w0, .L440 ubfiz x0, x22, 5, 16 mul w1, w22, w8 add x0, x7, x0 @@ -3580,19 +3524,19 @@ FtlScanSysBlk: add x1, x10, x1, sxtw 2 str w4, [x0, 4] stp x11, x1, [x0, 8] -.L444: +.L440: add x5, x5, 1 -.L484: +.L480: cmp w12, w5, uxth - bhi .L445 - cbnz w22, .L446 -.L482: + bhi .L441 + cbnz w22, .L442 +.L478: ldr w0, [x29, 172] add w26, w0, 1 and w0, w26, 65535 str w0, [x29, 172] - b .L443 -.L446: + b .L439 +.L442: mov w1, w22 mov w2, 1 mov x0, x7 @@ -3600,23 +3544,23 @@ FtlScanSysBlk: ubfiz x0, x22, 5, 16 mov x22, 0 str x0, [x29, 128] - adrp x0, .LANCHOR140 - add x0, x0, :lo12:.LANCHOR140 + adrp x0, .LANCHOR139 + add x0, x0, :lo12:.LANCHOR139 str x0, [x29, 136] -.L481: - ldr x0, [x25, #:lo12:.LANCHOR103] +.L477: + ldr x0, [x25, #:lo12:.LANCHOR102] add x1, x0, x22 ldr w0, [x0, x22] ldr w3, [x1, 4] cmn w0, #1 ldr x27, [x1, 16] ubfx x26, x3, 10, 16 - bne .L449 + bne .L445 mov w5, 16 mov w7, 65535 -.L451: - ldr x0, [x25, #:lo12:.LANCHOR103] - add x6, x25, :lo12:.LANCHOR103 +.L447: + ldr x0, [x25, #:lo12:.LANCHOR102] + add x6, x25, :lo12:.LANCHOR102 mov w2, 1 str w7, [x29, 100] add x0, x0, x22 @@ -3632,135 +3576,135 @@ FtlScanSysBlk: ldr w5, [x29, 168] cmp w0, w7 ldr x6, [x29, 104] - bne .L448 + bne .L444 ldr x0, [x6] mov w1, -1 str w1, [x0, x22] ldr x0, [x6] ldr w0, [x0, x22] cmp w0, w1 - bne .L449 -.L450: + bne .L445 +.L446: mov w1, 1 - b .L520 -.L448: - ldr x0, [x25, #:lo12:.LANCHOR103] + b .L516 +.L444: + ldr x0, [x25, #:lo12:.LANCHOR102] ldr w0, [x0, x22] cmn w0, #1 - bne .L449 + bne .L445 sub w5, w5, #1 ands w5, w5, 65535 - bne .L451 - b .L450 -.L449: - adrp x0, .LANCHOR82 - ldr w1, [x0, #:lo12:.LANCHOR82] + bne .L447 + b .L446 +.L445: + adrp x0, .LANCHOR81 + ldr w1, [x0, #:lo12:.LANCHOR81] ldr w0, [x27, 4] cmn w1, #1 - beq .L452 + beq .L448 cmp w1, w0 - bhi .L453 -.L452: + bhi .L449 +.L448: cmn w0, #1 - beq .L453 + beq .L449 ldr x2, [x29, 112] add w1, w0, 1 str w1, [x2] -.L453: +.L449: ldrh w1, [x27] mov w2, 61604 cmp w1, w2 - beq .L455 - bhi .L456 + beq .L451 + bhi .L452 mov w0, 61574 cmp w1, w0 - beq .L457 -.L454: + beq .L453 +.L450: ldr x0, [x29, 128] add x22, x22, 32 cmp x0, x22 - bne .L481 - b .L482 -.L456: + bne .L477 + b .L478 +.L452: mov w0, 61634 cmp w1, w0 - beq .L458 + beq .L454 mov w0, 65535 cmp w1, w0 - bne .L454 + bne .L450 mov w1, 0 -.L520: +.L516: mov w0, w26 bl FtlFreeSysBlkQueueIn - b .L454 -.L458: - ldrh w1, [x20, #:lo12:.LANCHOR130] - ldr w0, [x21, #:lo12:.LANCHOR30] + b .L450 +.L454: + ldrh w1, [x20, #:lo12:.LANCHOR129] + ldr w0, [x21, #:lo12:.LANCHOR29] cmp w1, w0 - bls .L460 + bls .L456 ldr x1, [x29, 136] adrp x0, .LC1 mov w2, 1225 add x0, x0, :lo12:.LC1 bl printf -.L460: - ldr w6, [x21, #:lo12:.LANCHOR30] +.L456: + ldr w6, [x21, #:lo12:.LANCHOR29] ldr x3, [x29, 152] - ldrh w1, [x20, #:lo12:.LANCHOR130] + ldrh w1, [x20, #:lo12:.LANCHOR129] and w2, w6, 65535 sub w0, w2, #1 sub w2, w2, w1 sxth x0, w0 sub w2, w2, #1 - ldr x5, [x3, #:lo12:.LANCHOR125] + ldr x5, [x3, #:lo12:.LANCHOR124] sxth w2, w2 -.L461: +.L457: cmp w0, w2 - bgt .L467 - tbz w0, #31, .L501 - b .L454 -.L467: + bgt .L463 + tbz w0, #31, .L497 + b .L450 +.L463: sxtw x8, w0 ldr w11, [x27, 4] lsl x7, x8, 2 add x10, x5, x7 ldr w7, [x5, x7] cmp w11, w7 - bls .L462 + bls .L458 ldr w2, [x5] - cbnz w2, .L463 + cbnz w2, .L459 cmp w6, w1 - beq .L463 + beq .L459 add w1, w1, 1 - strh w1, [x20, #:lo12:.LANCHOR130] -.L463: + strh w1, [x20, #:lo12:.LANCHOR129] +.L459: ldr x1, [x29, 160] - ldr x6, [x1, #:lo12:.LANCHOR119] + ldr x6, [x1, #:lo12:.LANCHOR118] mov w1, 0 -.L464: +.L460: cmp w1, w0 - bne .L465 + bne .L461 ldr w1, [x27, 4] str w1, [x10] strh w26, [x6, x8, lsl 1] - tbnz w0, #31, .L454 - ldrh w1, [x20, #:lo12:.LANCHOR130] - ldr w2, [x21, #:lo12:.LANCHOR30] + tbnz w0, #31, .L450 + ldrh w1, [x20, #:lo12:.LANCHOR129] + ldr w2, [x21, #:lo12:.LANCHOR29] sub w2, w2, w1 sub w2, w2, #1 cmp w0, w2, sxth - bgt .L454 -.L501: + bgt .L450 +.L497: add w1, w1, 1 - strh w1, [x20, #:lo12:.LANCHOR130] + strh w1, [x20, #:lo12:.LANCHOR129] ldr w1, [x27, 4] str w1, [x5, x0, lsl 2] ldr x1, [x29, 160] - ldr x1, [x1, #:lo12:.LANCHOR119] -.L519: + ldr x1, [x1, #:lo12:.LANCHOR118] +.L515: strh w26, [x1, x0, lsl 1] - b .L454 -.L465: + b .L450 +.L461: sxtw x2, w1 add w1, w1, 1 lsl x7, x2, 2 @@ -3772,69 +3716,69 @@ FtlScanSysBlk: add x7, x6, x2 ldrh w7, [x7, 2] strh w7, [x6, x2] - b .L464 -.L462: + b .L460 +.L458: sub w0, w0, #1 sxth x0, w0 - b .L461 -.L457: - ldrh w1, [x23, #:lo12:.LANCHOR35] - ldrh w0, [x19, #:lo12:.LANCHOR27] + b .L457 +.L453: + ldrh w1, [x23, #:lo12:.LANCHOR34] + ldrh w0, [x19, #:lo12:.LANCHOR26] cmp w1, w0 - bls .L470 + bls .L466 ldr x1, [x29, 136] adrp x0, .LC1 mov w2, 1266 add x0, x0, :lo12:.LC1 bl printf -.L470: - ldrh w6, [x19, #:lo12:.LANCHOR27] - ldrh w2, [x23, #:lo12:.LANCHOR35] +.L466: + ldrh w6, [x19, #:lo12:.LANCHOR26] + ldrh w2, [x23, #:lo12:.LANCHOR34] sub w1, w6, #1 sxth x0, w1 sub w5, w1, w2 ldr x1, [x29, 144] - ldr x1, [x1, #:lo12:.LANCHOR122] -.L471: + ldr x1, [x1, #:lo12:.LANCHOR121] +.L467: cmp w0, w5 - ble .L476 + ble .L472 sxtw x7, w0 ldr w11, [x27, 4] lsl x8, x7, 2 add x10, x1, x8 ldr w8, [x1, x8] cmp w11, w8 - bls .L472 + bls .L468 ldr w5, [x1] - cbnz w5, .L473 + cbnz w5, .L469 cmp w6, w2 - beq .L473 + beq .L469 add w2, w2, 1 - strh w2, [x23, #:lo12:.LANCHOR35] -.L473: - ldr x6, [x28, #:lo12:.LANCHOR36] + strh w2, [x23, #:lo12:.LANCHOR34] +.L469: + ldr x6, [x28, #:lo12:.LANCHOR35] mov w2, 0 -.L474: +.L470: cmp w2, w0 - bne .L475 + bne .L471 ldr w2, [x27, 4] str w2, [x10] strh w26, [x6, x7, lsl 1] -.L476: - tbnz w0, #31, .L454 - ldrh w2, [x19, #:lo12:.LANCHOR27] - ldrh w5, [x23, #:lo12:.LANCHOR35] +.L472: + tbnz w0, #31, .L450 + ldrh w2, [x19, #:lo12:.LANCHOR26] + ldrh w5, [x23, #:lo12:.LANCHOR34] sub w2, w2, #1 sub w2, w2, w5 cmp w0, w2, sxth - bgt .L454 + bgt .L450 add w5, w5, 1 ldr w2, [x27, 4] - strh w5, [x23, #:lo12:.LANCHOR35] + strh w5, [x23, #:lo12:.LANCHOR34] str w2, [x1, x0, lsl 2] - ldr x1, [x28, #:lo12:.LANCHOR36] - b .L519 -.L475: + ldr x1, [x28, #:lo12:.LANCHOR35] + b .L515 +.L471: sxtw x5, w2 add w2, w2, 1 lsl x8, x5, 2 @@ -3846,61 +3790,61 @@ FtlScanSysBlk: add x8, x6, x5 ldrh w8, [x8, 2] strh w8, [x6, x5] - b .L474 -.L472: + b .L470 +.L468: sub w0, w0, #1 sxth x0, w0 - b .L471 -.L455: - ldrh w5, [x24, #:lo12:.LANCHOR139] + b .L467 +.L451: + ldrh w5, [x24, #:lo12:.LANCHOR138] mov w1, 65535 - add x2, x24, :lo12:.LANCHOR139 + add x2, x24, :lo12:.LANCHOR138 cmp w5, w1 - bne .L478 - strh w26, [x24, #:lo12:.LANCHOR139] + bne .L474 + strh w26, [x24, #:lo12:.LANCHOR138] str w0, [x2, 8] - b .L454 -.L478: + b .L450 +.L474: ldrh w0, [x2, 4] cmp w0, w1 - beq .L479 + beq .L475 mov w1, 1 bl FtlFreeSysBlkQueueIn -.L479: - add x0, x24, :lo12:.LANCHOR139 +.L475: + add x0, x24, :lo12:.LANCHOR138 ldr w1, [x27, 4] ldr w2, [x0, 8] cmp w2, w1 - bcs .L480 - ldrh w2, [x24, #:lo12:.LANCHOR139] + bcs .L476 + ldrh w2, [x24, #:lo12:.LANCHOR138] strh w2, [x0, 4] - strh w26, [x24, #:lo12:.LANCHOR139] + strh w26, [x24, #:lo12:.LANCHOR138] str w1, [x0, 8] - b .L454 -.L480: + b .L450 +.L476: strh w26, [x0, 4] - b .L454 -.L483: + b .L450 +.L479: ldr x0, [x29, 160] - ldr x2, [x0, #:lo12:.LANCHOR119] + ldr x2, [x0, #:lo12:.LANCHOR118] ldrh w0, [x2] - cbz w0, .L485 -.L488: - ldr x1, [x28, #:lo12:.LANCHOR36] + cbz w0, .L481 +.L484: + ldr x1, [x28, #:lo12:.LANCHOR35] ldrh w0, [x1] - cbz w0, .L486 -.L487: - ldrh w1, [x20, #:lo12:.LANCHOR130] - ldr w0, [x21, #:lo12:.LANCHOR30] + cbz w0, .L482 +.L483: + ldrh w1, [x20, #:lo12:.LANCHOR129] + ldr w0, [x21, #:lo12:.LANCHOR29] cmp w1, w0 - bls .L517 - adrp x1, .LANCHOR140 + bls .L513 + adrp x1, .LANCHOR139 adrp x0, .LC1 mov w2, 1391 - add x1, x1, :lo12:.LANCHOR140 + add x1, x1, :lo12:.LANCHOR139 add x0, x0, :lo12:.LC1 bl printf -.L517: +.L513: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -3909,24 +3853,24 @@ FtlScanSysBlk: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 176 ret -.L485: - ldrh w0, [x20, #:lo12:.LANCHOR130] - cbz w0, .L488 - ldr w1, [x21, #:lo12:.LANCHOR30] +.L481: + ldrh w0, [x20, #:lo12:.LANCHOR129] + cbz w0, .L484 + ldr w1, [x21, #:lo12:.LANCHOR29] mov w0, 0 -.L489: +.L485: cmp w0, w1 - bcs .L488 + bcs .L484 ldrh w3, [x2, w0, sxtw 1] - cbz w3, .L490 + cbz w3, .L486 ldr x1, [x29, 152] - add x7, x21, :lo12:.LANCHOR30 - ldr x4, [x1, #:lo12:.LANCHOR125] + add x7, x21, :lo12:.LANCHOR29 + ldr x4, [x1, #:lo12:.LANCHOR124] mov w1, w0 -.L491: +.L487: ldr w3, [x7] cmp w1, w3 - bcs .L488 + bcs .L484 sxtw x6, w1 sub w3, w1, w0 lsl x5, x6, 1 @@ -3938,29 +3882,29 @@ FtlScanSysBlk: strh w8, [x2, x3, lsl 1] str w6, [x4, x3, lsl 2] strh wzr, [x2, x5] - b .L491 -.L490: + b .L487 +.L486: add w0, w0, 1 sxth w0, w0 - b .L489 -.L486: - ldrh w0, [x23, #:lo12:.LANCHOR35] - cbz w0, .L487 - ldrh w2, [x19, #:lo12:.LANCHOR27] + b .L485 +.L482: + ldrh w0, [x23, #:lo12:.LANCHOR34] + cbz w0, .L483 + ldrh w2, [x19, #:lo12:.LANCHOR26] mov w0, 0 -.L496: +.L492: mov w6, w0 cmp w0, w2 - bge .L487 + bge .L483 ldrh w3, [x1, w0, sxtw 1] - cbz w3, .L497 + cbz w3, .L493 ldr x2, [x29, 144] - add x19, x19, :lo12:.LANCHOR27 - ldr x3, [x2, #:lo12:.LANCHOR122] -.L498: + add x19, x19, :lo12:.LANCHOR26 + ldr x3, [x2, #:lo12:.LANCHOR121] +.L494: ldrh w2, [x19] cmp w0, w2 - bge .L487 + bge .L483 sxtw x5, w0 sub w2, w0, w6 lsl x4, x5, 1 @@ -3972,11 +3916,11 @@ FtlScanSysBlk: strh w7, [x1, x2, lsl 1] str w5, [x3, x2, lsl 2] strh wzr, [x1, x4] - b .L498 -.L497: + b .L494 +.L493: add w0, w0, 1 sxth w0, w0 - b .L496 + b .L492 .size FtlScanSysBlk, .-FtlScanSysBlk .section .text.FtlLoadBbt,"ax",@progbits .align 2 @@ -3986,29 +3930,29 @@ FtlLoadBbt: stp x29, x30, [sp, -80]! add x29, sp, 0 stp x23, x24, [sp, 48] - adrp x23, .LANCHOR106 + adrp x23, .LANCHOR105 stp x19, x20, [sp, 16] - adrp x24, .LANCHOR17 + adrp x24, .LANCHOR16 stp x21, x22, [sp, 32] - adrp x22, .LANCHOR138 - add x20, x22, :lo12:.LANCHOR138 - ldr x0, [x23, #:lo12:.LANCHOR106] + adrp x22, .LANCHOR137 + add x20, x22, :lo12:.LANCHOR137 + ldr x0, [x23, #:lo12:.LANCHOR105] str x25, [sp, 64] mov w25, 61649 str x0, [x20, 8] - adrp x0, .LANCHOR114 - ldr x21, [x0, #:lo12:.LANCHOR114] + adrp x0, .LANCHOR113 + ldr x21, [x0, #:lo12:.LANCHOR113] str x21, [x20, 16] bl FtlBbtMemInit - ldrh w19, [x24, #:lo12:.LANCHOR17] - add x24, x24, :lo12:.LANCHOR17 + ldrh w19, [x24, #:lo12:.LANCHOR16] + add x24, x24, :lo12:.LANCHOR16 sub w19, w19, #1 and w19, w19, 65535 -.L522: +.L518: ldrh w0, [x24] sub w0, w0, #15 cmp w0, w19 - bgt .L525 + bgt .L521 lsl w0, w19, 10 mov w2, 1 str w0, [x20, 4] @@ -4017,7 +3961,7 @@ FtlLoadBbt: bl FlashReadPages ldr w0, [x20] cmn w0, #1 - bne .L523 + bne .L519 ldr w0, [x20, 4] mov w2, 1 mov w1, w2 @@ -4025,136 +3969,136 @@ FtlLoadBbt: str w0, [x20, 4] mov x0, x20 bl FlashReadPages -.L523: +.L519: ldr w0, [x20] cmn w0, #1 - beq .L524 + beq .L520 ldrh w0, [x21] cmp w0, w25 - bne .L524 - adrp x1, .LANCHOR37 - add x0, x1, :lo12:.LANCHOR37 - strh w19, [x1, #:lo12:.LANCHOR37] + bne .L520 + adrp x1, .LANCHOR36 + add x0, x1, :lo12:.LANCHOR36 + strh w19, [x1, #:lo12:.LANCHOR36] ldr w1, [x21, 4] str w1, [x0, 8] ldrh w1, [x21, 8] strh w1, [x0, 4] -.L525: - adrp x19, .LANCHOR37 +.L521: + adrp x19, .LANCHOR36 mov w0, 65535 - add x20, x19, :lo12:.LANCHOR37 - ldrh w1, [x19, #:lo12:.LANCHOR37] + add x20, x19, :lo12:.LANCHOR36 + ldrh w1, [x19, #:lo12:.LANCHOR36] cmp w1, w0 - beq .L539 + beq .L535 ldrh w1, [x20, 4] cmp w1, w0 - beq .L529 - add x0, x22, :lo12:.LANCHOR138 + beq .L525 + add x0, x22, :lo12:.LANCHOR137 lsl w1, w1, 10 mov w2, 1 str w1, [x0, 4] mov w1, w2 bl FlashReadPages - ldr w0, [x22, #:lo12:.LANCHOR138] + ldr w0, [x22, #:lo12:.LANCHOR137] cmn w0, #1 - beq .L529 + beq .L525 ldrh w1, [x21] mov w0, 61649 cmp w1, w0 - bne .L529 + bne .L525 ldr w1, [x20, 8] ldr w0, [x21, 4] cmp w0, w1 - bls .L529 + bls .L525 ldrh w1, [x20, 4] str w0, [x20, 8] ldrh w0, [x21, 8] - strh w1, [x19, #:lo12:.LANCHOR37] + strh w1, [x19, #:lo12:.LANCHOR36] strh w0, [x20, 4] -.L529: - ldrh w0, [x19, #:lo12:.LANCHOR37] - add x24, x19, :lo12:.LANCHOR37 +.L525: + ldrh w0, [x19, #:lo12:.LANCHOR36] + add x24, x19, :lo12:.LANCHOR36 mov w1, 1 mov w25, 61649 bl FtlGetLastWrittenPage sxth w20, w0 add w0, w0, 1 strh w0, [x24, 2] - add x24, x22, :lo12:.LANCHOR138 -.L531: - tbz w20, #31, .L534 - adrp x1, .LANCHOR141 + add x24, x22, :lo12:.LANCHOR137 +.L527: + tbz w20, #31, .L530 + adrp x1, .LANCHOR140 adrp x0, .LC1 mov w2, 251 - add x1, x1, :lo12:.LANCHOR141 + add x1, x1, :lo12:.LANCHOR140 add x0, x0, :lo12:.LC1 bl printf -.L533: - add x0, x19, :lo12:.LANCHOR37 +.L529: + add x0, x19, :lo12:.LANCHOR36 ldrh w1, [x21, 10] strh w1, [x0, 6] mov w1, 65535 ldrh w0, [x21, 12] cmp w0, w1 - beq .L536 - adrp x1, .LANCHOR2 - ldr w2, [x1, #:lo12:.LANCHOR2] + beq .L532 + adrp x1, .LANCHOR1 + ldr w2, [x1, #:lo12:.LANCHOR1] cmp w0, w2 - beq .L536 - adrp x1, .LANCHOR6 - ldrh w1, [x1, #:lo12:.LANCHOR6] + beq .L532 + adrp x1, .LANCHOR5 + ldrh w1, [x1, #:lo12:.LANCHOR5] lsr w1, w1, 2 cmp w2, w1 - bcs .L536 + bcs .L532 cmp w0, w1 - bcs .L536 + bcs .L532 bl FtlSysBlkNumInit -.L536: - add x19, x19, :lo12:.LANCHOR37 - adrp x21, .LANCHOR10 - adrp x23, .LANCHOR127 +.L532: + add x19, x19, :lo12:.LANCHOR36 + adrp x21, .LANCHOR9 + adrp x23, .LANCHOR126 add x19, x19, 32 - add x21, x21, :lo12:.LANCHOR10 - add x23, x23, :lo12:.LANCHOR127 - add x22, x22, :lo12:.LANCHOR138 + add x21, x21, :lo12:.LANCHOR9 + add x23, x23, :lo12:.LANCHOR126 + add x22, x22, :lo12:.LANCHOR137 mov w20, 0 -.L537: +.L533: ldrh w0, [x21] cmp w20, w0 - bcc .L538 + bcc .L534 mov w0, 0 -.L521: +.L517: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] ldr x25, [sp, 64] ldp x29, x30, [sp], 80 ret -.L524: +.L520: sub w19, w19, #1 and w19, w19, 65535 - b .L522 -.L534: - ldrh w0, [x19, #:lo12:.LANCHOR37] + b .L518 +.L530: + ldrh w0, [x19, #:lo12:.LANCHOR36] mov w2, 1 mov w1, w2 orr w0, w20, w0, lsl 10 str w0, [x24, 4] - ldr x0, [x23, #:lo12:.LANCHOR106] + ldr x0, [x23, #:lo12:.LANCHOR105] str x0, [x24, 8] mov x0, x24 bl FlashReadPages ldr w0, [x24] cmn w0, #1 - beq .L532 + beq .L528 ldrh w0, [x21] cmp w0, w25 - beq .L533 -.L532: + beq .L529 +.L528: sub w20, w20, #1 sxth w20, w20 - b .L531 -.L538: + b .L527 +.L534: ldrh w2, [x23] ldr x0, [x22, 8] mul w1, w2, w20 @@ -4163,10 +4107,10 @@ FtlLoadBbt: add x1, x0, x1, lsl 2 ldr x0, [x19], 8 bl ftl_memcpy - b .L537 -.L539: + b .L533 +.L535: mov w0, -1 - b .L521 + b .L517 .size FtlLoadBbt, .-FtlLoadBbt .section .text.FlashProgPages,"ax",@progbits .align 2 @@ -4177,36 +4121,34 @@ FlashProgPages: ubfiz x1, x1, 5, 32 add x29, sp, 0 stp x21, x22, [sp, 32] - adrp x21, .LANCHOR0 + adrp x22, .LANCHOR0 stp x23, x24, [sp, 48] - adrp x22, .LANCHOR142 - stp w3, w2, [x29, 104] - add x2, x21, :lo12:.LANCHOR0 + add x21, x0, x1 + str w2, [x29, 108] + add x2, x22, :lo12:.LANCHOR0 stp x19, x20, [sp, 16] - adrp x24, .LANCHOR78 + adrp x23, .LANCHOR141 stp x27, x28, [sp, 80] mov x19, x0 - ldrh w23, [x2, 12] - add x20, x0, x1 + ldrh w24, [x2, 12] + mov x20, x0 stp x25, x26, [sp, 64] - add x22, x22, :lo12:.LANCHOR142 - mov x25, x0 - add x28, x24, :lo12:.LANCHOR78 - lsl w27, w23, 3 -.L552: - cmp x25, x20 - bne .L565 - ldr w0, [x29, 104] - cbz w0, .L579 - adrp x21, .LANCHOR111 - adrp x22, .LANCHOR113 - mov x23, x21 + add x23, x23, :lo12:.LANCHOR141 + adrp x25, .LANCHOR77 + add x28, x25, :lo12:.LANCHOR77 + lsl w27, w24, 3 +.L548: + cmp x20, x21 + bne .L561 + adrp x20, .LANCHOR110 + adrp x22, .LANCHOR112 + mov x23, x20 mov x24, x22 -.L567: - cmp x19, x20 - beq .L579 - ldr x1, [x21, #:lo12:.LANCHOR111] - ldr x0, [x22, #:lo12:.LANCHOR113] +.L562: + cmp x19, x21 + beq .L583 + ldr x1, [x20, #:lo12:.LANCHOR110] + ldr x0, [x22, #:lo12:.LANCHOR112] str wzr, [x1] str wzr, [x0] stp x1, x0, [x29, 136] @@ -4216,91 +4158,91 @@ FlashProgPages: str w2, [x29, 132] ldr w2, [x29, 108] bl FlashReadPages - ldr w26, [x29, 128] - cmn w26, #1 - bne .L568 + ldr w25, [x29, 128] + cmn w25, #1 + bne .L563 ldr w1, [x19, 4] adrp x0, .LC14 add x0, x0, :lo12:.LC14 bl printf - str w26, [x19] -.L568: - ldr w26, [x29, 128] - cmp w26, 256 - bne .L569 + str w25, [x19] +.L563: + ldr w25, [x29, 128] + cmp w25, 256 + bne .L564 ldr w1, [x19, 4] adrp x0, .LC15 add x0, x0, :lo12:.LC15 bl printf - str w26, [x19] -.L569: + str w25, [x19] +.L564: ldr x0, [x19, 16] - cbz x0, .L570 + cbz x0, .L565 ldr w2, [x0] - ldr x0, [x24, #:lo12:.LANCHOR113] + ldr x0, [x24, #:lo12:.LANCHOR112] ldr w3, [x0] cmp w2, w3 - beq .L570 + beq .L565 ldr w1, [x19, 4] adrp x0, .LC16 add x0, x0, :lo12:.LC16 bl printf mov w0, -1 str w0, [x19] -.L570: +.L565: ldr x0, [x19, 8] - cbz x0, .L571 + cbz x0, .L566 ldr w2, [x0] - ldr x0, [x23, #:lo12:.LANCHOR111] + ldr x0, [x23, #:lo12:.LANCHOR110] ldr w3, [x0] cmp w2, w3 - beq .L571 + beq .L566 ldr w1, [x19, 4] adrp x0, .LC17 add x0, x0, :lo12:.LC17 bl printf mov w0, -1 str w0, [x19] -.L571: +.L566: add x19, x19, 32 - b .L567 -.L565: - ldr x0, [x25, 8] - cbz x0, .L553 - ldr x0, [x25, 16] - cbnz x0, .L554 -.L553: + b .L562 +.L561: + ldr x0, [x20, 8] + cbz x0, .L549 + ldr x0, [x20, 16] + cbnz x0, .L550 +.L549: adrp x0, .LC1 mov w2, 142 - mov x1, x22 + mov x1, x23 add x0, x0, :lo12:.LC1 bl printf -.L554: - ldr w0, [x25, 4] +.L550: + ldr w0, [x20, 4] add x2, x29, 120 add x1, x29, 124 bl l2p_addr_tran.isra.0 ldr w0, [x29, 120] cmp w0, 3 - bls .L555 -.L592: + bls .L551 +.L585: mov w0, -1 - str w0, [x25] - b .L556 -.L555: - cbnz w0, .L557 + str w0, [x20] + b .L552 +.L551: + cbnz w0, .L553 ldr w0, [x29, 124] cmp w27, w0 - bls .L557 - adrp x21, .LANCHOR142 + bls .L553 + adrp x20, .LANCHOR141 adrp x22, .LC6 mov w23, -1 - add x21, x21, :lo12:.LANCHOR142 + add x20, x20, :lo12:.LANCHOR141 add x22, x22, :lo12:.LC6 - b .L590 -.L559: + b .L582 +.L555: ldr w2, [x19, 4] - mov x1, x21 + mov x1, x20 str w23, [x19] mov x0, x22 add x19, x19, 32 @@ -4317,10 +4259,10 @@ FlashProgPages: mov w2, w3 add x0, x0, :lo12:.LC8 bl rknand_print_hex -.L590: - cmp x19, x20 - bne .L559 -.L579: +.L582: + cmp x19, x21 + bne .L555 +.L583: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -4329,53 +4271,53 @@ FlashProgPages: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 160 ret -.L557: - ldr x1, [x25, 8] +.L553: + ldr x1, [x20, 8] tst x1, 63 - beq .L573 - adrp x0, .LANCHOR111 - ldr x26, [x0, #:lo12:.LANCHOR111] + beq .L569 + adrp x0, .LANCHOR110 + ldr x26, [x0, #:lo12:.LANCHOR110] cmp x1, x26 - beq .L560 - adrp x0, .LANCHOR12 - ldrh w2, [x0, #:lo12:.LANCHOR12] + beq .L556 + adrp x0, .LANCHOR11 + ldrh w2, [x0, #:lo12:.LANCHOR11] mov x0, x26 lsl w2, w2, 9 bl ftl_memcpy -.L560: - add x0, x24, :lo12:.LANCHOR78 +.L556: + add x0, x25, :lo12:.LANCHOR77 ldr w1, [x29, 124] - ldr x3, [x25, 16] + ldr x3, [x20, 16] mov x2, x26 - ldr x6, [x0, 16] + ldr x5, [x0, 16] ldrb w0, [x29, 120] - blr x6 - cbnz w0, .L561 - str wzr, [x25] -.L562: - add x0, x21, :lo12:.LANCHOR0 + blr x5 + cbnz w0, .L557 + str wzr, [x20] +.L558: + add x0, x22, :lo12:.LANCHOR0 ldrh w0, [x0, 14] cmp w0, 4 - bne .L556 + bne .L552 ldrb w0, [x29, 120] add x2, x26, 2048 - ldr x6, [x28, 16] + ldr x5, [x28, 16] ldr w1, [x29, 124] - ldr x3, [x25, 16] - add w1, w23, w1 + ldr x3, [x20, 16] + add w1, w24, w1 add x3, x3, 8 - blr x6 - cbnz w0, .L592 -.L556: - add x25, x25, 32 - b .L552 -.L573: + blr x5 + cbnz w0, .L585 +.L552: + add x20, x20, 32 + b .L548 +.L569: mov x26, x1 - b .L560 -.L561: + b .L556 +.L557: mov w0, -1 - str w0, [x25] - b .L562 + str w0, [x20] + b .L558 .size FlashProgPages, .-FlashProgPages .section .text.FtlLowFormatEraseBlock,"ax",@progbits .align 2 @@ -4383,83 +4325,83 @@ FlashProgPages: .type FtlLowFormatEraseBlock, %function FtlLowFormatEraseBlock: stp x29, x30, [sp, -128]! - adrp x7, .LANCHOR13 - add x7, x7, :lo12:.LANCHOR13 + adrp x7, .LANCHOR12 + add x7, x7, :lo12:.LANCHOR12 mov x5, 0 add x29, sp, 0 stp x23, x24, [sp, 48] and w23, w0, 65535 - adrp x0, .LANCHOR99 + adrp x0, .LANCHOR98 stp x19, x20, [sp, 16] stp x21, x22, [sp, 32] - adrp x20, .LANCHOR3 + adrp x20, .LANCHOR2 stp x25, x26, [sp, 64] and w22, w1, 255 - str w23, [x0, #:lo12:.LANCHOR99] - adrp x21, .LANCHOR79 - adrp x0, .LANCHOR110 - adrp x1, .LANCHOR115 - adrp x25, .LANCHOR24 - ldrh w8, [x20, #:lo12:.LANCHOR3] - ldr x6, [x21, #:lo12:.LANCHOR79] + str w23, [x0, #:lo12:.LANCHOR98] + adrp x21, .LANCHOR78 + adrp x0, .LANCHOR109 + adrp x1, .LANCHOR114 + adrp x25, .LANCHOR23 + ldrh w8, [x20, #:lo12:.LANCHOR2] + ldr x6, [x21, #:lo12:.LANCHOR78] mov w24, 0 - ldr x10, [x0, #:lo12:.LANCHOR110] + ldr x10, [x0, #:lo12:.LANCHOR109] mov w19, 0 - ldr x11, [x1, #:lo12:.LANCHOR115] - ldrh w12, [x25, #:lo12:.LANCHOR24] + ldr x11, [x1, #:lo12:.LANCHOR114] + ldrh w12, [x25, #:lo12:.LANCHOR23] stp x27, x28, [sp, 80] str x0, [x29, 112] -.L594: +.L587: cmp w8, w5, uxth - bhi .L598 - cbz w24, .L593 + bhi .L591 + cbz w24, .L586 mov w2, w24 ubfiz x24, x24, 5, 16 mov x26, 0 mov w1, 0 mov x0, x6 bl FlashEraseBlocks -.L602: - ldr x0, [x21, #:lo12:.LANCHOR79] +.L595: + ldr x0, [x21, #:lo12:.LANCHOR78] add x1, x0, x26 ldr w0, [x0, x26] cmn w0, #1 - bne .L601 + bne .L594 ldr w0, [x1, 4] add w19, w19, 1 and w19, w19, 65535 lsr w0, w0, 10 bl FtlBbmMapBadBlock -.L601: +.L594: add x26, x26, 32 cmp x26, x24 - bne .L602 - cbz w22, .L615 - adrp x0, .LANCHOR20 + bne .L595 + cbz w22, .L608 + adrp x0, .LANCHOR19 mov w26, 1 - ldrh w28, [x0, #:lo12:.LANCHOR20] -.L603: - add x0, x20, :lo12:.LANCHOR3 - adrp x27, .LANCHOR13 + ldrh w28, [x0, #:lo12:.LANCHOR19] +.L596: + add x0, x20, :lo12:.LANCHOR2 + adrp x27, .LANCHOR12 str x0, [x29, 120] mov w24, 0 - add x0, x27, :lo12:.LANCHOR13 + add x0, x27, :lo12:.LANCHOR12 str x0, [x29, 104] -.L611: +.L604: ldr x0, [x29, 120] mov x5, 0 - ldr x6, [x21, #:lo12:.LANCHOR79] + ldr x6, [x21, #:lo12:.LANCHOR78] mov w20, 0 - ldrh w11, [x25, #:lo12:.LANCHOR24] + ldrh w11, [x25, #:lo12:.LANCHOR23] ldrh w7, [x0] - adrp x0, .LANCHOR109 - ldr x8, [x0, #:lo12:.LANCHOR109] + adrp x0, .LANCHOR108 + ldr x8, [x0, #:lo12:.LANCHOR108] ldr x0, [x29, 112] - ldr x10, [x0, #:lo12:.LANCHOR110] -.L604: + ldr x10, [x0, #:lo12:.LANCHOR109] +.L597: cmp w7, w5, uxth - bhi .L607 - cbz w20, .L593 + bhi .L600 + cbz w20, .L586 mov w1, w20 mov w3, 1 mov w2, w26 @@ -4467,11 +4409,11 @@ FtlLowFormatEraseBlock: bl FlashProgPages mov x27, 0 ubfiz x1, x20, 5, 16 -.L610: - ldr x0, [x21, #:lo12:.LANCHOR79] +.L603: + ldr x0, [x21, #:lo12:.LANCHOR78] add x3, x0, x27 ldr w0, [x0, x27] - cbz w0, .L609 + cbz w0, .L602 ldr w0, [x3, 4] add w19, w19, 1 str x1, [x29, 96] @@ -4479,36 +4421,36 @@ FtlLowFormatEraseBlock: lsr w0, w0, 10 bl FtlBbmMapBadBlock ldr x1, [x29, 96] -.L609: +.L602: add x27, x27, 32 cmp x1, x27 - bne .L610 + bne .L603 add w24, w24, 1 cmp w28, w24, uxth - bhi .L611 + bhi .L604 mov x24, 0 -.L613: - cbz w22, .L612 - ldr x0, [x21, #:lo12:.LANCHOR79] +.L606: + cbz w22, .L605 + ldr x0, [x21, #:lo12:.LANCHOR78] add x1, x0, x24 ldr w0, [x0, x24] - cbnz w0, .L612 + cbnz w0, .L605 ldr w0, [x1, 4] mov w1, 1 lsr w0, w0, 10 bl FtlFreeSysBlkQueueIn -.L612: +.L605: add x24, x24, 32 cmp x24, x27 - bne .L613 + bne .L606 cmp w23, 63 ccmp w22, 0, 0, hi - beq .L593 - ldr x0, [x21, #:lo12:.LANCHOR79] + beq .L586 + ldr x0, [x21, #:lo12:.LANCHOR78] mov w2, w20 mov w1, w26 bl FlashEraseBlocks -.L593: +.L586: mov w0, w19 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] @@ -4517,7 +4459,7 @@ FtlLowFormatEraseBlock: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 128 ret -.L598: +.L591: lsl x0, x5, 5 mov w1, w23 str wzr, [x6, x0] @@ -4525,13 +4467,13 @@ FtlLowFormatEraseBlock: bl V2P_block and w13, w0, 65535 mov w14, w13 - cbz w22, .L595 + cbz w22, .L588 bl IsBlkInVendorPart - cbnz w0, .L596 -.L595: + cbnz w0, .L589 +.L588: mov w0, w14 bl FtlBbmIsBadBlock - cbnz w0, .L597 + cbnz w0, .L590 ubfiz x0, x24, 5, 16 mul w1, w24, w12 add x0, x6, x0 @@ -4542,18 +4484,18 @@ FtlLowFormatEraseBlock: add x1, x11, x1, sxtw 2 str w13, [x0, 4] stp x10, x1, [x0, 8] -.L596: +.L589: add x5, x5, 1 - b .L594 -.L597: + b .L587 +.L590: add w19, w19, 1 and w19, w19, 65535 - b .L596 -.L615: + b .L589 +.L608: mov w26, 0 mov w28, 2 - b .L603 -.L607: + b .L596 +.L600: lsl x0, x5, 5 mov w1, w23 str wzr, [x6, x0] @@ -4562,13 +4504,13 @@ FtlLowFormatEraseBlock: bl V2P_block and w12, w0, 65535 mov w13, w12 - cbz w22, .L605 + cbz w22, .L598 bl IsBlkInVendorPart - cbnz w0, .L606 -.L605: + cbnz w0, .L599 +.L598: mov w0, w13 bl FtlBbmIsBadBlock - cbnz w0, .L606 + cbnz w0, .L599 ubfiz x0, x20, 5, 16 mul w1, w20, w11 add x0, x6, x0 @@ -4579,9 +4521,9 @@ FtlLowFormatEraseBlock: add x1, x10, x1, sxtw 2 str w12, [x0, 4] stp x8, x1, [x0, 8] -.L606: +.L599: add x5, x5, 1 - b .L604 + b .L597 .size FtlLowFormatEraseBlock, .-FtlLowFormatEraseBlock .section .text.FlashTestBlk,"ax",@progbits .align 2 @@ -4593,17 +4535,17 @@ FlashTestBlk: stp x19, x20, [sp, 16] and w19, w0, 65535 cmp w19, 11 - bls .L639 - adrp x20, .LANCHOR112 + bls .L632 + adrp x20, .LANCHOR111 mov w2, 32 mov w1, 165 lsl w19, w19, 10 - ldr x0, [x20, #:lo12:.LANCHOR112] + ldr x0, [x20, #:lo12:.LANCHOR111] str x0, [x29, 40] add x0, x29, 64 str x0, [x29, 48] bl ftl_memset - ldr x0, [x20, #:lo12:.LANCHOR112] + ldr x0, [x20, #:lo12:.LANCHOR111] mov w2, 8 mov w1, 90 bl ftl_memset @@ -4618,7 +4560,7 @@ FlashTestBlk: mov w1, w3 bl FlashProgPages ldr w0, [x29, 32] - cbnz w0, .L640 + cbnz w0, .L633 add w0, w19, 1 mov w3, 1 str w0, [x29, 36] @@ -4629,23 +4571,23 @@ FlashTestBlk: ldr w0, [x29, 32] cmp w0, 0 csetm w20, ne -.L638: +.L631: mov w2, 1 mov w1, 0 add x0, x29, 32 str w19, [x29, 36] bl FlashEraseBlocks -.L636: +.L629: mov w0, w20 ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 128 ret -.L640: +.L633: mov w20, -1 - b .L638 -.L639: + b .L631 +.L632: mov w20, 0 - b .L636 + b .L629 .size FlashTestBlk, .-FlashTestBlk .section .text.FtlBbmTblFlush,"ax",@progbits .align 2 @@ -4655,42 +4597,42 @@ FtlBbmTblFlush: stp x29, x30, [sp, -96]! add x29, sp, 0 stp x23, x24, [sp, 48] - adrp x23, .LANCHOR114 + adrp x23, .LANCHOR113 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR138 + adrp x20, .LANCHOR137 stp x21, x22, [sp, 32] - add x19, x20, :lo12:.LANCHOR138 - adrp x22, .LANCHOR106 - ldr x1, [x23, #:lo12:.LANCHOR114] + add x19, x20, :lo12:.LANCHOR137 + adrp x22, .LANCHOR105 + ldr x1, [x23, #:lo12:.LANCHOR113] stp x25, x26, [sp, 64] - adrp x21, .LANCHOR37 + adrp x21, .LANCHOR36 str x27, [sp, 80] - add x25, x21, :lo12:.LANCHOR37 - ldr x0, [x22, #:lo12:.LANCHOR106] - adrp x26, .LANCHOR10 + add x25, x21, :lo12:.LANCHOR36 + ldr x0, [x22, #:lo12:.LANCHOR105] + adrp x26, .LANCHOR9 stp x0, x1, [x19, 8] - adrp x1, .LANCHOR23 - adrp x27, .LANCHOR127 + adrp x1, .LANCHOR22 + adrp x27, .LANCHOR126 add x25, x25, 32 - ldrh w2, [x1, #:lo12:.LANCHOR23] + ldrh w2, [x1, #:lo12:.LANCHOR22] mov w24, 0 - add x26, x26, :lo12:.LANCHOR10 - add x27, x27, :lo12:.LANCHOR127 + add x26, x26, :lo12:.LANCHOR9 + add x27, x27, :lo12:.LANCHOR126 mov w1, 0 bl ftl_memset -.L643: +.L636: ldrh w0, [x26] cmp w24, w0 - blt .L644 - add x20, x20, :lo12:.LANCHOR138 - add x19, x21, :lo12:.LANCHOR37 + blt .L637 + add x20, x20, :lo12:.LANCHOR137 + add x19, x21, :lo12:.LANCHOR36 mov w2, 16 mov w1, 255 adrp x25, .LC18 - adrp x26, .LANCHOR20 + adrp x26, .LANCHOR19 ldr x27, [x20, 16] add x25, x25, :lo12:.LC18 - add x26, x26, :lo12:.LANCHOR20 + add x26, x26, :lo12:.LANCHOR19 mov w24, 0 mov x0, x27 bl ftl_memset @@ -4698,27 +4640,27 @@ FtlBbmTblFlush: strh w0, [x27] ldr w0, [x19, 8] str w0, [x27, 4] - ldrh w0, [x21, #:lo12:.LANCHOR37] + ldrh w0, [x21, #:lo12:.LANCHOR36] mov w21, 0 strh w0, [x27, 2] ldrh w0, [x19, 4] strh w0, [x27, 8] ldrh w0, [x19, 6] strh w0, [x27, 10] - adrp x0, .LANCHOR2 - ldr w0, [x0, #:lo12:.LANCHOR2] + adrp x0, .LANCHOR1 + ldr w0, [x0, #:lo12:.LANCHOR1] strh w0, [x27, 12] - adrp x0, .LANCHOR143 - ldr w0, [x0, #:lo12:.LANCHOR143] + adrp x0, .LANCHOR142 + ldr w0, [x0, #:lo12:.LANCHOR142] strh w0, [x27, 14] -.L645: +.L638: ldrh w1, [x19] ldrh w4, [x27, 10] ldrh w2, [x19, 2] ldrh w3, [x19, 4] - ldr x0, [x22, #:lo12:.LANCHOR106] + ldr x0, [x22, #:lo12:.LANCHOR105] str x0, [x20, 8] - ldr x0, [x23, #:lo12:.LANCHOR114] + ldr x0, [x23, #:lo12:.LANCHOR113] str x0, [x20, 16] orr w0, w2, w1, lsl 10 str wzr, [x20] @@ -4729,7 +4671,7 @@ FtlBbmTblFlush: ldrh w1, [x19, 2] sub w0, w0, #1 cmp w1, w0 - blt .L646 + blt .L639 ldr w0, [x19, 8] mov w2, 1 ldrh w1, [x19, 4] @@ -4739,16 +4681,16 @@ FtlBbmTblFlush: ldrh w0, [x19] strh w0, [x27, 8] strh w0, [x19, 4] - adrp x0, .LANCHOR79 + adrp x0, .LANCHOR78 strh w1, [x19] lsl w1, w1, 10 - ldr x0, [x0, #:lo12:.LANCHOR79] + ldr x0, [x0, #:lo12:.LANCHOR78] str w1, [x20, 4] strh wzr, [x19, 2] str w1, [x0, 4] mov w1, w2 bl FlashEraseBlocks -.L646: +.L639: mov w3, 1 mov x0, x20 mov w2, w3 @@ -4759,7 +4701,7 @@ FtlBbmTblFlush: strh w0, [x19, 2] ldr w0, [x20] cmn w0, #1 - bne .L647 + bne .L640 ldr w1, [x20, 4] add w21, w21, 1 adrp x0, .LC19 @@ -4767,15 +4709,15 @@ FtlBbmTblFlush: add x0, x0, :lo12:.LC19 bl printf cmp w21, 3 - bls .L645 + bls .L638 ldr w1, [x20, 4] adrp x0, .LC20 mov w2, w21 add x0, x0, :lo12:.LC20 bl printf -.L649: - b .L649 -.L644: +.L642: + b .L642 +.L637: ldrh w2, [x27] ldr x1, [x25], 8 ldr x0, [x19, 8] @@ -4784,13 +4726,13 @@ FtlBbmTblFlush: add w24, w24, 1 add x0, x0, x3, sxtw 2 bl ftl_memcpy - b .L643 -.L647: + b .L636 +.L640: add w24, w24, 1 cmp w24, 1 - beq .L645 + beq .L638 cmp w0, 256 - beq .L645 + beq .L638 mov w0, 0 ldr x27, [sp, 80] ldp x19, x20, [sp, 16] @@ -4808,254 +4750,249 @@ allocate_data_superblock: stp x29, x30, [sp, -112]! add x29, sp, 0 stp x27, x28, [sp, 80] - adrp x28, .LANCHOR48 + adrp x28, .LANCHOR47 stp x23, x24, [sp, 48] - add x24, x28, :lo12:.LANCHOR48 + add x24, x28, :lo12:.LANCHOR47 stp x19, x20, [sp, 16] - adrp x27, .LANCHOR44 + adrp x27, .LANCHOR43 mov x19, x0 stp x21, x22, [sp, 32] - add x0, x27, :lo12:.LANCHOR44 + add x0, x27, :lo12:.LANCHOR43 stp x25, x26, [sp, 64] str x0, [x29, 104] -.L658: +.L651: ldr x1, [x29, 104] - adrp x23, .LANCHOR5 - ldrh w0, [x28, #:lo12:.LANCHOR48] + adrp x23, .LANCHOR4 + ldrh w0, [x28, #:lo12:.LANCHOR47] ldrh w1, [x1] add w0, w0, w1 - ldrh w1, [x23, #:lo12:.LANCHOR5] + ldrh w1, [x23, #:lo12:.LANCHOR4] cmp w0, w1 - ble .L659 - adrp x1, .LANCHOR144 + ble .L652 + adrp x1, .LANCHOR143 adrp x0, .LC1 - mov w2, 2656 - add x1, x1, :lo12:.LANCHOR144 + mov w2, 2660 + add x1, x1, :lo12:.LANCHOR143 add x0, x0, :lo12:.LC1 bl printf -.L659: - adrp x0, .LANCHOR53 - add x0, x0, :lo12:.LANCHOR53 +.L652: + adrp x0, .LANCHOR52 + add x0, x0, :lo12:.LANCHOR52 cmp x19, x0 - bne .L685 - adrp x1, .LANCHOR95 + bne .L678 + adrp x1, .LANCHOR94 ldrh w0, [x24] - ldr w1, [x1, #:lo12:.LANCHOR95] + ldr w1, [x1, #:lo12:.LANCHOR94] mul w1, w0, w1 lsr w0, w0, 1 add w0, w0, 1 add w1, w0, w1, lsr 2 ands w1, w1, 65535 - beq .L660 + beq .L653 sub w1, w1, #1 and w1, w1, 65535 -.L660: - adrp x0, .LANCHOR46 - add x0, x0, :lo12:.LANCHOR46 +.L653: + adrp x0, .LANCHOR45 + add x0, x0, :lo12:.LANCHOR45 bl List_pop_index_node and w22, w0, 65535 ldrh w0, [x24] - cbnz w0, .L661 - adrp x1, .LANCHOR144 + cbnz w0, .L654 + adrp x1, .LANCHOR143 adrp x0, .LC1 - mov w2, 2665 - add x1, x1, :lo12:.LANCHOR144 + mov w2, 2669 + add x1, x1, :lo12:.LANCHOR143 add x0, x0, :lo12:.LC1 bl printf -.L661: +.L654: ldrh w0, [x24] sub w0, w0, #1 strh w0, [x24] - ldrh w0, [x23, #:lo12:.LANCHOR5] + ldrh w0, [x23, #:lo12:.LANCHOR4] cmp w0, w22 - bls .L658 - adrp x25, .LANCHOR42 + bls .L651 + adrp x25, .LANCHOR41 ubfiz x20, x22, 1, 16 - ldr x0, [x25, #:lo12:.LANCHOR42] + ldr x0, [x25, #:lo12:.LANCHOR41] ldrh w21, [x0, x20] - cbnz w21, .L658 + cbnz w21, .L651 strh w22, [x19] mov x0, x19 bl make_superblock ldrb w0, [x19, 7] - cbnz w0, .L663 - ldr x0, [x25, #:lo12:.LANCHOR42] + cbnz w0, .L656 + ldr x0, [x25, #:lo12:.LANCHOR41] mov w1, -1 strh w1, [x0, x20] mov w0, w22 bl INSERT_DATA_LIST - ldrh w1, [x27, #:lo12:.LANCHOR44] + ldrh w1, [x27, #:lo12:.LANCHOR43] ldrh w0, [x24] add w0, w0, w1 - ldrh w1, [x23, #:lo12:.LANCHOR5] + ldrh w1, [x23, #:lo12:.LANCHOR4] + cmp w0, w1 + ble .L651 + mov w2, 2683 + adrp x1, .LANCHOR143 + adrp x0, .LC1 + add x1, x1, :lo12:.LANCHOR143 + add x0, x0, :lo12:.LC1 + bl printf + b .L651 +.L678: + mov w1, 0 + b .L653 +.L656: + ldrh w1, [x27, #:lo12:.LANCHOR43] + ldrh w0, [x24] + add w0, w0, w1 + ldrh w1, [x23, #:lo12:.LANCHOR4] cmp w0, w1 ble .L658 - mov w2, 2679 - adrp x1, .LANCHOR144 + adrp x1, .LANCHOR143 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR144 + mov w2, 2686 + add x1, x1, :lo12:.LANCHOR143 add x0, x0, :lo12:.LC1 bl printf - b .L658 -.L685: - mov w1, 0 - b .L660 -.L663: - ldrh w1, [x27, #:lo12:.LANCHOR44] - ldrh w0, [x24] - add w0, w0, w1 - ldrh w1, [x23, #:lo12:.LANCHOR5] - cmp w0, w1 - ble .L665 - adrp x1, .LANCHOR144 - adrp x0, .LC1 - mov w2, 2682 - add x1, x1, :lo12:.LANCHOR144 - add x0, x0, :lo12:.LC1 - bl printf -.L665: - adrp x0, .LANCHOR3 - adrp x25, .LANCHOR79 +.L658: + adrp x0, .LANCHOR2 + adrp x25, .LANCHOR78 add x26, x19, 16 mov w6, 65535 - ldrh w0, [x0, #:lo12:.LANCHOR3] + ldrh w0, [x0, #:lo12:.LANCHOR2] mov x4, x26 - ldr x3, [x25, #:lo12:.LANCHOR79] + ldr x3, [x25, #:lo12:.LANCHOR78] ubfiz x0, x0, 5, 16 add x1, x3, 8 add x0, x0, 8 add x0, x3, x0 -.L666: +.L659: cmp x0, x1 - bne .L668 - cbnz w21, .L669 - adrp x1, .LANCHOR144 - adrp x0, .LC1 - mov w2, 2693 - add x1, x1, :lo12:.LANCHOR144 - add x0, x0, :lo12:.LC1 - bl printf -.L669: - adrp x0, .LANCHOR145 - ldrh w0, [x0, #:lo12:.LANCHOR145] - cmp w0, w22 - bne .L670 - adrp x1, .LANCHOR144 - adrp x0, .LC1 - mov w2, 2695 - add x1, x1, :lo12:.LANCHOR144 - add x0, x0, :lo12:.LC1 - bl printf -.L670: - ldrb w0, [x19, 8] - adrp x6, .LANCHOR47 - adrp x7, .LANCHOR14 - adrp x5, .LANCHOR90 - adrp x4, .LANCHOR91 - ldr x1, [x6, #:lo12:.LANCHOR47] - cbnz w0, .L671 - ldrh w0, [x1, x20] - cbz w0, .L672 - ldrh w2, [x7, #:lo12:.LANCHOR14] - add w0, w0, w2 -.L696: - strh w0, [x1, x20] - mov w1, 0 - ldr w0, [x5, #:lo12:.LANCHOR90] - add w0, w0, 1 - str w0, [x5, #:lo12:.LANCHOR90] - mov w0, w22 - bl ftl_set_blk_mode -.L674: - ldr x0, [x6, #:lo12:.LANCHOR47] - ldrh w1, [x0, x20] - adrp x0, .LANCHOR92 - ldr w2, [x0, #:lo12:.LANCHOR92] - cmp w1, w2 - bls .L675 - str w1, [x0, #:lo12:.LANCHOR92] -.L675: - ldr w2, [x5, #:lo12:.LANCHOR90] - ldr w1, [x4, #:lo12:.LANCHOR91] - ldrh w0, [x7, #:lo12:.LANCHOR14] - madd w0, w0, w2, w1 - ldrh w1, [x23, #:lo12:.LANCHOR5] - udiv w0, w0, w1 + bne .L661 + cbnz w21, .L662 adrp x1, .LANCHOR143 - str w0, [x1, #:lo12:.LANCHOR143] - adrp x0, .LANCHOR118 - ldr x1, [x0, #:lo12:.LANCHOR118] + adrp x0, .LC1 + mov w2, 2697 + add x1, x1, :lo12:.LANCHOR143 + add x0, x0, :lo12:.LC1 + bl printf +.L662: + adrp x0, .LANCHOR144 + ldrh w0, [x0, #:lo12:.LANCHOR144] + cmp w0, w22 + bne .L663 + adrp x1, .LANCHOR143 + adrp x0, .LC1 + mov w2, 2699 + add x1, x1, :lo12:.LANCHOR143 + add x0, x0, :lo12:.LC1 + bl printf +.L663: + ldrb w0, [x19, 8] + adrp x3, .LANCHOR46 + adrp x5, .LANCHOR13 + adrp x2, .LANCHOR89 + adrp x1, .LANCHOR90 + ldr x4, [x3, #:lo12:.LANCHOR46] + cbnz w0, .L664 + ldrh w0, [x4, x20] + cbz w0, .L665 + ldrh w6, [x5, #:lo12:.LANCHOR13] + add w0, w0, w6 +.L689: + strh w0, [x4, x20] + ldr w0, [x2, #:lo12:.LANCHOR89] + add w0, w0, 1 + str w0, [x2, #:lo12:.LANCHOR89] +.L667: + ldr x0, [x3, #:lo12:.LANCHOR46] + ldrh w3, [x0, x20] + adrp x0, .LANCHOR91 + ldr w4, [x0, #:lo12:.LANCHOR91] + cmp w3, w4 + bls .L668 + str w3, [x0, #:lo12:.LANCHOR91] +.L668: + ldr w2, [x2, #:lo12:.LANCHOR89] + ldr w1, [x1, #:lo12:.LANCHOR90] + ldrh w0, [x5, #:lo12:.LANCHOR13] + madd w0, w0, w2, w1 + ldrh w1, [x23, #:lo12:.LANCHOR4] + udiv w0, w0, w1 + adrp x1, .LANCHOR142 + str w0, [x1, #:lo12:.LANCHOR142] + adrp x0, .LANCHOR117 + ldr x1, [x0, #:lo12:.LANCHOR117] ldr w0, [x1, 16] add w0, w0, 1 str w0, [x1, 16] - ldr x0, [x25, #:lo12:.LANCHOR79] + ldr x0, [x25, #:lo12:.LANCHOR78] ubfiz x1, x21, 5, 16 add x1, x1, 4 add x2, x0, 4 add x1, x0, x1 -.L676: +.L669: cmp x1, x2 - bne .L677 + bne .L670 ldrb w1, [x19, 8] mov w2, w21 mov x23, 0 bl FlashEraseBlocks mov w1, 0 -.L678: +.L671: cmp w21, w23, uxth - bhi .L680 - cbz w1, .L681 + bhi .L673 + cbz w1, .L674 mov w0, w22 bl update_multiplier_value bl FtlBbmTblFlush -.L681: +.L674: ldrb w0, [x19, 7] - cbnz w0, .L682 - adrp x0, .LANCHOR42 + cbnz w0, .L675 + adrp x0, .LANCHOR41 mov w1, -1 - ldr x0, [x0, #:lo12:.LANCHOR42] + ldr x0, [x0, #:lo12:.LANCHOR41] strh w1, [x0, x20] - b .L658 -.L668: + b .L651 +.L661: ldrh w2, [x4] stp xzr, xzr, [x1] cmp w2, w6 - beq .L667 + beq .L660 ubfiz x5, x21, 5, 16 add w21, w21, 1 add x5, x3, x5 and w21, w21, 65535 lsl w2, w2, 10 str w2, [x5, 4] -.L667: +.L660: add x1, x1, 32 add x4, x4, 2 - b .L666 -.L672: + b .L659 +.L665: mov w0, 2 - b .L696 -.L671: - ldrh w0, [x1, x20] + b .L689 +.L664: + ldrh w0, [x4, x20] add w0, w0, 1 - strh w0, [x1, x20] - ldr w0, [x4, #:lo12:.LANCHOR91] + strh w0, [x4, x20] + ldr w0, [x1, #:lo12:.LANCHOR90] add w0, w0, 1 - str w0, [x4, #:lo12:.LANCHOR91] - mov w0, w22 - bl ftl_set_blk_mode.part.6 - b .L674 -.L677: + str w0, [x1, #:lo12:.LANCHOR90] + b .L667 +.L670: ldr w3, [x2] and w3, w3, -1024 str w3, [x2], 32 - b .L676 -.L680: - ldr x2, [x25, #:lo12:.LANCHOR79] + b .L669 +.L673: + ldr x2, [x25, #:lo12:.LANCHOR78] lsl x0, x23, 5 add x3, x2, x0 ldr w2, [x2, x0] cmn w2, #1 - bne .L679 + bne .L672 add w1, w1, 1 ldr w0, [x3, 4] stp w2, w1, [x29, 96] @@ -5066,39 +5003,39 @@ allocate_data_superblock: ldrb w0, [x19, 7] sub w0, w0, #1 strb w0, [x19, 7] -.L679: +.L672: add x23, x23, 1 add x26, x26, 2 - b .L678 -.L682: - adrp x1, .LANCHOR19 - adrp x2, .LANCHOR82 + b .L671 +.L675: + adrp x1, .LANCHOR18 + adrp x2, .LANCHOR81 strh wzr, [x19, 2] - ldrh w1, [x1, #:lo12:.LANCHOR19] + ldrh w1, [x1, #:lo12:.LANCHOR18] strh w22, [x19] strb wzr, [x19, 6] mul w0, w0, w1 - ldr w1, [x2, #:lo12:.LANCHOR82] + ldr w1, [x2, #:lo12:.LANCHOR81] str w1, [x19, 12] add w1, w1, 1 - str w1, [x2, #:lo12:.LANCHOR82] - adrp x1, .LANCHOR42 + str w1, [x2, #:lo12:.LANCHOR81] + adrp x1, .LANCHOR41 and w0, w0, 65535 strh w0, [x19, 4] - ldr x1, [x1, #:lo12:.LANCHOR42] + ldr x1, [x1, #:lo12:.LANCHOR41] strh w0, [x1, x20] ldrh w0, [x19, 4] - cbz w0, .L683 + cbz w0, .L676 ldrb w0, [x19, 7] - cbnz w0, .L684 -.L683: - adrp x1, .LANCHOR144 + cbnz w0, .L677 +.L676: + adrp x1, .LANCHOR143 adrp x0, .LC1 - mov w2, 2748 - add x1, x1, :lo12:.LANCHOR144 + mov w2, 2752 + add x1, x1, :lo12:.LANCHOR143 add x0, x0, :lo12:.LC1 bl printf -.L684: +.L677: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -5116,24 +5053,24 @@ FtlGcFreeBadSuperBlk: stp x29, x30, [sp, -96]! add x29, sp, 0 stp x21, x22, [sp, 32] - adrp x21, .LANCHOR74 + adrp x21, .LANCHOR73 stp x25, x26, [sp, 64] and w25, w0, 65535 - ldrh w0, [x21, #:lo12:.LANCHOR74] + ldrh w0, [x21, #:lo12:.LANCHOR73] stp x19, x20, [sp, 16] stp x23, x24, [sp, 48] str x27, [sp, 80] - cbz w0, .L698 - adrp x23, .LANCHOR75 - add x24, x23, :lo12:.LANCHOR75 + cbz w0, .L691 + adrp x23, .LANCHOR74 + add x24, x23, :lo12:.LANCHOR74 mov w19, 0 -.L699: - adrp x0, .LANCHOR3 - ldrh w0, [x0, #:lo12:.LANCHOR3] +.L692: + adrp x0, .LANCHOR2 + ldrh w0, [x0, #:lo12:.LANCHOR2] cmp w0, w19 - bhi .L705 + bhi .L698 bl FtlGcReFreshBadBlk -.L698: +.L691: mov w0, 0 ldr x27, [sp, 80] ldp x19, x20, [sp, 16] @@ -5142,28 +5079,28 @@ FtlGcFreeBadSuperBlk: ldp x25, x26, [sp, 64] ldp x29, x30, [sp], 96 ret -.L705: - adrp x0, .LANCHOR13 - add x0, x0, :lo12:.LANCHOR13 +.L698: + adrp x0, .LANCHOR12 + add x0, x0, :lo12:.LANCHOR12 mov w1, w25 - add x22, x21, :lo12:.LANCHOR74 + add x22, x21, :lo12:.LANCHOR73 mov w20, 0 ldrb w0, [x0, w19, sxtw] bl V2P_block and w26, w0, 65535 -.L700: +.L693: ldrh w0, [x22] cmp w0, w20 - bhi .L704 + bhi .L697 add w19, w19, 1 and w19, w19, 65535 - b .L699 -.L704: - add x0, x23, :lo12:.LANCHOR75 + b .L692 +.L697: + add x0, x23, :lo12:.LANCHOR74 add w27, w20, 1 ldrh w0, [x0, w20, sxtw 1] cmp w0, w26 - bne .L701 + bne .L694 mov w0, w26 bl FtlBbmMapBadBlock bl FtlBbmTblFlush @@ -5171,22 +5108,22 @@ FtlGcFreeBadSuperBlk: sxtw x3, w27 and x4, x20, 65535 mov x0, 0 -.L702: +.L695: add w2, w20, w0 cmp w1, w2, uxth - bhi .L703 + bhi .L696 sub w1, w1, #1 strh w1, [x22] -.L701: +.L694: and w20, w27, 65535 - b .L700 -.L703: + b .L693 +.L696: add x2, x3, x0 ldrh w5, [x24, x2, lsl 1] add x2, x4, x0 add x0, x0, 1 strh w5, [x24, x2, lsl 1] - b .L702 + b .L695 .size FtlGcFreeBadSuperBlk, .-FtlGcFreeBadSuperBlk .section .text.update_vpc_list,"ax",@progbits .align 2 @@ -5194,96 +5131,96 @@ FtlGcFreeBadSuperBlk: .type update_vpc_list, %function update_vpc_list: stp x29, x30, [sp, -32]! - adrp x1, .LANCHOR42 + adrp x1, .LANCHOR41 add x29, sp, 0 stp x19, x20, [sp, 16] and w19, w0, 65535 - ldr x1, [x1, #:lo12:.LANCHOR42] + ldr x1, [x1, #:lo12:.LANCHOR41] ubfiz x0, x19, 1, 16 ldrh w0, [x1, x0] - cbnz w0, .L711 + cbnz w0, .L704 + adrp x0, .LANCHOR71 + ldrh w1, [x0, #:lo12:.LANCHOR71] + cmp w1, w19 + bne .L705 + mov w1, -1 + strh w1, [x0, #:lo12:.LANCHOR71] +.L705: adrp x0, .LANCHOR72 ldrh w1, [x0, #:lo12:.LANCHOR72] cmp w1, w19 - bne .L712 + bne .L706 mov w1, -1 strh w1, [x0, #:lo12:.LANCHOR72] -.L712: - adrp x0, .LANCHOR73 - ldrh w1, [x0, #:lo12:.LANCHOR73] +.L706: + adrp x0, .LANCHOR144 + ldrh w1, [x0, #:lo12:.LANCHOR144] cmp w1, w19 - bne .L713 + bne .L707 mov w1, -1 - strh w1, [x0, #:lo12:.LANCHOR73] -.L713: - adrp x0, .LANCHOR145 - ldrh w1, [x0, #:lo12:.LANCHOR145] - cmp w1, w19 - bne .L714 - mov w1, -1 - strh w1, [x0, #:lo12:.LANCHOR145] -.L715: - adrp x20, .LANCHOR44 + strh w1, [x0, #:lo12:.LANCHOR144] +.L708: + adrp x20, .LANCHOR43 mov w1, w19 - adrp x0, .LANCHOR41 - add x0, x0, :lo12:.LANCHOR41 + adrp x0, .LANCHOR40 + add x0, x0, :lo12:.LANCHOR40 bl List_remove_node - ldrh w0, [x20, #:lo12:.LANCHOR44] - cbnz w0, .L717 - adrp x1, .LANCHOR146 + ldrh w0, [x20, #:lo12:.LANCHOR43] + cbnz w0, .L710 + adrp x1, .LANCHOR145 adrp x0, .LC1 - mov w2, 2824 - add x1, x1, :lo12:.LANCHOR146 + mov w2, 2828 + add x1, x1, :lo12:.LANCHOR145 add x0, x0, :lo12:.LC1 bl printf -.L717: - ldrh w0, [x20, #:lo12:.LANCHOR44] +.L710: + ldrh w0, [x20, #:lo12:.LANCHOR43] sub w0, w0, #1 - strh w0, [x20, #:lo12:.LANCHOR44] + strh w0, [x20, #:lo12:.LANCHOR43] mov w0, w19 bl free_data_superblock mov w0, w19 bl FtlGcFreeBadSuperBlk - adrp x0, .LANCHOR48 - ldrh w1, [x20, #:lo12:.LANCHOR44] - ldrh w0, [x0, #:lo12:.LANCHOR48] + adrp x0, .LANCHOR47 + ldrh w1, [x20, #:lo12:.LANCHOR43] + ldrh w0, [x0, #:lo12:.LANCHOR47] add w0, w0, w1 - adrp x1, .LANCHOR5 - ldrh w1, [x1, #:lo12:.LANCHOR5] + adrp x1, .LANCHOR4 + ldrh w1, [x1, #:lo12:.LANCHOR4] cmp w0, w1 - ble .L721 - adrp x1, .LANCHOR146 + ble .L714 + adrp x1, .LANCHOR145 adrp x0, .LC1 - mov w2, 2827 - add x1, x1, :lo12:.LANCHOR146 + mov w2, 2831 + add x1, x1, :lo12:.LANCHOR145 add x0, x0, :lo12:.LC1 bl printf -.L721: - mov w0, 1 - b .L710 .L714: + mov w0, 1 + b .L703 +.L707: + adrp x0, .LANCHOR50 + ldrh w0, [x0, #:lo12:.LANCHOR50] + cmp w0, w19 + beq .L713 adrp x0, .LANCHOR51 ldrh w0, [x0, #:lo12:.LANCHOR51] cmp w0, w19 - beq .L720 + beq .L713 adrp x0, .LANCHOR52 ldrh w0, [x0, #:lo12:.LANCHOR52] cmp w0, w19 - beq .L720 - adrp x0, .LANCHOR53 - ldrh w0, [x0, #:lo12:.LANCHOR53] - cmp w0, w19 - bne .L715 -.L720: + bne .L708 +.L713: mov w0, 0 -.L710: +.L703: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 ret -.L711: +.L704: mov w0, w19 bl List_update_data_list - b .L720 + b .L713 .size update_vpc_list, .-update_vpc_list .section .text.decrement_vpc_count,"ax",@progbits .align 2 @@ -5297,77 +5234,77 @@ decrement_vpc_count: str x21, [sp, 32] mov w0, 65535 cmp w19, w0 - beq .L724 - adrp x21, .LANCHOR42 + beq .L717 + adrp x21, .LANCHOR41 ubfiz x20, x19, 1, 16 - ldr x1, [x21, #:lo12:.LANCHOR42] + ldr x1, [x21, #:lo12:.LANCHOR41] ldrh w0, [x1, x20] - cbnz w0, .L725 + cbnz w0, .L718 mov w2, 0 mov w1, w19 adrp x0, .LC21 add x0, x0, :lo12:.LC21 bl printf - ldr x0, [x21, #:lo12:.LANCHOR42] + ldr x0, [x21, #:lo12:.LANCHOR41] ldrh w0, [x0, x20] - cbz w0, .L726 -.L731: + cbz w0, .L719 +.L724: mov w20, 0 -.L723: +.L716: mov w0, w20 ldr x21, [sp, 32] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 48 ret -.L726: - mov w2, 2842 - adrp x1, .LANCHOR147 +.L719: + mov w2, 2846 + adrp x1, .LANCHOR146 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR147 + add x1, x1, :lo12:.LANCHOR146 add x0, x0, :lo12:.LC1 bl printf - b .L731 -.L725: + b .L724 +.L718: sub w0, w0, #1 strh w0, [x1, x20] -.L724: - adrp x21, .LANCHOR131 +.L717: + adrp x21, .LANCHOR130 mov w1, 65535 - ldrh w0, [x21, #:lo12:.LANCHOR131] + ldrh w0, [x21, #:lo12:.LANCHOR130] cmp w0, w1 - bne .L728 - strh w19, [x21, #:lo12:.LANCHOR131] - b .L731 -.L728: + bne .L721 + strh w19, [x21, #:lo12:.LANCHOR130] + b .L724 +.L721: cmp w19, w0 - beq .L731 + beq .L724 bl update_vpc_list cmp w0, 0 - adrp x1, .LANCHOR40 - adrp x0, .LANCHOR41 - strh w19, [x21, #:lo12:.LANCHOR131] + adrp x1, .LANCHOR39 + adrp x0, .LANCHOR40 + strh w19, [x21, #:lo12:.LANCHOR130] cset w20, ne - ldr x1, [x1, #:lo12:.LANCHOR40] - ldr x0, [x0, #:lo12:.LANCHOR41] + ldr x1, [x1, #:lo12:.LANCHOR39] + ldr x0, [x0, #:lo12:.LANCHOR40] sub x0, x0, x1 mov x1, -6148914691236517206 asr x0, x0, 1 movk x1, 0xaaab, lsl 0 mul x0, x0, x1 - adrp x1, .LANCHOR42 - ldr x1, [x1, #:lo12:.LANCHOR42] + adrp x1, .LANCHOR41 + ldr x1, [x1, #:lo12:.LANCHOR41] and x2, x0, 65535 ldrh w1, [x1, x2, lsl 1] - cbnz w1, .L723 + cbnz w1, .L716 cmp w19, w0, uxth - beq .L723 - mov w2, 2858 - adrp x1, .LANCHOR147 + beq .L716 + mov w2, 2862 + adrp x1, .LANCHOR146 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR147 + add x1, x1, :lo12:.LANCHOR146 add x0, x0, :lo12:.LC1 bl printf - b .L723 + b .L716 .size decrement_vpc_count, .-decrement_vpc_count .section .text.FtlSuperblockPowerLostFix,"ax",@progbits .align 2 @@ -5375,20 +5312,20 @@ decrement_vpc_count: .type FtlSuperblockPowerLostFix, %function FtlSuperblockPowerLostFix: stp x29, x30, [sp, -80]! - adrp x1, .LANCHOR114 + adrp x1, .LANCHOR113 add x29, sp, 0 stp x19, x20, [sp, 16] mov x19, x0 mov w0, -1 stp x21, x22, [sp, 32] str w0, [x29, 72] - adrp x0, .LANCHOR106 - ldr x21, [x1, #:lo12:.LANCHOR114] + adrp x0, .LANCHOR105 + ldr x21, [x1, #:lo12:.LANCHOR113] mov w1, -3 - ldr x0, [x0, #:lo12:.LANCHOR106] - adrp x22, .LANCHOR83 + ldr x0, [x0, #:lo12:.LANCHOR105] + adrp x22, .LANCHOR82 str x21, [x29, 64] - add x22, x22, :lo12:.LANCHOR83 + add x22, x22, :lo12:.LANCHOR82 str x0, [x29, 56] ldrh w20, [x19, 4] str w1, [x21, 8] @@ -5404,33 +5341,33 @@ FtlSuperblockPowerLostFix: mov w1, 22136 movk w1, 0x1234, lsl 16 str w1, [x0, 4] -.L738: +.L731: ldrh w0, [x19, 4] - cbnz w0, .L734 -.L735: + cbnz w0, .L727 +.L728: ldrh w0, [x19] - adrp x1, .LANCHOR42 + adrp x1, .LANCHOR41 ldrh w3, [x19, 4] - ldr x2, [x1, #:lo12:.LANCHOR42] + ldr x2, [x1, #:lo12:.LANCHOR41] lsl x0, x0, 1 ldrh w1, [x2, x0] sub w1, w1, w3 strh w1, [x2, x0] - adrp x0, .LANCHOR19 + adrp x0, .LANCHOR18 strb wzr, [x19, 6] strh wzr, [x19, 4] - ldrh w0, [x0, #:lo12:.LANCHOR19] + ldrh w0, [x0, #:lo12:.LANCHOR18] strh w0, [x19, 2] ldp x21, x22, [sp, 32] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 80 ret -.L734: +.L727: mov x0, x19 bl get_new_active_ppa str w0, [x29, 52] cmn w0, #1 - beq .L735 + beq .L728 ldr w0, [x22] mov w3, 0 str w0, [x21, 4] @@ -5445,8 +5382,8 @@ FtlSuperblockPowerLostFix: ldrh w0, [x19] bl decrement_vpc_count subs w20, w20, #1 - bne .L738 - b .L735 + bne .L731 + b .L728 .size FtlSuperblockPowerLostFix, .-FtlSuperblockPowerLostFix .section .text.FtlMakeBbt,"ax",@progbits .align 2 @@ -5458,69 +5395,69 @@ FtlMakeBbt: stp x21, x22, [sp, 32] mov w22, 0 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR37 + adrp x20, .LANCHOR36 stp x23, x24, [sp, 48] - add x21, x20, :lo12:.LANCHOR37 + add x21, x20, :lo12:.LANCHOR36 stp x25, x26, [sp, 64] add x24, x21, 32 stp x27, x28, [sp, 80] bl FtlBbtMemInit bl FtlLoadFactoryBbt - adrp x28, .LANCHOR138 + adrp x28, .LANCHOR137 add x21, x21, 12 - add x25, x28, :lo12:.LANCHOR138 - adrp x0, .LANCHOR10 - add x0, x0, :lo12:.LANCHOR10 + add x25, x28, :lo12:.LANCHOR137 + adrp x0, .LANCHOR9 + add x0, x0, :lo12:.LANCHOR9 str x0, [x29, 120] -.L747: +.L740: ldr x0, [x29, 120] ldrh w0, [x0] cmp w22, w0 - bcc .L753 - adrp x21, .LANCHOR25 - add x21, x21, :lo12:.LANCHOR25 + bcc .L746 + adrp x21, .LANCHOR24 + add x21, x21, :lo12:.LANCHOR24 mov w19, 0 -.L754: +.L747: ldrh w0, [x21] cmp w0, w19 - bhi .L755 - add x21, x20, :lo12:.LANCHOR37 + bhi .L748 + add x21, x20, :lo12:.LANCHOR36 mov w22, 65535 ldrh w19, [x21, 12] sub w19, w19, #1 and w19, w19, 65535 -.L756: +.L749: ldrh w0, [x21, 12] sub w0, w0, #47 cmp w0, w19 - bgt .L760 + bgt .L753 mov w0, w19 bl FtlBbmIsBadBlock cmp w0, 1 - beq .L757 + beq .L750 mov w0, w19 bl FlashTestBlk - cbz w0, .L758 + cbz w0, .L751 mov w0, w19 bl FtlBbmMapBadBlock -.L757: +.L750: sub w19, w19, #1 and w19, w19, 65535 - b .L756 -.L753: - adrp x2, .LANCHOR114 - adrp x0, .LANCHOR106 - add x19, x28, :lo12:.LANCHOR138 + b .L749 +.L746: + adrp x2, .LANCHOR113 + adrp x0, .LANCHOR105 + add x19, x28, :lo12:.LANCHOR137 ldrh w1, [x21] - ldr x0, [x0, #:lo12:.LANCHOR106] + ldr x0, [x0, #:lo12:.LANCHOR105] mov w3, 65535 - ldr x26, [x2, #:lo12:.LANCHOR114] + ldr x26, [x2, #:lo12:.LANCHOR113] cmp w1, w3 stp x0, x26, [x19, 8] - adrp x23, .LANCHOR17 + adrp x23, .LANCHOR16 str x2, [x29, 112] - beq .L748 - ldrh w4, [x23, #:lo12:.LANCHOR17] + beq .L741 + ldrh w4, [x23, #:lo12:.LANCHOR16] mov w2, 1 madd w27, w4, w22, w1 mov w1, w2 @@ -5530,46 +5467,46 @@ FtlMakeBbt: bl FlashReadPages ldr x1, [x19, 8] ldr x0, [x24] - ldrh w2, [x23, #:lo12:.LANCHOR17] + ldrh w2, [x23, #:lo12:.LANCHOR16] add w2, w2, 7 lsr w2, w2, 3 bl ftl_memcpy -.L749: +.L742: mov w0, w27 add w22, w22, 1 bl FtlBbmMapBadBlock add x24, x24, 8 add x21, x21, 2 - b .L747 -.L748: + b .L740 +.L741: mov w1, w22 bl FlashGetBadBlockList ldr x0, [x19, 8] ldr x1, [x24] bl FtlBbt2Bitmap - ldrh w19, [x23, #:lo12:.LANCHOR17] - add x23, x23, :lo12:.LANCHOR17 - adrp x0, .LANCHOR127 + ldrh w19, [x23, #:lo12:.LANCHOR16] + add x23, x23, :lo12:.LANCHOR16 + adrp x0, .LANCHOR126 sub w19, w19, #1 - add x0, x0, :lo12:.LANCHOR127 + add x0, x0, :lo12:.LANCHOR126 and w19, w19, 65535 str x0, [x29, 104] -.L750: +.L743: ldrh w0, [x23] madd w0, w22, w0, w19 bl FtlBbmIsBadBlock cmp w0, 1 - beq .L751 + beq .L744 ldr x0, [x29, 112] mov w2, 16 strh w19, [x21] mov w1, 0 - ldr x0, [x0, #:lo12:.LANCHOR114] + ldr x0, [x0, #:lo12:.LANCHOR113] bl ftl_memset - adrp x0, .LANCHOR106 + adrp x0, .LANCHOR105 mov w2, 4096 mov w1, 0 - ldr x0, [x0, #:lo12:.LANCHOR106] + ldr x0, [x0, #:lo12:.LANCHOR105] bl ftl_memset mov w0, -3872 strh w0, [x26] @@ -5597,34 +5534,34 @@ FtlMakeBbt: bl FlashProgPages ldr w0, [x25] cmn w0, #1 - bne .L749 + bne .L742 mov w0, w27 bl FtlBbmMapBadBlock - b .L750 -.L751: + b .L743 +.L744: sub w19, w19, #1 and w19, w19, 65535 - b .L750 -.L755: + b .L743 +.L748: mov w0, w19 add w19, w19, 1 bl FtlBbmMapBadBlock and w19, w19, 65535 - b .L754 -.L758: + b .L747 +.L751: ldrh w0, [x21] cmp w0, w22 - bne .L759 + bne .L752 strh w19, [x21] - b .L757 -.L759: + b .L750 +.L752: strh w19, [x21, 4] -.L760: - adrp x0, .LANCHOR79 - add x19, x20, :lo12:.LANCHOR37 - ldrh w1, [x20, #:lo12:.LANCHOR37] +.L753: + adrp x0, .LANCHOR78 + add x19, x20, :lo12:.LANCHOR36 + ldrh w1, [x20, #:lo12:.LANCHOR36] mov w2, 2 - ldr x0, [x0, #:lo12:.LANCHOR79] + ldr x0, [x0, #:lo12:.LANCHOR78] str wzr, [x19, 8] lsl w1, w1, 10 strh wzr, [x19, 2] @@ -5634,7 +5571,7 @@ FtlMakeBbt: str w1, [x0, 36] mov w1, 1 bl FlashEraseBlocks - ldrh w0, [x20, #:lo12:.LANCHOR37] + ldrh w0, [x20, #:lo12:.LANCHOR36] bl FtlBbmMapBadBlock ldrh w0, [x19, 4] bl FtlBbmMapBadBlock @@ -5644,9 +5581,9 @@ FtlMakeBbt: ldrh w1, [x19, 4] add w0, w0, 1 str w0, [x19, 8] - ldrh w0, [x20, #:lo12:.LANCHOR37] + ldrh w0, [x20, #:lo12:.LANCHOR36] strh w0, [x19, 4] - strh w1, [x20, #:lo12:.LANCHOR37] + strh w1, [x20, #:lo12:.LANCHOR36] bl FtlBbmTblFlush mov w0, 0 ldp x19, x20, [sp, 16] @@ -5674,18 +5611,18 @@ js_hash: mov w0, 42982 mov x3, 0 movk w0, 0x47c6, lsl 16 -.L768: +.L761: cmp w1, w3 - bhi .L769 + bhi .L762 ret -.L769: +.L762: lsr w2, w0, 2 ldrb w5, [x4, x3] add w2, w2, w0, lsl 5 add x3, x3, 1 add w2, w2, w5 eor w0, w0, w2 - b .L768 + b .L761 .size js_hash, .-js_hash .section .text.Ftl_write_map_blk_to_last_page,"ax",@progbits .align 2 @@ -5702,16 +5639,16 @@ Ftl_write_map_blk_to_last_page: ldrh w0, [x0] stp x23, x24, [sp, 48] cmp w0, w1 - bne .L771 + bne .L764 ldrh w0, [x19, 8] - cbz w0, .L772 - adrp x1, .LANCHOR148 + cbz w0, .L765 + adrp x1, .LANCHOR147 adrp x0, .LC1 mov w2, 641 - add x1, x1, :lo12:.LANCHOR148 + add x1, x1, :lo12:.LANCHOR147 add x0, x0, :lo12:.LC1 bl printf -.L772: +.L765: ldrh w0, [x19, 8] add w0, w0, 1 strh w0, [x19, 8] @@ -5722,26 +5659,26 @@ Ftl_write_map_blk_to_last_page: add w0, w0, 1 strh wzr, [x19] str w0, [x19, 48] -.L773: +.L766: mov w0, 0 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] ldp x29, x30, [sp], 64 ret -.L771: +.L764: ubfiz x0, x0, 1, 16 - adrp x2, .LANCHOR114 - adrp x24, .LANCHOR106 + adrp x2, .LANCHOR113 + adrp x24, .LANCHOR105 ldr x23, [x19, 40] - ldr x21, [x2, #:lo12:.LANCHOR114] + ldr x21, [x2, #:lo12:.LANCHOR113] ldrh w22, [x20, x0] - adrp x20, .LANCHOR138 + adrp x20, .LANCHOR137 ldrh w0, [x19, 2] - add x1, x20, :lo12:.LANCHOR138 + add x1, x20, :lo12:.LANCHOR137 orr w0, w0, w22, lsl 10 str w0, [x1, 4] - ldr x0, [x24, #:lo12:.LANCHOR106] + ldr x0, [x24, #:lo12:.LANCHOR105] str x21, [x1, 16] str x0, [x1, 8] ldr w1, [x19, 48] @@ -5750,22 +5687,22 @@ Ftl_write_map_blk_to_last_page: strh w1, [x21, 8] ldrh w1, [x19, 4] strh w1, [x21] - adrp x1, .LANCHOR20 + adrp x1, .LANCHOR19 strh w22, [x21, 2] - ldrh w2, [x1, #:lo12:.LANCHOR20] + ldrh w2, [x1, #:lo12:.LANCHOR19] mov w1, 255 lsl w2, w2, 3 bl ftl_memset ldrh w4, [x19, 6] mov x0, 0 - ldr x3, [x24, #:lo12:.LANCHOR106] + ldr x3, [x24, #:lo12:.LANCHOR105] mov w1, 0 -.L774: +.L767: cmp w4, w0, uxth - bhi .L776 - add x20, x20, :lo12:.LANCHOR138 - adrp x0, .LANCHOR23 - ldrh w1, [x0, #:lo12:.LANCHOR23] + bhi .L769 + add x20, x20, :lo12:.LANCHOR137 + adrp x0, .LANCHOR22 + ldrh w1, [x0, #:lo12:.LANCHOR22] ldr x0, [x20, 8] bl js_hash str w0, [x21, 12] @@ -5779,11 +5716,11 @@ Ftl_write_map_blk_to_last_page: strh w0, [x19, 2] mov x0, x19 bl ftl_map_blk_gc - b .L773 -.L776: + b .L766 +.L769: ldr w2, [x23, x0, lsl 2] cmp w22, w2, lsr 10 - bne .L775 + bne .L768 add w1, w1, 1 and w1, w1, 65535 ubfiz x2, x1, 1, 16 @@ -5791,9 +5728,9 @@ Ftl_write_map_blk_to_last_page: add x2, x2, 1 ldr w5, [x23, x0, lsl 2] str w5, [x3, x2, lsl 2] -.L775: +.L768: add x0, x0, 1 - b .L774 + b .L767 .size Ftl_write_map_blk_to_last_page, .-Ftl_write_map_blk_to_last_page .section .text.FtlMapWritePage,"ax",@progbits .align 2 @@ -5803,61 +5740,61 @@ FtlMapWritePage: stp x29, x30, [sp, -112]! add x29, sp, 0 stp x23, x24, [sp, 48] - adrp x23, .LANCHOR88 + adrp x23, .LANCHOR87 stp x25, x26, [sp, 64] - adrp x24, .LANCHOR149 + adrp x24, .LANCHOR148 stp x27, x28, [sp, 80] - adrp x26, .LANCHOR20 + adrp x26, .LANCHOR19 stp x19, x20, [sp, 16] mov w25, w1 mov x19, x0 mov x27, x2 - add x23, x23, :lo12:.LANCHOR88 - add x24, x24, :lo12:.LANCHOR149 - add x28, x26, :lo12:.LANCHOR20 + add x23, x23, :lo12:.LANCHOR87 + add x24, x24, :lo12:.LANCHOR148 + add x28, x26, :lo12:.LANCHOR19 stp x21, x22, [sp, 32] mov w22, 0 -.L782: +.L775: ldr w0, [x23] ldrh w1, [x19, 2] add w0, w0, 1 str w0, [x23] - ldrh w0, [x26, #:lo12:.LANCHOR20] + ldrh w0, [x26, #:lo12:.LANCHOR19] sub w0, w0, #1 cmp w1, w0 - bge .L783 + bge .L776 ldrh w1, [x19] mov w0, 65535 cmp w1, w0 - bne .L784 -.L783: + bne .L777 +.L776: mov x0, x19 bl Ftl_write_map_blk_to_last_page -.L784: +.L777: ldrh w1, [x19] ldr x0, [x19, 16] ldrh w0, [x0, x1, lsl 1] - cbnz w0, .L785 + cbnz w0, .L778 adrp x0, .LC1 mov w2, 700 mov x1, x24 add x0, x0, :lo12:.LC1 bl printf -.L785: +.L778: ldrh w1, [x19] ldrh w0, [x19, 10] cmp w1, w0 - bcc .L786 + bcc .L779 adrp x0, .LC1 mov w2, 701 mov x1, x24 add x0, x0, :lo12:.LC1 bl printf -.L786: +.L779: ldrh w1, [x19] - adrp x21, .LANCHOR138 + adrp x21, .LANCHOR137 ldr x0, [x19, 16] - add x20, x21, :lo12:.LANCHOR138 + add x20, x21, :lo12:.LANCHOR137 mov w2, 16 ldrh w3, [x0, x1, lsl 1] mov w1, 0 @@ -5866,8 +5803,8 @@ FtlMapWritePage: str x27, [x20, 8] orr w0, w0, w3, lsl 10 str w0, [x20, 4] - adrp x0, .LANCHOR114 - ldr x0, [x0, #:lo12:.LANCHOR114] + adrp x0, .LANCHOR113 + ldr x0, [x0, #:lo12:.LANCHOR113] str x0, [x20, 16] bl ftl_memset ldr x6, [x20, 16] @@ -5876,10 +5813,10 @@ FtlMapWritePage: str w0, [x6, 4] ldrh w0, [x19, 4] strh w0, [x6] - adrp x0, .LANCHOR23 + adrp x0, .LANCHOR22 strh w3, [x6, 2] strh w25, [x6, 8] - ldrh w1, [x0, #:lo12:.LANCHOR23] + ldrh w1, [x0, #:lo12:.LANCHOR22] ldr x0, [x20, 8] bl js_hash str w0, [x6, 12] @@ -5889,12 +5826,12 @@ FtlMapWritePage: mov w2, w3 bl FlashProgPages ldrh w0, [x19, 2] - ldr w1, [x21, #:lo12:.LANCHOR138] + ldr w1, [x21, #:lo12:.LANCHOR137] add w0, w0, 1 and w0, w0, 65535 strh w0, [x19, 2] cmn w1, #1 - bne .L787 + bne .L780 ldr w1, [x20, 4] adrp x0, .LC22 add x0, x0, :lo12:.LC22 @@ -5903,37 +5840,37 @@ FtlMapWritePage: bl printf ldrh w0, [x19, 2] cmp w0, 2 - bhi .L788 + bhi .L781 ldrh w0, [x28] sub w0, w0, #1 strh w0, [x19, 2] -.L788: +.L781: cmp w22, 3 - bls .L789 - add x21, x21, :lo12:.LANCHOR138 + bls .L782 + add x21, x21, :lo12:.LANCHOR137 adrp x0, .LC23 mov w2, w22 add x0, x0, :lo12:.LC23 ldr w1, [x21, 4] bl printf -.L790: - b .L790 -.L789: +.L783: + b .L783 +.L782: ldr w0, [x19, 52] - cbz w0, .L782 -.L804: - b .L804 -.L787: + cbz w0, .L775 +.L797: + b .L797 +.L780: cmp w0, 1 - beq .L793 + beq .L786 cmp w1, 256 - beq .L793 + beq .L786 ldr w0, [x19, 56] - cbz w0, .L794 -.L793: + cbz w0, .L787 +.L786: str wzr, [x19, 56] - b .L782 -.L794: + b .L775 +.L787: ldr x0, [x19, 40] ldr w1, [x20, 4] ldp x21, x22, [sp, 32] @@ -5954,42 +5891,42 @@ load_l2p_region: stp x29, x30, [sp, -96]! add x29, sp, 0 stp x23, x24, [sp, 48] - adrp x24, .LANCHOR32 + adrp x24, .LANCHOR31 stp x19, x20, [sp, 16] and w20, w0, 65535 stp x21, x22, [sp, 32] and x19, x1, 65535 - ldrh w0, [x24, #:lo12:.LANCHOR32] + ldrh w0, [x24, #:lo12:.LANCHOR31] stp x25, x26, [sp, 64] str x27, [sp, 80] cmp w0, w20 - bcs .L807 - adrp x1, .LANCHOR150 + bcs .L800 + adrp x1, .LANCHOR149 adrp x0, .LC1 mov w2, 485 - add x1, x1, :lo12:.LANCHOR150 + add x1, x1, :lo12:.LANCHOR149 add x0, x0, :lo12:.LC1 bl printf -.L807: - adrp x27, .LANCHOR124 +.L800: + adrp x27, .LANCHOR123 ubfiz x0, x20, 2, 16 - adrp x22, .LANCHOR55 - ldr x1, [x27, #:lo12:.LANCHOR124] + adrp x22, .LANCHOR54 + ldr x1, [x27, #:lo12:.LANCHOR123] ldr w23, [x1, x0] - cbnz w23, .L808 - ldr x0, [x22, #:lo12:.LANCHOR55] + cbnz w23, .L801 + ldr x0, [x22, #:lo12:.LANCHOR54] lsl x19, x19, 4 - adrp x1, .LANCHOR23 + adrp x1, .LANCHOR22 add x0, x0, x19 - ldrh w2, [x1, #:lo12:.LANCHOR23] + ldrh w2, [x1, #:lo12:.LANCHOR22] mov w1, 255 ldr x0, [x0, 8] bl ftl_memset - ldr x0, [x22, #:lo12:.LANCHOR55] + ldr x0, [x22, #:lo12:.LANCHOR54] add x1, x0, x19 strh w20, [x0, x19] str wzr, [x1, 4] -.L809: +.L802: mov w0, 0 ldr x27, [sp, 80] ldp x19, x20, [sp, 16] @@ -5998,26 +5935,26 @@ load_l2p_region: ldp x25, x26, [sp, 64] ldp x29, x30, [sp], 96 ret -.L808: - ldr x0, [x22, #:lo12:.LANCHOR55] +.L801: + ldr x0, [x22, #:lo12:.LANCHOR54] lsl x19, x19, 4 - adrp x26, .LANCHOR138 - add x21, x26, :lo12:.LANCHOR138 + adrp x26, .LANCHOR137 + add x21, x26, :lo12:.LANCHOR137 add x0, x0, x19 mov w2, 1 mov w1, w2 str w23, [x21, 4] ldr x0, [x0, 8] str x0, [x21, 8] - adrp x0, .LANCHOR114 - ldr x0, [x0, #:lo12:.LANCHOR114] + adrp x0, .LANCHOR113 + ldr x0, [x0, #:lo12:.LANCHOR113] str x0, [x21, 16] mov x0, x21 bl FlashReadPages ldr x25, [x21, 16] ldrh w0, [x25, 8] cmp w0, w20 - beq .L810 + beq .L803 mov w2, w23 mov w1, w20 adrp x0, .LC24 @@ -6029,45 +5966,45 @@ load_l2p_region: mov w2, w3 add x0, x0, :lo12:.LC13 bl rknand_print_hex - ldrh w3, [x24, #:lo12:.LANCHOR32] + ldrh w3, [x24, #:lo12:.LANCHOR31] adrp x0, .LC25 - ldr x1, [x27, #:lo12:.LANCHOR124] + ldr x1, [x27, #:lo12:.LANCHOR123] mov w2, 4 add x0, x0, :lo12:.LC25 bl rknand_print_hex -.L811: +.L804: ldrh w0, [x25, 8] cmp w0, w20 - beq .L812 - adrp x1, .LANCHOR150 + beq .L805 + adrp x1, .LANCHOR149 adrp x0, .LC1 mov w2, 508 - add x1, x1, :lo12:.LANCHOR150 + add x1, x1, :lo12:.LANCHOR149 add x0, x0, :lo12:.LC1 bl printf -.L812: - ldr x0, [x22, #:lo12:.LANCHOR55] +.L805: + ldr x0, [x22, #:lo12:.LANCHOR54] add x1, x0, x19 str wzr, [x1, 4] strh w20, [x0, x19] - b .L809 -.L810: - ldr w0, [x26, #:lo12:.LANCHOR138] + b .L802 +.L803: + ldr w0, [x26, #:lo12:.LANCHOR137] cmp w0, 256 - bne .L811 + bne .L804 mov w2, w23 mov w1, w20 adrp x0, .LC26 add x0, x0, :lo12:.LC26 bl printf - ldr x0, [x22, #:lo12:.LANCHOR55] + ldr x0, [x22, #:lo12:.LANCHOR54] mov w1, w20 add x0, x0, x19 ldr x2, [x0, 8] - adrp x0, .LANCHOR129 - add x0, x0, :lo12:.LANCHOR129 + adrp x0, .LANCHOR128 + add x0, x0, :lo12:.LANCHOR128 bl FtlMapWritePage - b .L811 + b .L804 .size load_l2p_region, .-load_l2p_region .section .text.ftl_map_blk_gc,"ax",@progbits .align 2 @@ -6079,7 +6016,7 @@ ftl_map_blk_gc: stp x19, x20, [sp, 16] mov x19, x0 stp x23, x24, [sp, 48] - adrp x24, .LANCHOR20 + adrp x24, .LANCHOR19 stp x25, x26, [sp, 64] stp x21, x22, [sp, 32] stp x27, x28, [sp, 80] @@ -6090,12 +6027,12 @@ ftl_map_blk_gc: ldrh w2, [x19, 8] sub w1, w1, #5 cmp w2, w1 - blt .L815 + blt .L808 ubfiz x0, x0, 1, 16 ldrh w22, [x20, x0] - cbz w22, .L815 + cbz w22, .L808 ldr w1, [x19, 52] - cbnz w1, .L815 + cbnz w1, .L808 mov w1, 1 str w1, [x19, 52] strh wzr, [x20, x0] @@ -6103,33 +6040,33 @@ ftl_map_blk_gc: ldrh w1, [x19, 2] sub w0, w0, #1 strh w0, [x19, 8] - ldrh w0, [x24, #:lo12:.LANCHOR20] + ldrh w0, [x24, #:lo12:.LANCHOR19] cmp w1, w0 - bcc .L816 + bcc .L809 mov x0, x19 bl ftl_map_blk_alloc_new_blk -.L816: - adrp x26, .LANCHOR138 - adrp x23, .LANCHOR151 - add x27, x26, :lo12:.LANCHOR138 - add x23, x23, :lo12:.LANCHOR151 +.L809: + adrp x26, .LANCHOR137 + adrp x23, .LANCHOR150 + add x27, x26, :lo12:.LANCHOR137 + add x23, x23, :lo12:.LANCHOR150 mov w20, 0 -.L817: +.L810: ldrh w0, [x19, 6] cmp w0, w20 - bhi .L824 + bhi .L817 mov w1, 1 mov w0, w22 bl FtlFreeSysBlkQueueIn str wzr, [x19, 52] -.L815: +.L808: ldrh w1, [x19, 2] - ldrh w0, [x24, #:lo12:.LANCHOR20] + ldrh w0, [x24, #:lo12:.LANCHOR19] cmp w1, w0 - bcc .L825 + bcc .L818 mov x0, x19 bl ftl_map_blk_alloc_new_blk -.L825: +.L818: mov w0, 0 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] @@ -6138,55 +6075,55 @@ ftl_map_blk_gc: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 96 ret -.L824: +.L817: ubfiz x0, x20, 2, 16 add x28, x25, x0 ldr w1, [x25, x0] cmp w22, w1, lsr 10 - bne .L818 - adrp x2, .LANCHOR107 - add x0, x26, :lo12:.LANCHOR138 - ldr x2, [x2, #:lo12:.LANCHOR107] + bne .L811 + adrp x2, .LANCHOR106 + add x0, x26, :lo12:.LANCHOR137 + ldr x2, [x2, #:lo12:.LANCHOR106] str x2, [x0, 8] - adrp x2, .LANCHOR114 + adrp x2, .LANCHOR113 str w1, [x0, 4] - ldr x21, [x2, #:lo12:.LANCHOR114] + ldr x21, [x2, #:lo12:.LANCHOR113] mov w2, 1 str x21, [x0, 16] mov w1, w2 bl FlashReadPages ldrh w0, [x21, 8] cmp w0, w20 - beq .L819 + beq .L812 adrp x0, .LC1 mov w2, 611 mov x1, x23 add x0, x0, :lo12:.LC1 bl printf -.L819: +.L812: ldr w0, [x27] cmn w0, #1 - bne .L820 -.L822: + bne .L813 +.L815: str wzr, [x28] -.L821: - b .L821 -.L820: +.L814: + b .L814 +.L813: ldrh w0, [x21, 8] cmp w0, w20 - bne .L822 + bne .L815 ldrh w1, [x21] ldrh w0, [x19, 4] cmp w1, w0 - bne .L822 + bne .L815 ldr x2, [x27, 8] mov w1, w20 mov x0, x19 bl FtlMapWritePage -.L818: +.L811: add w20, w20, 1 and w20, w20, 65535 - b .L817 + b .L810 .size ftl_map_blk_gc, .-ftl_map_blk_gc .section .text.flush_l2p_region,"ax",@progbits .align 2 @@ -6196,16 +6133,16 @@ flush_l2p_region: stp x29, x30, [sp, -32]! add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR55 + adrp x20, .LANCHOR54 ubfiz x19, x0, 4, 16 - ldr x0, [x20, #:lo12:.LANCHOR55] + ldr x0, [x20, #:lo12:.LANCHOR54] add x1, x0, x19 ldr x2, [x1, 8] ldrh w1, [x0, x19] - adrp x0, .LANCHOR129 - add x0, x0, :lo12:.LANCHOR129 + adrp x0, .LANCHOR128 + add x0, x0, :lo12:.LANCHOR128 bl FtlMapWritePage - ldr x0, [x20, #:lo12:.LANCHOR55] + ldr x0, [x20, #:lo12:.LANCHOR54] add x0, x0, x19 ldp x19, x20, [sp, 16] ldr w1, [x0, 4] @@ -6223,32 +6160,32 @@ l2p_flush: stp x29, x30, [sp, -48]! add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR33 - add x20, x20, :lo12:.LANCHOR33 + adrp x20, .LANCHOR32 + add x20, x20, :lo12:.LANCHOR32 str x21, [sp, 32] mov w19, 0 - adrp x21, .LANCHOR55 -.L834: + adrp x21, .LANCHOR54 +.L827: ldrh w0, [x20] cmp w0, w19 - bhi .L836 + bhi .L829 mov w0, 0 ldr x21, [sp, 32] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 48 ret -.L836: - ldr x1, [x21, #:lo12:.LANCHOR55] +.L829: + ldr x1, [x21, #:lo12:.LANCHOR54] ubfiz x0, x19, 4, 16 add x0, x1, x0 ldr w0, [x0, 4] - tbz w0, #31, .L835 + tbz w0, #31, .L828 mov w0, w19 bl flush_l2p_region -.L835: +.L828: add w19, w19, 1 and w19, w19, 65535 - b .L834 + b .L827 .size l2p_flush, .-l2p_flush .section .text.log2phys,"ax",@progbits .align 2 @@ -6259,108 +6196,108 @@ log2phys: add x29, sp, 0 stp x25, x26, [sp, 64] mov w25, w0 - adrp x0, .LANCHOR22 + adrp x0, .LANCHOR21 stp x23, x24, [sp, 48] stp x19, x20, [sp, 16] mov x20, x1 - ldrh w24, [x0, #:lo12:.LANCHOR22] - adrp x0, .LANCHOR152 + ldrh w24, [x0, #:lo12:.LANCHOR21] + adrp x0, .LANCHOR151 stp x21, x22, [sp, 32] mov x19, x0 - ldr w1, [x0, #:lo12:.LANCHOR152] + ldr w1, [x0, #:lo12:.LANCHOR151] mov w21, w2 cmp w25, w1 - bcc .L839 - adrp x1, .LANCHOR153 + bcc .L832 + adrp x1, .LANCHOR152 adrp x0, .LC1 mov w2, 813 - add x1, x1, :lo12:.LANCHOR153 + add x1, x1, :lo12:.LANCHOR152 add x0, x0, :lo12:.LC1 bl printf -.L839: - ldr w0, [x19, #:lo12:.LANCHOR152] +.L832: + ldr w0, [x19, #:lo12:.LANCHOR151] cmp w25, w0 - bcs .L840 - adrp x23, .LANCHOR55 + bcs .L833 + adrp x23, .LANCHOR54 add w24, w24, 7 - adrp x0, .LANCHOR33 - ldr x2, [x23, #:lo12:.LANCHOR55] + adrp x0, .LANCHOR32 + ldr x2, [x23, #:lo12:.LANCHOR54] lsr w22, w25, w24 and w22, w22, 65535 - ldrh w1, [x0, #:lo12:.LANCHOR33] + ldrh w1, [x0, #:lo12:.LANCHOR32] mov x0, 0 -.L841: +.L834: and x19, x0, 65535 cmp w19, w1 - bcc .L846 + bcc .L839 bl select_l2p_ram_region and x19, x0, 65535 - ldr x2, [x23, #:lo12:.LANCHOR55] + ldr x2, [x23, #:lo12:.LANCHOR54] ubfiz x1, x19, 4, 16 mov w26, w0 add x3, x2, x1 ldrh w2, [x2, x1] mov w1, 65535 cmp w2, w1 - beq .L847 + beq .L840 ldr w1, [x3, 4] - tbz w1, #31, .L847 + tbz w1, #31, .L840 bl flush_l2p_region -.L847: +.L840: mov w1, w26 mov w0, w22 bl load_l2p_region - b .L843 -.L840: + b .L836 +.L833: mov w0, -1 - cbnz w21, .L838 + cbnz w21, .L831 str w0, [x20] -.L838: +.L831: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] ldp x25, x26, [sp, 64] ldp x29, x30, [sp], 80 ret -.L846: +.L839: add x0, x0, 1 add x3, x2, x0, lsl 4 ldrh w3, [x3, -16] cmp w3, w22 - bne .L841 -.L843: + bne .L834 +.L836: mov x0, 1 - ldr x1, [x23, #:lo12:.LANCHOR55] + ldr x1, [x23, #:lo12:.LANCHOR54] lsl x0, x0, x24 sub w0, w0, #1 and w0, w0, w25 and x0, x0, 65535 add x1, x1, x19, lsl 4 - cbnz w21, .L844 + cbnz w21, .L837 ldr x1, [x1, 8] ldr w0, [x1, x0, lsl 2] str w0, [x20] -.L845: - ldr x0, [x23, #:lo12:.LANCHOR55] +.L838: + ldr x0, [x23, #:lo12:.LANCHOR54] add x19, x0, x19, lsl 4 ldr w0, [x19, 4] cmn w0, #1 - beq .L849 + beq .L842 add w0, w0, 1 str w0, [x19, 4] -.L849: +.L842: mov w0, 0 - b .L838 -.L844: + b .L831 +.L837: ldr x2, [x1, 8] ldr w3, [x20] str w3, [x2, x0, lsl 2] ldr w0, [x1, 4] orr w0, w0, -2147483648 str w0, [x1, 4] - adrp x0, .LANCHOR56 - strh w22, [x0, #:lo12:.LANCHOR56] - b .L845 + adrp x0, .LANCHOR55 + strh w22, [x0, #:lo12:.LANCHOR55] + b .L838 .size log2phys, .-log2phys .section .text.FtlReUsePrevPpa,"ax",@progbits .align 2 @@ -6370,60 +6307,60 @@ FtlReUsePrevPpa: stp x29, x30, [sp, -80]! add x29, sp, 0 stp x21, x22, [sp, 32] - adrp x22, .LANCHOR42 + adrp x22, .LANCHOR41 stp x19, x20, [sp, 16] mov w21, w0 str w1, [x29, 76] lsr w0, w1, 10 str x23, [sp, 48] bl P2V_block_in_plane - ldr x2, [x22, #:lo12:.LANCHOR42] + ldr x2, [x22, #:lo12:.LANCHOR41] and w3, w0, 65535 ubfiz x20, x3, 1, 16 ldrh w1, [x2, x20] - cbnz w1, .L853 - adrp x0, .LANCHOR46 - ldr x19, [x0, #:lo12:.LANCHOR46] - cbz x19, .L854 - adrp x2, .LANCHOR40 + cbnz w1, .L846 + adrp x0, .LANCHOR45 + ldr x19, [x0, #:lo12:.LANCHOR45] + cbz x19, .L847 + adrp x2, .LANCHOR39 mov x5, -6148914691236517206 movk x5, 0xaaab, lsl 0 - adrp x23, .LANCHOR48 - ldr x2, [x2, #:lo12:.LANCHOR40] + adrp x23, .LANCHOR47 + ldr x2, [x2, #:lo12:.LANCHOR39] mov w6, 65535 - ldrh w4, [x23, #:lo12:.LANCHOR48] + ldrh w4, [x23, #:lo12:.LANCHOR47] sub x19, x19, x2 asr x19, x19, 1 mul x19, x19, x5 mov w5, 6 and w19, w19, 65535 -.L855: +.L848: cmp w1, w4 - beq .L854 + beq .L847 cmp w19, w3 - bne .L856 + bne .L849 mov w1, w19 - add x0, x0, :lo12:.LANCHOR46 + add x0, x0, :lo12:.LANCHOR45 bl List_remove_node - ldrh w0, [x23, #:lo12:.LANCHOR48] - cbnz w0, .L857 - adrp x1, .LANCHOR154 + ldrh w0, [x23, #:lo12:.LANCHOR47] + cbnz w0, .L850 + adrp x1, .LANCHOR153 adrp x0, .LC1 - mov w2, 1733 - add x1, x1, :lo12:.LANCHOR154 + mov w2, 1735 + add x1, x1, :lo12:.LANCHOR153 add x0, x0, :lo12:.LC1 bl printf -.L857: - ldrh w0, [x23, #:lo12:.LANCHOR48] +.L850: + ldrh w0, [x23, #:lo12:.LANCHOR47] sub w0, w0, #1 - strh w0, [x23, #:lo12:.LANCHOR48] + strh w0, [x23, #:lo12:.LANCHOR47] mov w0, w19 bl INSERT_DATA_LIST - ldr x1, [x22, #:lo12:.LANCHOR42] + ldr x1, [x22, #:lo12:.LANCHOR41] ldrh w0, [x1, x20] add w0, w0, 1 strh w0, [x1, x20] -.L854: +.L847: add x1, x29, 76 mov w2, 1 mov w0, w21 @@ -6433,18 +6370,18 @@ FtlReUsePrevPpa: ldr x23, [sp, 48] ldp x29, x30, [sp], 80 ret -.L856: +.L849: umull x19, w19, w5 ldrh w19, [x2, x19] cmp w19, w6 - beq .L854 + beq .L847 add w1, w1, 1 and w1, w1, 65535 - b .L855 -.L853: + b .L848 +.L846: add w1, w1, 1 strh w1, [x2, x20] - b .L854 + b .L847 .size FtlReUsePrevPpa, .-FtlReUsePrevPpa .section .text.FtlRecoverySuperblock,"ax",@progbits .align 2 @@ -6462,19 +6399,19 @@ FtlRecoverySuperblock: stp x25, x26, [sp, 64] cmp w0, w1 stp x27, x28, [sp, 80] - beq .L990 + beq .L983 ldrb w0, [x19, 6] str w0, [x29, 164] - adrp x0, .LANCHOR19 + adrp x0, .LANCHOR18 ldrh w26, [x19, 2] str x0, [x29, 128] - ldrh w2, [x0, #:lo12:.LANCHOR19] + ldrh w2, [x0, #:lo12:.LANCHOR18] cmp w2, w26 - bne .L866 + bne .L859 strh wzr, [x19, 4] -.L997: - strb wzr, [x19, 6] .L990: + strb wzr, [x19, 6] +.L983: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -6483,116 +6420,116 @@ FtlRecoverySuperblock: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 192 ret -.L866: +.L859: ldrh w0, [x19, 16] mov w20, 0 -.L867: +.L860: cmp w0, w1 - beq .L868 + beq .L861 mov w1, 1 bl FtlGetLastWrittenPage mov w23, w0 cmn w0, #1 - beq .L869 - adrp x1, .LANCHOR64 - adrp x2, .LANCHOR3 - adrp x20, .LANCHOR103 + beq .L862 + adrp x1, .LANCHOR63 + adrp x2, .LANCHOR2 + adrp x20, .LANCHOR102 add x4, x19, 16 - ldr x5, [x1, #:lo12:.LANCHOR64] - adrp x1, .LANCHOR23 - ldr x0, [x20, #:lo12:.LANCHOR103] + ldr x5, [x1, #:lo12:.LANCHOR63] + adrp x1, .LANCHOR22 + ldr x0, [x20, #:lo12:.LANCHOR102] mov w22, 0 - ldrh w6, [x1, #:lo12:.LANCHOR23] - adrp x1, .LANCHOR65 + ldrh w6, [x1, #:lo12:.LANCHOR22] + adrp x1, .LANCHOR64 mov w10, 65535 str x2, [x29, 152] - ldr x7, [x1, #:lo12:.LANCHOR65] - adrp x1, .LANCHOR24 - ldrh w8, [x1, #:lo12:.LANCHOR24] + ldr x7, [x1, #:lo12:.LANCHOR64] + adrp x1, .LANCHOR23 + ldrh w8, [x1, #:lo12:.LANCHOR23] add x1, x19, 16 str x1, [x29, 168] - ldrh w1, [x2, #:lo12:.LANCHOR3] + ldrh w1, [x2, #:lo12:.LANCHOR2] add x1, x1, 8 add x1, x19, x1, lsl 1 -.L870: +.L863: cmp x4, x1 - bne .L874 + bne .L867 mov w2, 0 mov w1, w22 bl FlashReadPages - adrp x0, .LANCHOR83 - ldr x4, [x20, #:lo12:.LANCHOR103] + adrp x0, .LANCHOR82 + ldr x4, [x20, #:lo12:.LANCHOR102] and w10, w23, 65535 - add x7, x0, :lo12:.LANCHOR83 - ldr w21, [x0, #:lo12:.LANCHOR83] + add x7, x0, :lo12:.LANCHOR82 + ldr w21, [x0, #:lo12:.LANCHOR82] mov x11, x4 mov w6, 65535 mov w3, 0 sub w21, w21, #1 str x0, [x29, 144] -.L875: +.L868: cmp w22, w3 - bne .L880 + bne .L873 add w22, w23, 1 ldr w0, [x4, 4] and w22, w22, 65535 -.L992: +.L985: lsr w0, w0, 10 bl P2V_plane and w27, w0, 65535 ldr x0, [x29, 128] - ldrh w0, [x0, #:lo12:.LANCHOR19] + ldrh w0, [x0, #:lo12:.LANCHOR18] cmp w0, w22 - bne .L882 + bne .L875 strh w22, [x19, 2] strb wzr, [x19, 6] strh wzr, [x19, 4] -.L882: +.L875: ldr w0, [x29, 164] cmp w22, w26 cset w1, eq cmp w27, w0 cset w0, eq tst w1, w0 - beq .L883 -.L998: + beq .L876 +.L991: mov w2, w27 mov w1, w22 mov x0, x19 bl ftl_sb_update_avl_pages - b .L990 -.L868: + b .L983 +.L861: add w20, w20, 1 and w20, w20, 65535 add x0, x19, x20, sxtw 1 ldrh w0, [x0, 16] - b .L867 -.L869: - cbz w26, .L871 - adrp x1, .LANCHOR155 + b .L860 +.L862: + cbz w26, .L864 + adrp x1, .LANCHOR154 adrp x0, .LC1 - mov w2, 1800 - add x1, x1, :lo12:.LANCHOR155 + mov w2, 1802 + add x1, x1, :lo12:.LANCHOR154 add x0, x0, :lo12:.LC1 bl printf -.L871: +.L864: ldr w0, [x29, 164] cmp w0, 0 ccmp w20, w0, 4, ne - beq .L872 - adrp x1, .LANCHOR155 + beq .L865 + adrp x1, .LANCHOR154 adrp x0, .LC1 - mov w2, 1801 - add x1, x1, :lo12:.LANCHOR155 + mov w2, 1803 + add x1, x1, :lo12:.LANCHOR154 add x0, x0, :lo12:.LC1 bl printf -.L872: +.L865: strh wzr, [x19, 2] - b .L997 -.L874: + b .L990 +.L867: ldrh w3, [x4] cmp w3, w10 - beq .L873 + beq .L866 ubfiz x2, x22, 5, 16 orr w3, w23, w3, lsl 10 add x2, x0, x2 @@ -6607,90 +6544,90 @@ FtlRecoverySuperblock: asr w3, w3, 2 add x3, x7, x3, sxtw 2 str x3, [x2, 16] -.L873: +.L866: add x4, x4, 2 - b .L870 -.L880: + b .L863 +.L873: ldr w0, [x11] - cbnz w0, .L876 + cbnz w0, .L869 ldr x8, [x11, 16] ldr w5, [x8, 4] cmn w5, #1 - beq .L877 + beq .L870 ldr w1, [x7] mov w0, w5 bl ftl_cmp_data_ver - cbz w0, .L877 + cbz w0, .L870 add w5, w5, 1 str w5, [x7] -.L877: +.L870: ldr w0, [x8] cmn w0, #1 - bne .L879 + bne .L872 ubfiz x3, x3, 5, 16 and w22, w23, 65535 add x3, x4, x3 ldr w0, [x3, 4] - b .L992 -.L876: + b .L985 +.L869: mov w6, w10 -.L879: +.L872: add w3, w3, 1 add x11, x11, 32 and w3, w3, 65535 - b .L875 -.L883: + b .L868 +.L876: mov w0, 65535 cmp w6, w0 - bne .L884 + bne .L877 ldrb w0, [x19, 8] - cbnz w0, .L885 -.L884: - adrp x25, .LANCHOR134 + cbnz w0, .L878 +.L877: + adrp x25, .LANCHOR133 and w28, w23, 65535 - ldr w0, [x25, #:lo12:.LANCHOR134] + ldr w0, [x25, #:lo12:.LANCHOR133] cmn w0, #1 - bne .L886 - str w21, [x25, #:lo12:.LANCHOR134] -.L886: + bne .L879 + str w21, [x25, #:lo12:.LANCHOR133] +.L879: add w0, w26, 7 cmp w0, w23, uxth - bge .L936 + bge .L929 sub w24, w28, #7 and w24, w24, 65535 -.L887: +.L880: ldr x0, [x29, 152] mov w3, 65535 mov w5, 1 - add x4, x0, :lo12:.LANCHOR3 -.L888: + add x4, x0, :lo12:.LANCHOR2 +.L881: cmp w24, w28 - bhi .L898 + bhi .L891 ldrh w1, [x4] mov w23, 0 - ldr x0, [x20, #:lo12:.LANCHOR103] + ldr x0, [x20, #:lo12:.LANCHOR102] add x1, x1, 8 ldr x2, [x29, 168] add x1, x19, x1, lsl 1 - b .L899 -.L936: + b .L892 +.L929: mov w24, w26 - b .L887 -.L890: + b .L880 +.L883: ldrh w6, [x2] cmp w6, w3 - beq .L889 + beq .L882 ubfiz x7, x23, 5, 16 add w23, w23, 1 add x7, x0, x7 and w23, w23, 65535 orr w6, w24, w6, lsl 10 str w6, [x7, 4] -.L889: +.L882: add x2, x2, 2 -.L899: +.L892: cmp x1, x2 - bne .L890 + bne .L883 mov w1, w23 mov w2, 0 str w5, [x29, 112] @@ -6699,114 +6636,114 @@ FtlRecoverySuperblock: add x23, x23, 16 str x4, [x29, 136] bl FlashReadPages - ldr x2, [x20, #:lo12:.LANCHOR103] - ldr w1, [x25, #:lo12:.LANCHOR134] + ldr x2, [x20, #:lo12:.LANCHOR102] + ldr w1, [x25, #:lo12:.LANCHOR133] ldr w5, [x29, 112] add x0, x2, 16 ldr w3, [x29, 120] add x23, x2, x23 ldr x4, [x29, 136] mov w2, 0 -.L891: +.L884: cmp x23, x0 - bne .L896 - cbz w2, .L897 - str w1, [x25, #:lo12:.LANCHOR134] -.L897: + bne .L889 + cbz w2, .L890 + str w1, [x25, #:lo12:.LANCHOR133] +.L890: add w24, w24, 1 and w24, w24, 65535 - b .L888 -.L896: + b .L881 +.L889: ldr w6, [x0, -16] - cbz w6, .L892 - cbz w2, .L885 - str w1, [x25, #:lo12:.LANCHOR134] -.L885: - adrp x0, .LANCHOR156 + cbz w6, .L885 + cbz w2, .L878 + str w1, [x25, #:lo12:.LANCHOR133] +.L878: + adrp x0, .LANCHOR155 mov w23, w26 mov w1, 1 - adrp x28, .LANCHOR134 - strh w1, [x0, #:lo12:.LANCHOR156] - add x0, x28, :lo12:.LANCHOR134 + adrp x28, .LANCHOR133 + strh w1, [x0, #:lo12:.LANCHOR155] + add x0, x28, :lo12:.LANCHOR133 str x0, [x29, 104] -.L900: +.L893: ldr x1, [x29, 152] mov w24, 0 - ldr x0, [x20, #:lo12:.LANCHOR103] + ldr x0, [x20, #:lo12:.LANCHOR102] mov w5, 65535 ldr x2, [x29, 168] - ldrh w1, [x1, #:lo12:.LANCHOR3] + ldrh w1, [x1, #:lo12:.LANCHOR2] add x1, x1, 8 add x1, x19, x1, lsl 1 -.L901: +.L894: cmp x1, x2 - bne .L903 + bne .L896 mov w2, 0 mov w1, w24 bl FlashReadPages mov x25, 0 ubfiz x0, x24, 5, 16 str x0, [x29, 112] - adrp x0, .LANCHOR157 - add x0, x0, :lo12:.LANCHOR157 + adrp x0, .LANCHOR156 + add x0, x0, :lo12:.LANCHOR156 str x0, [x29, 120] -.L904: +.L897: ldr x0, [x29, 112] cmp x25, x0 - bne .L930 + bne .L923 ldr x0, [x29, 128] add w23, w23, 1 and w23, w23, 65535 - ldrh w0, [x0, #:lo12:.LANCHOR19] + ldrh w0, [x0, #:lo12:.LANCHOR18] cmp w0, w23 - bne .L900 + bne .L893 ldr x0, [x29, 152] mov w2, 65535 strh w23, [x19, 2] strh wzr, [x19, 4] - ldrh w1, [x0, #:lo12:.LANCHOR3] + ldrh w1, [x0, #:lo12:.LANCHOR2] mov w0, 0 -.L931: +.L924: cmp w0, w1 - beq .L990 + beq .L983 ldr x4, [x29, 168] ldrh w3, [x4], 2 str x4, [x29, 168] cmp w3, w2 - beq .L932 + beq .L925 strb w0, [x19, 6] - b .L990 -.L892: + b .L983 +.L885: ldr x6, [x0] ldrh w7, [x6] cmp w7, w3 - beq .L895 + beq .L888 ldr w6, [x6, 4] cmn w6, #1 csel w1, w1, w6, eq csel w2, w2, w5, eq -.L895: +.L888: add x0, x0, 32 - b .L891 -.L898: + b .L884 +.L891: mov w0, -1 - str w0, [x25, #:lo12:.LANCHOR134] - b .L885 -.L903: + str w0, [x25, #:lo12:.LANCHOR133] + b .L878 +.L896: ldrh w3, [x2] cmp w3, w5 - beq .L902 + beq .L895 ubfiz x4, x24, 5, 16 add w24, w24, 1 add x4, x0, x4 and w24, w24, 65535 orr w3, w23, w3, lsl 10 str w3, [x4, 4] -.L902: +.L895: add x2, x2, 2 - b .L901 -.L930: - ldr x4, [x20, #:lo12:.LANCHOR103] + b .L894 +.L923: + ldr x4, [x20, #:lo12:.LANCHOR102] add x4, x4, x25 ldr w5, [x4, 4] str w5, [x29, 188] @@ -6814,54 +6751,54 @@ FtlRecoverySuperblock: bl P2V_plane and w0, w0, 65535 cmp w23, w26 - bcc .L905 + bcc .L898 ldr w1, [x29, 164] ccmp w1, w0, 0, eq - bhi .L905 + bhi .L898 cmp w23, w22 ccmp w27, w0, 0, eq - beq .L906 + beq .L899 ldr w0, [x4] cmn w0, #1 - beq .L907 + beq .L900 ldr x3, [x4, 16] mov w0, 61589 ldrh w1, [x3] cmp w1, w0 - beq .L908 + beq .L901 ldrh w0, [x19] -.L994: +.L987: bl decrement_vpc_count - b .L905 -.L908: + b .L898 +.L901: ldr w21, [x3, 4] cmn w21, #1 - beq .L909 + beq .L902 ldr x0, [x29, 144] - ldr w1, [x0, #:lo12:.LANCHOR83] + ldr w1, [x0, #:lo12:.LANCHOR82] mov w0, w21 bl ftl_cmp_data_ver - cbz w0, .L909 + cbz w0, .L902 ldr x1, [x29, 144] add w0, w21, 1 - str w0, [x1, #:lo12:.LANCHOR83] -.L909: + str w0, [x1, #:lo12:.LANCHOR82] +.L902: ldp w24, w0, [x3, 8] add x1, x29, 184 str w0, [x29, 180] mov w2, 0 mov w0, w24 bl log2phys - ldr w1, [x28, #:lo12:.LANCHOR134] + ldr w1, [x28, #:lo12:.LANCHOR133] ldr w3, [x29, 180] cmn w1, #1 - beq .L910 + beq .L903 mov w0, w21 bl ftl_cmp_data_ver - cbz w0, .L910 + cbz w0, .L903 cmn w3, #1 - beq .L911 - ldr x0, [x20, #:lo12:.LANCHOR103] + beq .L904 + ldr x0, [x20, #:lo12:.LANCHOR102] mov w2, 0 mov w1, 1 add x0, x0, x25 @@ -6869,80 +6806,80 @@ FtlRecoverySuperblock: str w3, [x0, 4] str x4, [x29, 136] bl FlashReadPages - ldr x0, [x20, #:lo12:.LANCHOR103] + ldr x0, [x20, #:lo12:.LANCHOR102] ldr x4, [x29, 136] add x3, x0, x25 ldr w0, [x0, x25] cmn w0, #1 - bne .L912 -.L913: + bne .L905 +.L906: mov w0, -1 str w0, [x29, 180] -.L920: +.L913: ldr w3, [x29, 180] cmn w3, #1 - beq .L905 -.L935: + beq .L898 +.L928: lsr w0, w3, 10 bl P2V_block_in_plane and w24, w0, 65535 - adrp x0, .LANCHOR5 + adrp x0, .LANCHOR4 mov w3, w24 - ldrh w0, [x0, #:lo12:.LANCHOR5] + ldrh w0, [x0, #:lo12:.LANCHOR4] cmp w0, w24 - bhi .L926 - mov w2, 2057 - adrp x1, .LANCHOR155 + bhi .L919 + mov w2, 2059 + adrp x1, .LANCHOR154 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR155 + add x1, x1, :lo12:.LANCHOR154 add x0, x0, :lo12:.LC1 str w24, [x29, 136] bl printf ldr w3, [x29, 136] -.L926: - adrp x1, .LANCHOR42 +.L919: + adrp x1, .LANCHOR41 ubfiz x0, x24, 1, 16 - ldr x1, [x1, #:lo12:.LANCHOR42] + ldr x1, [x1, #:lo12:.LANCHOR41] ldrh w0, [x1, x0] - cbz w0, .L927 + cbz w0, .L920 mov w0, w3 - b .L994 -.L911: + b .L987 +.L904: ldp w1, w0, [x29, 184] cmp w1, w0 - bne .L905 + bne .L898 mov w2, 1 add x1, x29, 180 mov w0, w24 bl log2phys -.L905: +.L898: add x25, x25, 32 - b .L904 -.L912: + b .L897 +.L905: ldr w0, [x4, 8] cmp w24, w0 - bne .L913 + bne .L906 ldr w0, [x4, 4] str w0, [x29, 136] str x4, [x29, 96] uxtw x1, w0 - ldr w0, [x28, #:lo12:.LANCHOR134] + ldr w0, [x28, #:lo12:.LANCHOR133] bl ftl_cmp_data_ver - cbz w0, .L913 + cbz w0, .L906 ldp w0, w1, [x29, 184] ldr x4, [x29, 96] cmp w0, w1 ldr w1, [x29, 180] - bne .L915 -.L993: + bne .L908 +.L986: mov w0, w24 bl FtlReUsePrevPpa - b .L913 -.L915: + b .L906 +.L908: cmp w0, w1 - beq .L913 + beq .L906 cmn w0, #1 - beq .L916 + beq .L909 ldr x4, [x3, 16] mov w2, 0 str w0, [x3, 4] @@ -6951,128 +6888,128 @@ FtlRecoverySuperblock: mov x0, x3 bl FlashReadPages ldr x4, [x29, 96] -.L917: - ldr x0, [x20, #:lo12:.LANCHOR103] +.L910: + ldr x0, [x20, #:lo12:.LANCHOR102] ldr w0, [x0, x25] cmn w0, #1 - beq .L918 + beq .L911 ldr x0, [x29, 104] ldr w3, [x4, 4] mov w1, w3 ldr w0, [x0] bl ftl_cmp_data_ver - cbz w0, .L918 + cbz w0, .L911 ldr w0, [x29, 136] mov w1, w3 bl ftl_cmp_data_ver - cbz w0, .L913 -.L918: + cbz w0, .L906 +.L911: ldr w1, [x29, 180] - b .L993 -.L916: + b .L986 +.L909: str w0, [x3] - b .L917 -.L910: + b .L910 +.L903: ldp w1, w0, [x29, 184] cmp w1, w0 - beq .L920 + beq .L913 cmn w3, #1 - beq .L922 - adrp x0, .LANCHOR8 - ldr w0, [x0, #:lo12:.LANCHOR8] + beq .L915 + adrp x0, .LANCHOR7 + ldr w0, [x0, #:lo12:.LANCHOR7] cmp w0, w3, lsr 10 - bhi .L922 + bhi .L915 adrp x0, .LC27 mov w1, w3 add x0, x0, :lo12:.LC27 -.L996: +.L989: bl printf - b .L905 -.L922: + b .L898 +.L915: mov w2, 1 add x1, x29, 188 mov w0, w24 bl log2phys ldr w3, [x29, 184] cmn w3, #1 - beq .L920 + beq .L913 ldr w0, [x29, 180] cmp w3, w0 - beq .L935 + beq .L928 lsr w0, w3, 10 bl P2V_block_in_plane - adrp x1, .LANCHOR51 + adrp x1, .LANCHOR50 and w0, w0, 65535 + ldrh w1, [x1, #:lo12:.LANCHOR50] + cmp w1, w0 + beq .L918 + adrp x1, .LANCHOR51 ldrh w1, [x1, #:lo12:.LANCHOR51] cmp w1, w0 - beq .L925 + beq .L918 adrp x1, .LANCHOR52 ldrh w1, [x1, #:lo12:.LANCHOR52] cmp w1, w0 - beq .L925 - adrp x1, .LANCHOR53 - ldrh w1, [x1, #:lo12:.LANCHOR53] - cmp w1, w0 - bne .L920 -.L925: - ldr x0, [x20, #:lo12:.LANCHOR103] + bne .L913 +.L918: + ldr x0, [x20, #:lo12:.LANCHOR102] mov w2, 0 mov w1, 1 ldr x4, [x0, 16] str w3, [x0, 4] str x4, [x29, 136] bl FlashReadPages - ldr x0, [x20, #:lo12:.LANCHOR103] + ldr x0, [x20, #:lo12:.LANCHOR102] ldr w0, [x0] cmn w0, #1 - beq .L920 + beq .L913 ldr x4, [x29, 136] mov w0, w21 ldr w1, [x4, 4] bl ftl_cmp_data_ver - cbnz w0, .L920 + cbnz w0, .L913 mov w2, 1 add x1, x29, 184 mov w0, w24 bl log2phys - b .L920 -.L927: + b .L913 +.L920: adrp x0, .LC28 mov w1, w24 add x0, x0, :lo12:.LC28 - b .L996 -.L907: + b .L989 +.L900: ldr x0, [x29, 120] ldr w0, [x0] cmp w0, 31 - bhi .L928 - adrp x1, .LANCHOR158 - add x1, x1, :lo12:.LANCHOR158 + bhi .L921 + adrp x1, .LANCHOR157 + add x1, x1, :lo12:.LANCHOR157 str w5, [x1, w0, uxtw 2] add w0, w0, 1 ldr x1, [x29, 120] str w0, [x1] -.L928: +.L921: ldrh w0, [x19] bl decrement_vpc_count - ldr w0, [x28, #:lo12:.LANCHOR134] + ldr w0, [x28, #:lo12:.LANCHOR133] cmn w0, #1 - bne .L929 -.L995: - str w21, [x28, #:lo12:.LANCHOR134] - b .L905 -.L929: + bne .L922 +.L988: + str w21, [x28, #:lo12:.LANCHOR133] + b .L898 +.L922: cmp w21, w0 - bcs .L905 - b .L995 -.L932: + bcs .L898 + b .L988 +.L925: add w0, w0, 1 and w0, w0, 65535 - b .L931 -.L906: + b .L924 +.L899: strb w27, [x19, 6] strh w22, [x19, 2] - b .L998 + b .L991 .size FtlRecoverySuperblock, .-FtlRecoverySuperblock .section .text.ftl_check_vpc,"ax",@progbits .align 2 @@ -7084,15 +7021,15 @@ ftl_check_vpc: add x0, x0, :lo12:.LC29 add x29, sp, 0 stp x23, x24, [sp, 48] - adrp x23, .LANCHOR152 - add x23, x23, :lo12:.LANCHOR152 + adrp x23, .LANCHOR151 + add x23, x23, :lo12:.LANCHOR151 stp x21, x22, [sp, 32] mov w22, 0 stp x19, x20, [sp, 16] stp x25, x26, [sp, 64] - adrp x21, .LANCHOR159 + adrp x21, .LANCHOR158 stp x27, x28, [sp, 80] - add x1, x21, :lo12:.LANCHOR159 + add x1, x21, :lo12:.LANCHOR158 adrp x20, check_vpc_table bl printf add x19, x20, :lo12:check_vpc_table @@ -7100,35 +7037,35 @@ ftl_check_vpc: mov w1, 0 mov x0, x19 bl ftl_memset -.L1000: +.L993: ldr w0, [x23] cmp w22, w0 - bcc .L1002 - adrp x22, .LANCHOR5 + bcc .L995 + adrp x22, .LANCHOR4 adrp x24, .LC30 - add x22, x22, :lo12:.LANCHOR5 + add x22, x22, :lo12:.LANCHOR4 add x26, x20, :lo12:check_vpc_table add x24, x24, :lo12:.LC30 mov w23, 0 mov w19, 0 - adrp x25, .LANCHOR42 -.L1003: + adrp x25, .LANCHOR41 +.L996: ldrh w0, [x22] cmp w0, w19 - bhi .L1005 - adrp x0, .LANCHOR46 - ldr x19, [x0, #:lo12:.LANCHOR46] - cbz x19, .L1006 - adrp x0, .LANCHOR48 + bhi .L998 + adrp x0, .LANCHOR45 + ldr x19, [x0, #:lo12:.LANCHOR45] + cbz x19, .L999 + adrp x0, .LANCHOR47 adrp x25, .LC31 add x20, x20, :lo12:check_vpc_table add x25, x25, :lo12:.LC31 - ldrh w26, [x0, #:lo12:.LANCHOR48] - adrp x0, .LANCHOR40 + ldrh w26, [x0, #:lo12:.LANCHOR47] + adrp x0, .LANCHOR39 mov x24, x0 mov w22, 0 - ldr x1, [x0, #:lo12:.LANCHOR40] - adrp x27, .LANCHOR42 + ldr x1, [x0, #:lo12:.LANCHOR39] + adrp x27, .LANCHOR41 mov w28, 6 sub x19, x19, x1 mov x1, -6148914691236517206 @@ -7136,17 +7073,17 @@ ftl_check_vpc: movk x1, 0xaaab, lsl 0 mul x19, x19, x1 and w19, w19, 65535 -.L1007: +.L1000: cmp w22, w26 - bne .L1009 -.L1006: - cbz w23, .L999 + bne .L1002 +.L999: + cbz w23, .L992 adrp x0, .LC1 - mov w2, 2383 - add x1, x21, :lo12:.LANCHOR159 + mov w2, 2387 + add x1, x21, :lo12:.LANCHOR158 add x0, x0, :lo12:.LC1 bl printf -.L999: +.L992: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -7154,66 +7091,66 @@ ftl_check_vpc: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 112 ret -.L1002: +.L995: mov w2, 0 add x1, x29, 108 mov w0, w22 bl log2phys ldr w0, [x29, 108] cmn w0, #1 - beq .L1001 + beq .L994 lsr w0, w0, 10 bl P2V_block_in_plane and x0, x0, 65535 ldrh w1, [x19, x0, lsl 1] add w1, w1, 1 strh w1, [x19, x0, lsl 1] -.L1001: +.L994: add w22, w22, 1 - b .L1000 -.L1005: - ldr x0, [x25, #:lo12:.LANCHOR42] + b .L993 +.L998: + ldr x0, [x25, #:lo12:.LANCHOR41] ubfiz x28, x19, 1, 16 sxtw x27, w19 ldrh w2, [x0, x28] ldrh w3, [x26, x27, lsl 1] cmp w2, w3 - beq .L1004 + beq .L997 mov w1, w19 mov x0, x24 bl printf - ldr x0, [x25, #:lo12:.LANCHOR42] + ldr x0, [x25, #:lo12:.LANCHOR41] mov w1, 65535 ldrh w0, [x0, x28] cmp w0, w1 - beq .L1004 + beq .L997 ldrh w1, [x26, x27, lsl 1] cmp w1, w0 csinc w23, w23, wzr, ls -.L1004: +.L997: add w19, w19, 1 and w19, w19, 65535 - b .L1003 -.L1009: - ldr x1, [x27, #:lo12:.LANCHOR42] + b .L996 +.L1002: + ldr x1, [x27, #:lo12:.LANCHOR41] ubfiz x0, x19, 1, 16 ldrh w2, [x1, x0] - cbz w2, .L1008 + cbz w2, .L1001 ldrh w3, [x20, w19, sxtw 1] mov w23, 1 mov w1, w19 mov x0, x25 bl printf -.L1008: - ldr x0, [x24, #:lo12:.LANCHOR40] +.L1001: + ldr x0, [x24, #:lo12:.LANCHOR39] umull x19, w19, w28 ldrh w19, [x0, x19] mov w0, 65535 cmp w19, w0 - beq .L1006 + beq .L999 add w22, w22, 1 and w22, w22, 65535 - b .L1007 + b .L1000 .size ftl_check_vpc, .-ftl_check_vpc .section .text.ftl_scan_all_data,"ax",@progbits .align 2 @@ -7227,61 +7164,61 @@ ftl_scan_all_data: stp x29, x30, [sp, 16] add x29, sp, 16 stp x19, x20, [sp, 32] - adrp x20, .LANCHOR138 + adrp x20, .LANCHOR137 stp x21, x22, [sp, 48] mov w19, 0 - adrp x21, .LANCHOR152 - add x22, x20, :lo12:.LANCHOR138 - add x21, x21, :lo12:.LANCHOR152 + adrp x21, .LANCHOR151 + add x22, x20, :lo12:.LANCHOR137 + add x21, x21, :lo12:.LANCHOR151 str x23, [sp, 64] bl printf -.L1025: +.L1018: ldr w0, [x21] cmp w19, w0 - bcc .L1031 + bcc .L1024 ldp x19, x20, [sp, 32] ldp x21, x22, [sp, 48] ldp x29, x30, [sp, 16] ldr x23, [sp, 64] add sp, sp, 96 ret -.L1031: +.L1024: mov w2, 0 add x1, x29, 76 mov w0, w19 bl log2phys tst x19, 2047 - bne .L1026 + bne .L1019 ldr w2, [x29, 76] adrp x0, .LC33 mov w1, w19 add x0, x0, :lo12:.LC33 bl printf -.L1026: +.L1019: ldr w1, [x29, 76] cmn w1, #1 - beq .L1028 - add x0, x20, :lo12:.LANCHOR138 - str wzr, [x20, #:lo12:.LANCHOR138] + beq .L1021 + add x0, x20, :lo12:.LANCHOR137 + str wzr, [x20, #:lo12:.LANCHOR137] mov w2, 0 str w1, [x0, 4] - adrp x1, .LANCHOR106 + adrp x1, .LANCHOR105 str w19, [x0, 24] - ldr x1, [x1, #:lo12:.LANCHOR106] + ldr x1, [x1, #:lo12:.LANCHOR105] str x1, [x0, 8] - adrp x1, .LANCHOR114 - ldr x23, [x1, #:lo12:.LANCHOR114] + adrp x1, .LANCHOR113 + ldr x23, [x1, #:lo12:.LANCHOR113] mov w1, 1 str x23, [x0, 16] bl FlashReadPages - ldr w0, [x20, #:lo12:.LANCHOR138] + ldr w0, [x20, #:lo12:.LANCHOR137] cmp w0, 256 ccmn w0, #1, 4, ne - beq .L1029 + beq .L1022 ldr w0, [x23, 8] cmp w19, w0 - beq .L1028 -.L1029: + beq .L1021 +.L1022: ldp x1, x0, [x22, 8] ldr w2, [x1, 4] str w2, [sp] @@ -7293,9 +7230,9 @@ ftl_scan_all_data: add x0, x0, :lo12:.LC34 mov w1, w19 bl printf -.L1028: +.L1021: add w19, w19, 1 - b .L1025 + b .L1018 .size ftl_scan_all_data, .-ftl_scan_all_data .section .text.FtlGcScanTempBlk,"ax",@progbits .align 2 @@ -7305,77 +7242,77 @@ FtlGcScanTempBlk: stp x29, x30, [sp, -144]! add x29, sp, 0 stp x25, x26, [sp, 64] - adrp x25, .LANCHOR160 + adrp x25, .LANCHOR159 stp x19, x20, [sp, 16] mov x19, x0 - ldrh w20, [x25, #:lo12:.LANCHOR160] + ldrh w20, [x25, #:lo12:.LANCHOR159] mov w0, 65535 stp x21, x22, [sp, 32] stp x23, x24, [sp, 48] cmp w20, w0 str x27, [sp, 80] - beq .L1054 - cbnz w20, .L1034 -.L1035: + beq .L1047 + cbnz w20, .L1027 +.L1028: bl FtlGcPageVarInit - b .L1036 -.L1054: + b .L1029 +.L1047: mov w20, 0 -.L1034: - adrp x0, .LANCHOR19 - ldrh w0, [x0, #:lo12:.LANCHOR19] +.L1027: + adrp x0, .LANCHOR18 + ldrh w0, [x0, #:lo12:.LANCHOR18] cmp w0, w1 - beq .L1035 -.L1036: - adrp x26, .LANCHOR152 - add x26, x26, :lo12:.LANCHOR152 -.L1051: + beq .L1028 +.L1029: + adrp x26, .LANCHOR151 + add x26, x26, :lo12:.LANCHOR151 +.L1044: ldrh w1, [x19] mov w0, 65535 strb wzr, [x19, 8] cmp w1, w0 - beq .L1037 -.L1053: - adrp x1, .LANCHOR64 - adrp x24, .LANCHOR103 + beq .L1030 +.L1046: + adrp x1, .LANCHOR63 + adrp x24, .LANCHOR102 add x4, x19, 16 mov w21, 0 - ldr x5, [x1, #:lo12:.LANCHOR64] - adrp x1, .LANCHOR23 - ldr x0, [x24, #:lo12:.LANCHOR103] + ldr x5, [x1, #:lo12:.LANCHOR63] + adrp x1, .LANCHOR22 + ldr x0, [x24, #:lo12:.LANCHOR102] mov w10, 65535 - ldrh w6, [x1, #:lo12:.LANCHOR23] - adrp x1, .LANCHOR65 - ldr x7, [x1, #:lo12:.LANCHOR65] - adrp x1, .LANCHOR24 - ldrh w8, [x1, #:lo12:.LANCHOR24] - adrp x1, .LANCHOR3 - ldrh w1, [x1, #:lo12:.LANCHOR3] + ldrh w6, [x1, #:lo12:.LANCHOR22] + adrp x1, .LANCHOR64 + ldr x7, [x1, #:lo12:.LANCHOR64] + adrp x1, .LANCHOR23 + ldrh w8, [x1, #:lo12:.LANCHOR23] + adrp x1, .LANCHOR2 + ldrh w1, [x1, #:lo12:.LANCHOR2] add x1, x1, 8 add x1, x19, x1, lsl 1 -.L1038: +.L1031: cmp x1, x4 - bne .L1040 + bne .L1033 mov w1, w21 ubfiz x21, x21, 5, 16 mov x22, 0 mov w2, 0 bl FlashReadPages -.L1041: +.L1034: cmp x21, x22 - bne .L1052 - adrp x0, .LANCHOR19 + bne .L1045 + adrp x0, .LANCHOR18 add w20, w20, 1 and w20, w20, 65535 - ldrh w0, [x0, #:lo12:.LANCHOR19] + ldrh w0, [x0, #:lo12:.LANCHOR18] cmp w0, w20 - bhi .L1053 -.L1037: + bhi .L1046 +.L1030: strh w20, [x19, 2] mov w0, -1 strb wzr, [x19, 6] mov w1, w20 - strh w0, [x25, #:lo12:.LANCHOR160] + strh w0, [x25, #:lo12:.LANCHOR159] mov w2, 0 mov x0, x19 bl ftl_sb_update_avl_pages @@ -7387,10 +7324,10 @@ FtlGcScanTempBlk: ldp x25, x26, [sp, 64] ldp x29, x30, [sp], 144 ret -.L1040: +.L1033: ldrh w3, [x4] cmp w3, w10 - beq .L1039 + beq .L1032 ubfiz x2, x21, 5, 16 orr w3, w20, w3, lsl 10 add x2, x0, x2 @@ -7405,94 +7342,94 @@ FtlGcScanTempBlk: asr w3, w3, 2 add x3, x7, x3, sxtw 2 str x3, [x2, 16] -.L1039: +.L1032: add x4, x4, 2 - b .L1038 -.L1052: - ldr x0, [x24, #:lo12:.LANCHOR103] + b .L1031 +.L1045: + ldr x0, [x24, #:lo12:.LANCHOR102] add x1, x0, x22 ldr w0, [x0, x22] ldr w27, [x1, 4] ldr x23, [x1, 16] - cbnz w0, .L1042 + cbnz w0, .L1035 ldrh w1, [x23] mov w0, 65535 cmp w1, w0 - beq .L1064 + beq .L1057 ldr w0, [x23, 8] ldr w1, [x26] cmp w0, w1 - bls .L1044 -.L1064: - adrp x0, .LANCHOR42 + bls .L1037 +.L1057: + adrp x0, .LANCHOR41 ldrh w1, [x19] mov w20, 0 - ldr x0, [x0, #:lo12:.LANCHOR42] + ldr x0, [x0, #:lo12:.LANCHOR41] strh wzr, [x0, x1, lsl 1] ldrh w0, [x19] bl INSERT_FREE_LIST mov w0, -1 - adrp x1, .LANCHOR145 + adrp x1, .LANCHOR144 strh w0, [x19] - strh w0, [x1, #:lo12:.LANCHOR145] + strh w0, [x1, #:lo12:.LANCHOR144] bl FtlGcPageVarInit - b .L1051 -.L1044: + b .L1044 +.L1037: add x1, x29, 108 mov w2, 0 bl log2phys ldr w0, [x23, 12] ldr w1, [x29, 108] cmp w0, w1 - beq .L1046 -.L1048: + beq .L1039 +.L1041: ldr w2, [x23, 8] -.L1065: +.L1058: ldr w0, [x23, 12] mov w1, w27 add x22, x22, 32 bl FtlGcUpdatePage - b .L1041 -.L1046: + b .L1034 +.L1039: cmn w0, #1 - beq .L1048 + beq .L1041 str w0, [x29, 116] - adrp x0, .LANCHOR110 + adrp x0, .LANCHOR109 mov w2, 0 mov w1, 1 - ldr x0, [x0, #:lo12:.LANCHOR110] + ldr x0, [x0, #:lo12:.LANCHOR109] str x0, [x29, 120] - adrp x0, .LANCHOR115 - ldr x0, [x0, #:lo12:.LANCHOR115] + adrp x0, .LANCHOR114 + ldr x0, [x0, #:lo12:.LANCHOR114] str x0, [x29, 128] add x0, x29, 112 bl FlashReadPages - adrp x0, .LANCHOR12 - ldr x2, [x24, #:lo12:.LANCHOR103] + adrp x0, .LANCHOR11 + ldr x2, [x24, #:lo12:.LANCHOR102] ldr x3, [x29, 120] - ldrh w1, [x0, #:lo12:.LANCHOR12] + ldrh w1, [x0, #:lo12:.LANCHOR11] add x2, x2, x22 mov x0, 0 ubfiz x1, x1, 9, 16 -.L1049: +.L1042: cmp x0, x1 - beq .L1048 + beq .L1041 ldr x4, [x2, 8] ldr w5, [x4, x0] add x0, x0, 4 add x4, x3, x0 ldr w4, [x4, -4] cmp w5, w4 - beq .L1049 + beq .L1042 ldrh w1, [x19] adrp x0, .LC35 ldr w2, [x29, 116] add x0, x0, :lo12:.LC35 bl printf - b .L1064 -.L1042: + b .L1057 +.L1035: mov w2, -1 - b .L1065 + b .L1058 .size FtlGcScanTempBlk, .-FtlGcScanTempBlk .section .text.FtlVendorPartWrite,"ax",@progbits .align 2 @@ -7506,25 +7443,25 @@ FtlVendorPartWrite: stp x27, x28, [sp, 80] add w1, w0, w1 mov w28, w0 - adrp x0, .LANCHOR16 + adrp x0, .LANCHOR15 stp x21, x22, [sp, 32] - ldrh w0, [x0, #:lo12:.LANCHOR16] + ldrh w0, [x0, #:lo12:.LANCHOR15] stp x23, x24, [sp, 48] stp x25, x26, [sp, 64] cmp w1, w0 - bhi .L1074 - adrp x0, .LANCHOR22 - adrp x25, .LANCHOR12 - adrp x26, .LANCHOR23 + bhi .L1067 + adrp x0, .LANCHOR21 + adrp x25, .LANCHOR11 + adrp x26, .LANCHOR22 mov x24, x2 - ldrh w21, [x0, #:lo12:.LANCHOR22] - add x25, x25, :lo12:.LANCHOR12 - add x26, x26, :lo12:.LANCHOR23 + ldrh w21, [x0, #:lo12:.LANCHOR21] + add x25, x25, :lo12:.LANCHOR11 + add x26, x26, :lo12:.LANCHOR22 mov w23, 0 lsr w21, w28, w21 -.L1068: - cbnz w20, .L1073 -.L1066: +.L1061: + cbnz w20, .L1066 +.L1059: mov w0, w23 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] @@ -7533,11 +7470,11 @@ FtlVendorPartWrite: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 208 ret -.L1073: +.L1066: ldrh w1, [x25] - adrp x0, .LANCHOR123 - adrp x27, .LANCHOR108 - ldr x0, [x0, #:lo12:.LANCHOR123] + adrp x0, .LANCHOR122 + adrp x27, .LANCHOR107 + ldr x0, [x0, #:lo12:.LANCHOR122] udiv w22, w28, w1 ldr w2, [x0, w21, uxtw 2] and w0, w20, 65535 @@ -7546,10 +7483,10 @@ FtlVendorPartWrite: and w19, w19, 65535 cmp w20, w19 csel w19, w0, w19, cc - cbz w2, .L1070 + cbz w2, .L1063 cmp w19, w1 - beq .L1070 - ldr x0, [x27, #:lo12:.LANCHOR108] + beq .L1063 + ldr x0, [x27, #:lo12:.LANCHOR107] str x0, [x29, 120] add x0, x29, 144 str w2, [x29, 116] @@ -7558,19 +7495,19 @@ FtlVendorPartWrite: mov w1, w2 add x0, x29, 112 bl FlashReadPages -.L1071: +.L1064: lsl w4, w19, 9 - ldr x0, [x27, #:lo12:.LANCHOR108] + ldr x0, [x27, #:lo12:.LANCHOR107] lsl w22, w22, 7 mov w2, w4 mov x1, x24 str w4, [x29, 108] add x0, x0, x22, sxtw 2 bl ftl_memcpy - ldr x2, [x27, #:lo12:.LANCHOR108] + ldr x2, [x27, #:lo12:.LANCHOR107] mov w1, w21 - adrp x0, .LANCHOR161 - add x0, x0, :lo12:.LANCHOR161 + adrp x0, .LANCHOR160 + add x0, x0, :lo12:.LANCHOR160 sub w20, w20, w19 add w28, w28, w19 add w21, w21, 1 @@ -7579,72 +7516,72 @@ FtlVendorPartWrite: ldr w4, [x29, 108] csinv w23, w23, wzr, ne add x24, x24, x4, sxtw - b .L1068 -.L1070: + b .L1061 +.L1063: ldrh w2, [x26] mov w1, 0 - ldr x0, [x27, #:lo12:.LANCHOR108] + ldr x0, [x27, #:lo12:.LANCHOR107] bl ftl_memset - b .L1071 -.L1074: + b .L1064 +.L1067: mov w23, -1 - b .L1066 + b .L1059 .size FtlVendorPartWrite, .-FtlVendorPartWrite .section .text.Ftl_save_ext_data,"ax",@progbits .align 2 .global Ftl_save_ext_data .type Ftl_save_ext_data, %function Ftl_save_ext_data: - adrp x0, .LANCHOR135 - add x2, x0, :lo12:.LANCHOR135 - ldr w1, [x0, #:lo12:.LANCHOR135] + adrp x0, .LANCHOR134 + add x2, x0, :lo12:.LANCHOR134 + ldr w1, [x0, #:lo12:.LANCHOR134] mov w0, 19539 movk w0, 0x4654, lsl 16 cmp w1, w0 - bne .L1079 - mov w0, 72 + bne .L1072 + mov w0, 85 mov w1, 1 movk w0, 0x5000, lsl 16 str w0, [x2, 4] + adrp x0, .LANCHOR161 + ldr w0, [x0, #:lo12:.LANCHOR161] + str w0, [x2, 88] adrp x0, .LANCHOR162 ldr w0, [x0, #:lo12:.LANCHOR162] - str w0, [x2, 88] - adrp x0, .LANCHOR163 - ldr w0, [x0, #:lo12:.LANCHOR163] str w0, [x2, 92] + adrp x0, .LANCHOR83 + ldr w0, [x0, #:lo12:.LANCHOR83] + str w0, [x2, 8] adrp x0, .LANCHOR84 ldr w0, [x0, #:lo12:.LANCHOR84] - str w0, [x2, 8] - adrp x0, .LANCHOR85 - ldr w0, [x0, #:lo12:.LANCHOR85] str w0, [x2, 12] - adrp x0, .LANCHOR89 - ldr w0, [x0, #:lo12:.LANCHOR89] - str w0, [x2, 16] adrp x0, .LANCHOR88 ldr w0, [x0, #:lo12:.LANCHOR88] - str w0, [x2, 20] - adrp x0, .LANCHOR91 - ldr w0, [x0, #:lo12:.LANCHOR91] - str w0, [x2, 28] - adrp x0, .LANCHOR80 - ldr w0, [x0, #:lo12:.LANCHOR80] - str w0, [x2, 32] - adrp x0, .LANCHOR86 - ldr w0, [x0, #:lo12:.LANCHOR86] - str w0, [x2, 36] + str w0, [x2, 16] adrp x0, .LANCHOR87 ldr w0, [x0, #:lo12:.LANCHOR87] + str w0, [x2, 20] + adrp x0, .LANCHOR90 + ldr w0, [x0, #:lo12:.LANCHOR90] + str w0, [x2, 28] + adrp x0, .LANCHOR79 + ldr w0, [x0, #:lo12:.LANCHOR79] + str w0, [x2, 32] + adrp x0, .LANCHOR85 + ldr w0, [x0, #:lo12:.LANCHOR85] + str w0, [x2, 36] + adrp x0, .LANCHOR86 + ldr w0, [x0, #:lo12:.LANCHOR86] str w0, [x2, 40] + adrp x0, .LANCHOR91 + ldr w0, [x0, #:lo12:.LANCHOR91] + str w0, [x2, 44] adrp x0, .LANCHOR92 ldr w0, [x0, #:lo12:.LANCHOR92] - str w0, [x2, 44] - adrp x0, .LANCHOR93 - ldr w0, [x0, #:lo12:.LANCHOR93] str w0, [x2, 48] mov w0, 0 b FtlVendorPartWrite -.L1079: +.L1072: ret .size Ftl_save_ext_data, .-Ftl_save_ext_data .section .text.FtlEctTblFlush,"ax",@progbits @@ -7652,34 +7589,34 @@ Ftl_save_ext_data: .global FtlEctTblFlush .type FtlEctTblFlush, %function FtlEctTblFlush: - adrp x2, .LANCHOR164 - ldrh w1, [x2, #:lo12:.LANCHOR164] + adrp x2, .LANCHOR163 + ldrh w1, [x2, #:lo12:.LANCHOR163] cmp w1, 31 - bhi .L1085 + bhi .L1078 add w1, w1, 1 - strh w1, [x2, #:lo12:.LANCHOR164] + strh w1, [x2, #:lo12:.LANCHOR163] mov w1, 1 -.L1082: - adrp x2, .LANCHOR118 - cbnz w0, .L1083 - ldr x0, [x2, #:lo12:.LANCHOR118] +.L1075: + adrp x2, .LANCHOR117 + cbnz w0, .L1076 + ldr x0, [x2, #:lo12:.LANCHOR117] ldr w3, [x0, 20] ldr w0, [x0, 16] add w1, w1, w3 cmp w0, w1 - bcc .L1087 -.L1083: + bcc .L1080 +.L1076: stp x29, x30, [sp, -16]! add x29, sp, 0 - ldr x2, [x2, #:lo12:.LANCHOR118] + ldr x2, [x2, #:lo12:.LANCHOR117] ldr w0, [x2, 16] str w0, [x2, 20] mov w0, 17221 str wzr, [x2, 4] movk w0, 0x4254, lsl 16 str w0, [x2] - adrp x0, .LANCHOR116 - ldrh w1, [x0, #:lo12:.LANCHOR116] + adrp x0, .LANCHOR115 + ldrh w1, [x0, #:lo12:.LANCHOR115] lsl w0, w1, 9 str w0, [x2, 12] ldr w0, [x2, 8] @@ -7691,10 +7628,10 @@ FtlEctTblFlush: mov w0, 0 ldp x29, x30, [sp], 16 ret -.L1085: +.L1078: mov w1, 32 - b .L1082 -.L1087: + b .L1075 +.L1080: mov w0, 0 ret .size FtlEctTblFlush, .-FtlEctTblFlush @@ -7717,26 +7654,26 @@ FtlVendorPartRead: mov w22, w0 mov w21, w1 add w1, w0, w1 - adrp x0, .LANCHOR16 + adrp x0, .LANCHOR15 stp x19, x20, [sp, 16] stp x23, x24, [sp, 48] - ldrh w0, [x0, #:lo12:.LANCHOR16] + ldrh w0, [x0, #:lo12:.LANCHOR15] stp x25, x26, [sp, 64] stp x27, x28, [sp, 80] cmp w1, w0 - bhi .L1099 - adrp x0, .LANCHOR22 + bhi .L1092 + adrp x0, .LANCHOR21 mov x25, x2 mov w24, 0 - adrp x27, .LANCHOR123 - ldrh w20, [x0, #:lo12:.LANCHOR22] - adrp x0, .LANCHOR12 - add x0, x0, :lo12:.LANCHOR12 + adrp x27, .LANCHOR122 + ldrh w20, [x0, #:lo12:.LANCHOR21] + adrp x0, .LANCHOR11 + add x0, x0, :lo12:.LANCHOR11 str x0, [x29, 104] lsr w20, w22, w20 -.L1092: - cbnz w21, .L1098 -.L1090: +.L1085: + cbnz w21, .L1091 +.L1083: mov w0, w24 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] @@ -7745,8 +7682,8 @@ FtlVendorPartRead: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 208 ret -.L1098: - ldr x0, [x27, #:lo12:.LANCHOR123] +.L1091: + ldr x0, [x27, #:lo12:.LANCHOR122] ldr w4, [x0, w20, uxtw 2] ldr x0, [x29, 104] ldrh w19, [x0] @@ -7758,12 +7695,12 @@ FtlVendorPartRead: cmp w21, w19 csel w19, w0, w19, cc lsl w26, w19, 9 - cbz w4, .L1094 - adrp x28, .LANCHOR108 + cbz w4, .L1087 + adrp x28, .LANCHOR107 mov w2, 1 str w4, [x29, 96] mov w1, w2 - ldr x0, [x28, #:lo12:.LANCHOR108] + ldr x0, [x28, #:lo12:.LANCHOR107] str x0, [x29, 120] add x0, x29, 144 str w4, [x29, 116] @@ -7774,45 +7711,45 @@ FtlVendorPartRead: mov x5, x28 ldr w4, [x29, 96] cmn w0, #1 - adrp x0, .LANCHOR138 + adrp x0, .LANCHOR137 csinv w24, w24, wzr, ne - ldr w0, [x0, #:lo12:.LANCHOR138] + ldr w0, [x0, #:lo12:.LANCHOR137] cmp w0, 256 - bne .L1096 + bne .L1089 mov w2, w4 mov w1, w20 adrp x0, .LC36 str x28, [x29, 96] add x0, x0, :lo12:.LC36 bl printf - ldr x2, [x28, #:lo12:.LANCHOR108] + ldr x2, [x28, #:lo12:.LANCHOR107] mov w1, w20 - adrp x0, .LANCHOR161 - add x0, x0, :lo12:.LANCHOR161 + adrp x0, .LANCHOR160 + add x0, x0, :lo12:.LANCHOR160 bl FtlMapWritePage ldr x5, [x29, 96] -.L1096: - ldr x1, [x5, #:lo12:.LANCHOR108] +.L1089: + ldr x1, [x5, #:lo12:.LANCHOR107] lsl w23, w23, 7 mov w2, w26 mov x0, x25 add x1, x1, x23, sxtw 2 bl ftl_memcpy -.L1097: +.L1090: add w20, w20, 1 sub w21, w21, w19 add w22, w22, w19 add x25, x25, x26, sxtw - b .L1092 -.L1094: + b .L1085 +.L1087: mov w2, w26 mov w1, 0 mov x0, x25 bl ftl_memset - b .L1097 -.L1099: - mov w24, -1 b .L1090 +.L1092: + mov w24, -1 + b .L1083 .size FtlVendorPartRead, .-FtlVendorPartRead .section .text.FtlLoadEctTbl,"ax",@progbits .align 2 @@ -7823,28 +7760,28 @@ FtlLoadEctTbl: mov w0, 64 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x19, .LANCHOR118 - adrp x20, .LANCHOR116 - ldr x2, [x19, #:lo12:.LANCHOR118] - ldrh w1, [x20, #:lo12:.LANCHOR116] + adrp x19, .LANCHOR117 + adrp x20, .LANCHOR115 + ldr x2, [x19, #:lo12:.LANCHOR117] + ldrh w1, [x20, #:lo12:.LANCHOR115] bl FtlVendorPartRead - ldr x0, [x19, #:lo12:.LANCHOR118] + ldr x0, [x19, #:lo12:.LANCHOR117] ldr w1, [x0] mov w0, 17221 movk w0, 0x4254, lsl 16 cmp w1, w0 - beq .L1102 + beq .L1095 adrp x1, .LC37 adrp x0, .LC38 add x1, x1, :lo12:.LC37 add x0, x0, :lo12:.LC38 bl printf - ldr x0, [x19, #:lo12:.LANCHOR118] + ldr x0, [x19, #:lo12:.LANCHOR117] mov w1, 0 - ldrh w2, [x20, #:lo12:.LANCHOR116] + ldrh w2, [x20, #:lo12:.LANCHOR115] lsl w2, w2, 9 bl ftl_memset -.L1102: +.L1095: mov w0, 0 ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 @@ -7860,76 +7797,76 @@ Ftl_load_ext_data: mov w0, 0 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x19, .LANCHOR135 + adrp x19, .LANCHOR134 str x21, [sp, 32] - add x21, x19, :lo12:.LANCHOR135 + add x21, x19, :lo12:.LANCHOR134 mov x2, x21 bl FtlVendorPartRead - ldr w0, [x19, #:lo12:.LANCHOR135] + ldr w0, [x19, #:lo12:.LANCHOR134] mov w20, 19539 movk w20, 0x4654, lsl 16 cmp w0, w20 - beq .L1105 + beq .L1098 mov w2, 512 mov w1, 0 mov x0, x21 bl ftl_memset - str w20, [x19, #:lo12:.LANCHOR135] -.L1105: - ldr w1, [x19, #:lo12:.LANCHOR135] - add x0, x19, :lo12:.LANCHOR135 + str w20, [x19, #:lo12:.LANCHOR134] +.L1098: + ldr w1, [x19, #:lo12:.LANCHOR134] + add x0, x19, :lo12:.LANCHOR134 cmp w1, w20 - adrp x1, .LANCHOR91 - bne .L1106 - adrp x2, .LANCHOR162 + adrp x1, .LANCHOR90 + bne .L1099 + adrp x2, .LANCHOR161 ldr w3, [x0, 88] - str w3, [x2, #:lo12:.LANCHOR162] - adrp x2, .LANCHOR163 + str w3, [x2, #:lo12:.LANCHOR161] + adrp x2, .LANCHOR162 ldr w3, [x0, 92] - str w3, [x2, #:lo12:.LANCHOR163] - adrp x2, .LANCHOR84 + str w3, [x2, #:lo12:.LANCHOR162] + adrp x2, .LANCHOR83 ldr w3, [x0, 8] - str w3, [x2, #:lo12:.LANCHOR84] - adrp x2, .LANCHOR85 + str w3, [x2, #:lo12:.LANCHOR83] + adrp x2, .LANCHOR84 ldr w3, [x0, 12] - str w3, [x2, #:lo12:.LANCHOR85] - adrp x2, .LANCHOR89 - ldr w3, [x0, 16] - str w3, [x2, #:lo12:.LANCHOR89] + str w3, [x2, #:lo12:.LANCHOR84] adrp x2, .LANCHOR88 - ldr w3, [x0, 20] + ldr w3, [x0, 16] str w3, [x2, #:lo12:.LANCHOR88] - ldp w2, w3, [x0, 28] - str w2, [x1, #:lo12:.LANCHOR91] - adrp x2, .LANCHOR80 - str w3, [x2, #:lo12:.LANCHOR80] - adrp x2, .LANCHOR86 - ldr w3, [x0, 36] - str w3, [x2, #:lo12:.LANCHOR86] adrp x2, .LANCHOR87 - ldr w3, [x0, 40] + ldr w3, [x0, 20] str w3, [x2, #:lo12:.LANCHOR87] - adrp x2, .LANCHOR92 + ldp w2, w3, [x0, 28] + str w2, [x1, #:lo12:.LANCHOR90] + adrp x2, .LANCHOR79 + str w3, [x2, #:lo12:.LANCHOR79] + adrp x2, .LANCHOR85 + ldr w3, [x0, 36] + str w3, [x2, #:lo12:.LANCHOR85] + adrp x2, .LANCHOR86 + ldr w3, [x0, 40] + str w3, [x2, #:lo12:.LANCHOR86] + adrp x2, .LANCHOR91 ldr w3, [x0, 44] - str w3, [x2, #:lo12:.LANCHOR92] + str w3, [x2, #:lo12:.LANCHOR91] ldr w2, [x0, 48] - adrp x0, .LANCHOR93 - str w2, [x0, #:lo12:.LANCHOR93] -.L1106: - adrp x0, .LANCHOR14 - adrp x2, .LANCHOR90 - ldr w1, [x1, #:lo12:.LANCHOR91] - ldrh w0, [x0, #:lo12:.LANCHOR14] - ldr w2, [x2, #:lo12:.LANCHOR90] + adrp x0, .LANCHOR92 + str w2, [x0, #:lo12:.LANCHOR92] +.L1099: + adrp x0, .LANCHOR13 + adrp x2, .LANCHOR89 + ldr w1, [x1, #:lo12:.LANCHOR90] + ldrh w0, [x0, #:lo12:.LANCHOR13] + ldr w2, [x2, #:lo12:.LANCHOR89] ldp x19, x20, [sp, 16] ldr x21, [sp, 32] madd w0, w0, w2, w1 - adrp x1, .LANCHOR5 + adrp x1, .LANCHOR4 ldp x29, x30, [sp], 48 - ldrh w1, [x1, #:lo12:.LANCHOR5] + ldrh w1, [x1, #:lo12:.LANCHOR4] udiv w0, w0, w1 - adrp x1, .LANCHOR143 - str w0, [x1, #:lo12:.LANCHOR143] + adrp x1, .LANCHOR142 + str w0, [x1, #:lo12:.LANCHOR142] ret .size Ftl_load_ext_data, .-Ftl_load_ext_data .section .text.sftl_vendor_read,"ax",@progbits @@ -7946,37 +7883,37 @@ sftl_vendor_read: .type FtlMapBlkWriteDump_data, %function FtlMapBlkWriteDump_data: ldr w1, [x0, 56] - cbz w1, .L1109 + cbz w1, .L1102 stp x29, x30, [sp, -80]! add x29, sp, 0 stp x19, x20, [sp, 16] mov x19, x0 ldrh w20, [x0, 6] - adrp x0, .LANCHOR107 + adrp x0, .LANCHOR106 stp x21, x22, [sp, 32] stp x23, x24, [sp, 48] - adrp x23, .LANCHOR138 - add x21, x23, :lo12:.LANCHOR138 - ldr x0, [x0, #:lo12:.LANCHOR107] + adrp x23, .LANCHOR137 + add x21, x23, :lo12:.LANCHOR137 + ldr x0, [x0, #:lo12:.LANCHOR106] mov x22, x23 str x0, [x21, 8] - adrp x0, .LANCHOR114 - ldr x24, [x0, #:lo12:.LANCHOR114] + adrp x0, .LANCHOR113 + ldr x24, [x0, #:lo12:.LANCHOR113] ldrh w0, [x19, 2] str x25, [sp, 64] str x24, [x21, 16] str wzr, [x19, 56] ldr x25, [x19, 40] - cbz w0, .L1111 - adrp x1, .LANCHOR20 - ldrh w1, [x1, #:lo12:.LANCHOR20] + cbz w0, .L1104 + adrp x1, .LANCHOR19 + ldrh w1, [x1, #:lo12:.LANCHOR19] sub w1, w1, #1 cmp w0, w1 - bge .L1111 + bge .L1104 ldrh w1, [x19] mov w2, 65535 cmp w1, w2 - beq .L1111 + beq .L1104 ldr x2, [x19, 16] ubfiz x1, x1, 1, 16 sub w0, w0, #1 @@ -7987,18 +7924,18 @@ FtlMapBlkWriteDump_data: str w0, [x21, 4] mov x0, x21 bl FlashReadPages - ldr w0, [x23, #:lo12:.LANCHOR138] + ldr w0, [x23, #:lo12:.LANCHOR137] cmn w0, #1 - beq .L1111 + beq .L1104 ldrh w1, [x24, 8] ldr x2, [x19, 40] ubfiz x0, x1, 2, 16 ldr w2, [x2, x0] ldr w0, [x21, 4] cmp w2, w0 - bne .L1111 + bne .L1104 ldr x2, [x21, 8] -.L1123: +.L1116: mov x0, x19 ldr x25, [sp, 64] ldp x19, x20, [sp, 16] @@ -8006,30 +7943,30 @@ FtlMapBlkWriteDump_data: ldp x23, x24, [sp, 48] ldp x29, x30, [sp], 80 b FtlMapWritePage -.L1111: +.L1104: sub w20, w20, #1 and w20, w20, 65535 ubfiz x0, x20, 2, 16 ldr w1, [x25, x0] - add x0, x22, :lo12:.LANCHOR138 + add x0, x22, :lo12:.LANCHOR137 str w1, [x0, 4] - cbz w1, .L1112 + cbz w1, .L1105 mov w2, 1 mov w1, w2 bl FlashReadPages -.L1113: - add x22, x22, :lo12:.LANCHOR138 +.L1106: + add x22, x22, :lo12:.LANCHOR137 mov w1, w20 ldr x2, [x22, 8] - b .L1123 -.L1112: - adrp x1, .LANCHOR23 + b .L1116 +.L1105: + adrp x1, .LANCHOR22 ldr x0, [x0, 8] - ldrh w2, [x1, #:lo12:.LANCHOR23] + ldrh w2, [x1, #:lo12:.LANCHOR22] mov w1, 255 bl ftl_memset - b .L1113 -.L1109: + b .L1106 +.L1102: ret .size FtlMapBlkWriteDump_data, .-FtlMapBlkWriteDump_data .section .text.FtlVpcTblFlush,"ax",@progbits @@ -8038,47 +7975,47 @@ FtlMapBlkWriteDump_data: .type FtlVpcTblFlush, %function FtlVpcTblFlush: stp x29, x30, [sp, -112]! - adrp x1, .LANCHOR139 + adrp x1, .LANCHOR138 mov w2, 19539 add x29, sp, 0 stp x25, x26, [sp, 64] - adrp x25, .LANCHOR114 + adrp x25, .LANCHOR113 stp x21, x22, [sp, 32] - adrp x22, .LANCHOR106 + adrp x22, .LANCHOR105 + stp x23, x24, [sp, 48] + adrp x21, .LANCHOR137 stp x27, x28, [sp, 80] - adrp x21, .LANCHOR138 - ldr x27, [x25, #:lo12:.LANCHOR114] - add x28, x21, :lo12:.LANCHOR138 + add x24, x21, :lo12:.LANCHOR137 + ldr x27, [x25, #:lo12:.LANCHOR113] + add x28, x1, :lo12:.LANCHOR138 stp x19, x20, [sp, 16] movk w2, 0x4654, lsl 16 - stp x23, x24, [sp, 48] - add x24, x1, :lo12:.LANCHOR139 - ldr x0, [x22, #:lo12:.LANCHOR106] - adrp x23, .LANCHOR82 - ldrh w1, [x1, #:lo12:.LANCHOR139] - adrp x26, .LANCHOR23 - stp x0, x27, [x28, 8] + ldr x0, [x22, #:lo12:.LANCHOR105] + adrp x23, .LANCHOR81 + ldrh w1, [x1, #:lo12:.LANCHOR138] + adrp x26, .LANCHOR22 + stp x0, x27, [x24, 8] mov w20, 0 strh w1, [x27, 2] mov w1, -3932 strh w1, [x27] - ldr w1, [x24, 8] + ldr w1, [x28, 8] stp w1, wzr, [x27, 4] - adrp x1, .LANCHOR39 - add x19, x1, :lo12:.LANCHOR39 + adrp x1, .LANCHOR38 + add x19, x1, :lo12:.LANCHOR38 str wzr, [x27, 12] - str w2, [x1, #:lo12:.LANCHOR39] - mov w1, 72 + str w2, [x1, #:lo12:.LANCHOR38] + mov w1, 85 movk w1, 0x5000, lsl 16 str w1, [x19, 4] - ldrh w1, [x24, 6] - adrp x2, .LANCHOR51 + ldrh w1, [x28, 6] + adrp x2, .LANCHOR50 strh w1, [x19, 8] - adrp x1, .LANCHOR10 - ldrh w1, [x1, #:lo12:.LANCHOR10] + adrp x1, .LANCHOR9 + ldrh w1, [x1, #:lo12:.LANCHOR9] strb w1, [x19, 10] - add x1, x2, :lo12:.LANCHOR51 - ldrh w2, [x2, #:lo12:.LANCHOR51] + add x1, x2, :lo12:.LANCHOR50 + ldrh w2, [x2, #:lo12:.LANCHOR50] strh w2, [x19, 14] ldrh w2, [x1, 2] ldrb w3, [x1, 6] @@ -8086,9 +8023,9 @@ FtlVpcTblFlush: strb w1, [x19, 11] orr w2, w3, w2, lsl 6 strh w2, [x19, 16] - adrp x2, .LANCHOR52 - add x1, x2, :lo12:.LANCHOR52 - ldrh w2, [x2, #:lo12:.LANCHOR52] + adrp x2, .LANCHOR51 + add x1, x2, :lo12:.LANCHOR51 + ldrh w2, [x2, #:lo12:.LANCHOR51] ldrb w3, [x1, 6] strh w2, [x19, 18] ldrh w2, [x1, 2] @@ -8096,89 +8033,77 @@ FtlVpcTblFlush: strb w1, [x19, 12] orr w2, w3, w2, lsl 6 strh w2, [x19, 20] - adrp x2, .LANCHOR53 - add x1, x2, :lo12:.LANCHOR53 - ldrh w2, [x2, #:lo12:.LANCHOR53] + adrp x2, .LANCHOR52 + add x1, x2, :lo12:.LANCHOR52 + ldrh w2, [x2, #:lo12:.LANCHOR52] ldrb w3, [x1, 6] strh w2, [x19, 22] ldrh w2, [x1, 2] ldrb w1, [x1, 8] strb w1, [x19, 13] - adrp x1, .LANCHOR90 + adrp x1, .LANCHOR89 orr w2, w3, w2, lsl 6 strh w2, [x19, 24] - ldr w1, [x1, #:lo12:.LANCHOR90] + ldr w1, [x1, #:lo12:.LANCHOR89] str w1, [x19, 32] - ldr w1, [x23, #:lo12:.LANCHOR82] + ldr w1, [x23, #:lo12:.LANCHOR81] str w1, [x19, 40] - ldrh w2, [x26, #:lo12:.LANCHOR23] - adrp x1, .LANCHOR83 - ldr w1, [x1, #:lo12:.LANCHOR83] + ldrh w2, [x26, #:lo12:.LANCHOR22] + adrp x1, .LANCHOR82 + ldr w1, [x1, #:lo12:.LANCHOR82] str w1, [x19, 36] mov w1, 255 bl ftl_memset - ldr x0, [x28, 8] + ldr x0, [x24, 8] mov x1, x19 mov w2, 48 - adrp x19, .LANCHOR5 + mov x19, x24 bl ftl_memcpy - adrp x1, .LANCHOR42 - ldrh w2, [x19, #:lo12:.LANCHOR5] - ldr x0, [x28, 8] - ldr x1, [x1, #:lo12:.LANCHOR42] + adrp x0, .LANCHOR4 + adrp x1, .LANCHOR41 + ldrh w2, [x0, #:lo12:.LANCHOR4] + ldr x1, [x1, #:lo12:.LANCHOR41] + ldr x0, [x24, 8] + adrp x24, .LANCHOR19 lsl w2, w2, 1 + add x24, x24, :lo12:.LANCHOR19 add x0, x0, 48 bl ftl_memcpy - ldrh w0, [x19, #:lo12:.LANCHOR5] - adrp x1, .LANCHOR1 - ldr x3, [x28, 8] - mov x19, x28 - ldr x1, [x1, #:lo12:.LANCHOR1] - mov x28, x24 - lsr w2, w0, 3 - ubfiz x0, x0, 1, 16 - add w2, w2, 4 - add x0, x0, 48 - and x0, x0, -4 - adrp x24, .LANCHOR20 - add x0, x3, x0 - bl ftl_memcpy mov w0, 0 bl FtlUpdateVaildLpn mov w0, 65535 - add x24, x24, :lo12:.LANCHOR20 - str w0, [x29, 108] str x24, [x29, 96] -.L1125: + str w0, [x29, 108] +.L1118: ldrh w2, [x28, 2] ldrh w1, [x28] - ldr x0, [x22, #:lo12:.LANCHOR106] + ldr x0, [x22, #:lo12:.LANCHOR105] str x0, [x19, 8] - ldr x0, [x25, #:lo12:.LANCHOR114] + ldr x0, [x25, #:lo12:.LANCHOR113] str x0, [x19, 16] orr w0, w2, w1, lsl 10 str w0, [x19, 4] ldrh w0, [x24] sub w0, w0, #1 cmp w2, w0 - blt .L1126 + blt .L1119 ldrh w0, [x28, 4] strh wzr, [x28, 2] strh w1, [x28, 4] str w0, [x29, 108] bl FtlFreeSysBlkQueueOut strh w0, [x28] - ldr w1, [x23, #:lo12:.LANCHOR82] + ldr w1, [x23, #:lo12:.LANCHOR81] str w1, [x28, 8] add w2, w1, 1 - str w2, [x23, #:lo12:.LANCHOR82] + str w2, [x23, #:lo12:.LANCHOR81] ubfiz w2, w0, 10, 16 str w2, [x19, 4] strh w0, [x27, 2] str w1, [x27, 4] -.L1126: - ldrh w1, [x26, #:lo12:.LANCHOR23] - ldr x0, [x22, #:lo12:.LANCHOR106] +.L1119: + ldrh w1, [x26, #:lo12:.LANCHOR22] + ldr x0, [x22, #:lo12:.LANCHOR105] bl js_hash str w0, [x27, 12] mov w3, 1 @@ -8192,49 +8117,49 @@ FtlVpcTblFlush: and w0, w0, 65535 strh w0, [x28, 2] cmn w1, #1 - bne .L1127 + bne .L1120 cmp w0, 1 - bne .L1128 - adrp x1, .LANCHOR165 + bne .L1121 + adrp x1, .LANCHOR164 adrp x0, .LC1 mov w2, 1138 - add x1, x1, :lo12:.LANCHOR165 + add x1, x1, :lo12:.LANCHOR164 add x0, x0, :lo12:.LC1 bl printf -.L1128: +.L1121: ldrh w0, [x28, 2] cmp w0, 1 - bne .L1129 + bne .L1122 ldr x0, [x29, 96] ldrh w0, [x0] sub w0, w0, #1 strh w0, [x28, 2] -.L1129: +.L1122: add w20, w20, 1 and w20, w20, 65535 cmp w20, 3 - bls .L1125 - add x21, x21, :lo12:.LANCHOR138 + bls .L1118 + add x21, x21, :lo12:.LANCHOR137 adrp x0, .LC39 mov w2, w20 add x0, x0, :lo12:.LC39 ldr w1, [x21, 4] bl printf -.L1131: - b .L1131 -.L1127: +.L1124: + b .L1124 +.L1120: cmp w0, 1 - beq .L1125 + beq .L1118 cmp w1, 256 - beq .L1125 + beq .L1118 ldr w1, [x29, 108] mov w0, 65535 cmp w1, w0 - beq .L1132 + beq .L1125 ldrh w0, [x29, 108] mov w1, 1 bl FtlFreeSysBlkQueueIn -.L1132: +.L1125: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -8264,17 +8189,17 @@ FtlSysFlush: .global sftl_deinit .type sftl_deinit, %function sftl_deinit: - adrp x0, .LANCHOR166 - ldr w0, [x0, #:lo12:.LANCHOR166] + adrp x0, .LANCHOR165 + ldr w0, [x0, #:lo12:.LANCHOR165] cmp w0, 1 - bne .L1145 + bne .L1138 stp x29, x30, [sp, -16]! add x29, sp, 0 bl FtlSysFlush mov w0, 0 ldp x29, x30, [sp], 16 ret -.L1145: +.L1138: mov w0, 0 ret .size sftl_deinit, .-sftl_deinit @@ -8284,65 +8209,69 @@ sftl_deinit: .type FtlDiscard, %function FtlDiscard: stp x29, x30, [sp, -80]! - add w2, w0, w1 add x29, sp, 0 stp x19, x20, [sp, 16] mov w19, w1 - adrp x1, .LANCHOR34 + adrp x1, .LANCHOR33 stp x21, x22, [sp, 32] str x23, [sp, 48] - ldr w1, [x1, #:lo12:.LANCHOR34] - cmp w2, w1 - bhi .L1156 + ldr w1, [x1, #:lo12:.LANCHOR33] + cmp w1, w0 + bls .L1151 + cmp w1, w19 + bcc .L1151 + add w2, w0, w19 + cmp w1, w2 + bcc .L1151 cmp w19, 31 - bhi .L1150 -.L1164: + bhi .L1143 +.L1159: mov w0, 0 -.L1148: +.L1141: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldr x23, [sp, 48] ldp x29, x30, [sp], 80 ret -.L1150: - adrp x21, .LANCHOR12 - ldrh w1, [x21, #:lo12:.LANCHOR12] +.L1143: + adrp x21, .LANCHOR11 + ldrh w1, [x21, #:lo12:.LANCHOR11] udiv w20, w0, w1 msub w0, w1, w20, w0 ands w0, w0, 65535 - beq .L1151 - sub w1, w1, w0 + beq .L1144 + sub w0, w1, w0 add w20, w20, 1 - cmp w1, w19 - csel w1, w1, w19, ls - sub w19, w19, w1, uxth -.L1151: - adrp x22, .LANCHOR167 - adrp x23, .LANCHOR86 - add x22, x22, :lo12:.LANCHOR167 - add x23, x23, :lo12:.LANCHOR86 + cmp w0, w19 + csel w0, w0, w19, ls + sub w19, w19, w0, uxth +.L1144: + adrp x22, .LANCHOR166 + adrp x23, .LANCHOR85 + add x22, x22, :lo12:.LANCHOR166 + add x23, x23, :lo12:.LANCHOR85 mov w0, -1 str w0, [x29, 76] -.L1152: - ldrh w0, [x21, #:lo12:.LANCHOR12] +.L1145: + ldrh w0, [x21, #:lo12:.LANCHOR11] cmp w19, w0 - bcs .L1154 - adrp x0, .LANCHOR167 - ldr w1, [x0, #:lo12:.LANCHOR167] + bcs .L1147 + adrp x0, .LANCHOR166 + ldr w1, [x0, #:lo12:.LANCHOR166] cmp w1, 32 - bls .L1164 - str wzr, [x0, #:lo12:.LANCHOR167] + bls .L1159 + str wzr, [x0, #:lo12:.LANCHOR166] bl l2p_flush bl FtlVpcTblFlush - b .L1164 -.L1154: + b .L1159 +.L1147: mov w2, 0 add x1, x29, 72 mov w0, w20 bl log2phys ldr w0, [x29, 72] cmn w0, #1 - beq .L1153 + beq .L1146 ldr w0, [x22] mov w2, 1 add x1, x29, 76 @@ -8357,14 +8286,14 @@ FtlDiscard: lsr w0, w0, 10 bl P2V_block_in_plane bl decrement_vpc_count -.L1153: - ldrh w0, [x21, #:lo12:.LANCHOR12] +.L1146: + ldrh w0, [x21, #:lo12:.LANCHOR11] add w20, w20, 1 sub w19, w19, w0 - b .L1152 -.L1156: + b .L1145 +.L1151: mov w0, -1 - b .L1148 + b .L1141 .size FtlDiscard, .-FtlDiscard .section .text.allocate_new_data_superblock,"ax",@progbits .align 2 @@ -8377,49 +8306,49 @@ allocate_new_data_superblock: ldrh w19, [x0] str x21, [sp, 32] mov x21, x0 - adrp x0, .LANCHOR5 - ldrh w0, [x0, #:lo12:.LANCHOR5] + adrp x0, .LANCHOR4 + ldrh w0, [x0, #:lo12:.LANCHOR4] cmp w0, w19 - bcs .L1166 - adrp x1, .LANCHOR168 + bcs .L1161 + adrp x1, .LANCHOR167 adrp x0, .LC1 - mov w2, 2755 - add x1, x1, :lo12:.LANCHOR168 + mov w2, 2759 + add x1, x1, :lo12:.LANCHOR167 add x0, x0, :lo12:.LC1 bl printf -.L1166: +.L1161: mov w0, 65535 cmp w19, w0 - beq .L1167 - adrp x1, .LANCHOR42 + beq .L1162 + adrp x1, .LANCHOR41 ubfiz x0, x19, 1, 16 - ldr x1, [x1, #:lo12:.LANCHOR42] + ldr x1, [x1, #:lo12:.LANCHOR41] ldrh w0, [x1, x0] - cbz w0, .L1168 + cbz w0, .L1163 mov w0, w19 bl INSERT_DATA_LIST -.L1167: - adrp x1, .LANCHOR131 +.L1162: + adrp x1, .LANCHOR130 mov w0, 1 strb w0, [x21, 8] mov w2, 65535 - ldrh w0, [x1, #:lo12:.LANCHOR131] + ldrh w0, [x1, #:lo12:.LANCHOR130] mov x20, x1 cmp w0, w2 - beq .L1169 + beq .L1164 cmp w19, w0 - bne .L1170 - adrp x2, .LANCHOR42 + bne .L1165 + adrp x2, .LANCHOR41 ubfiz x1, x0, 1, 16 - ldr x2, [x2, #:lo12:.LANCHOR42] + ldr x2, [x2, #:lo12:.LANCHOR41] ldrh w1, [x2, x1] - cbz w1, .L1171 -.L1170: + cbz w1, .L1166 +.L1165: bl update_vpc_list -.L1171: +.L1166: mov w0, -1 - strh w0, [x20, #:lo12:.LANCHOR131] -.L1169: + strh w0, [x20, #:lo12:.LANCHOR130] +.L1164: mov x0, x21 bl allocate_data_superblock bl l2p_flush @@ -8431,10 +8360,10 @@ allocate_new_data_superblock: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 48 ret -.L1168: +.L1163: mov w0, w19 bl INSERT_FREE_LIST - b .L1167 + b .L1162 .size allocate_new_data_superblock, .-allocate_new_data_superblock .section .text.FtlProgPages,"ax",@progbits .align 2 @@ -8454,18 +8383,18 @@ FtlProgPages: add x21, x21, 4 ldrb w3, [x3, 9] adrp x23, .LC40 - adrp x24, .LANCHOR3 + adrp x24, .LANCHOR2 add x19, x22, 4 add x21, x22, x21 add x23, x23, :lo12:.LC40 - add x24, x24, :lo12:.LANCHOR3 + add x24, x24, :lo12:.LANCHOR2 bl FlashProgPages -.L1177: +.L1172: cmp x21, x19 - beq .L1183 + beq .L1178 sub x22, x19, #4 - b .L1184 -.L1179: + b .L1179 +.L1174: ldr w1, [x19] mov x0, x23 bl printf @@ -8474,10 +8403,10 @@ FtlProgPages: bl P2V_block_in_plane bl decrement_vpc_count ldrh w0, [x20, 4] - cbnz w0, .L1178 + cbnz w0, .L1173 mov x0, x20 bl allocate_new_data_superblock -.L1178: +.L1173: mov x0, x20 bl get_new_active_ppa str w0, [x19] @@ -8487,22 +8416,22 @@ FtlProgPages: ldrb w3, [x20, 9] mov x0, x22 bl FlashProgPages -.L1184: +.L1179: ldr w2, [x19, -4] cmp w2, 256 ccmn w2, #1, 4, ne - beq .L1179 + beq .L1174 ldrb w1, [x20, 6] ldrh w0, [x24] cmp w1, w0 - bcc .L1180 - adrp x1, .LANCHOR169 + bcc .L1175 + adrp x1, .LANCHOR168 adrp x0, .LC1 mov w2, 985 - add x1, x1, :lo12:.LANCHOR169 + add x1, x1, :lo12:.LANCHOR168 add x0, x0, :lo12:.LC1 bl printf -.L1180: +.L1175: add x1, x29, 80 ldr w0, [x22, 4] mov w2, 1 @@ -8516,35 +8445,35 @@ FtlProgPages: and w1, w0, 65535 mov w22, w1 cmn w3, #1 - beq .L1181 - adrp x2, .LANCHOR42 + beq .L1176 + adrp x2, .LANCHOR41 ubfiz x0, x1, 1, 16 - ldr x2, [x2, #:lo12:.LANCHOR42] + ldr x2, [x2, #:lo12:.LANCHOR41] ldrh w0, [x2, x0] - cbnz w0, .L1182 + cbnz w0, .L1177 adrp x0, .LC41 mov w2, 0 add x0, x0, :lo12:.LC41 bl printf -.L1182: +.L1177: mov w0, w22 bl decrement_vpc_count -.L1181: +.L1176: add x19, x19, 32 - b .L1177 -.L1183: - adrp x0, .LANCHOR3 + b .L1172 +.L1178: + adrp x0, .LANCHOR2 ldrb w1, [x20, 6] - ldrh w0, [x0, #:lo12:.LANCHOR3] + ldrh w0, [x0, #:lo12:.LANCHOR2] cmp w1, w0 - bcc .L1176 - adrp x1, .LANCHOR169 + bcc .L1171 + adrp x1, .LANCHOR168 adrp x0, .LC1 mov w2, 1000 - add x1, x1, :lo12:.LANCHOR169 + add x1, x1, :lo12:.LANCHOR168 add x0, x0, :lo12:.LC1 bl printf -.L1176: +.L1171: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -8560,94 +8489,94 @@ FtlGcFreeTempBlock: mov w1, 65535 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x19, .LANCHOR53 + adrp x19, .LANCHOR52 stp x21, x22, [sp, 32] - ldrh w2, [x19, #:lo12:.LANCHOR53] + ldrh w2, [x19, #:lo12:.LANCHOR52] stp x23, x24, [sp, 48] stp x25, x26, [sp, 64] cmp w2, w1 stp x27, x28, [sp, 80] - beq .L1191 - adrp x1, .LANCHOR19 - add x0, x19, :lo12:.LANCHOR53 - ldrh w1, [x1, #:lo12:.LANCHOR19] + beq .L1186 + adrp x1, .LANCHOR18 + add x0, x19, :lo12:.LANCHOR52 + ldrh w1, [x1, #:lo12:.LANCHOR18] bl FtlGcScanTempBlk str w0, [x29, 108] -.L1191: - adrp x0, .LANCHOR133 - ldrh w2, [x19, #:lo12:.LANCHOR53] +.L1186: + adrp x0, .LANCHOR132 + ldrh w2, [x19, #:lo12:.LANCHOR52] mov w1, 65535 - str wzr, [x0, #:lo12:.LANCHOR133] + str wzr, [x0, #:lo12:.LANCHOR132] cmp w2, w1 - add x0, x19, :lo12:.LANCHOR53 - beq .L1193 + add x0, x19, :lo12:.LANCHOR52 + beq .L1188 ldrb w1, [x0, 7] - adrp x0, .LANCHOR19 - adrp x20, .LANCHOR70 + adrp x0, .LANCHOR18 + adrp x20, .LANCHOR69 mov x21, x0 - ldrh w3, [x0, #:lo12:.LANCHOR19] - ldrh w2, [x20, #:lo12:.LANCHOR70] + ldrh w3, [x0, #:lo12:.LANCHOR18] + ldrh w2, [x20, #:lo12:.LANCHOR69] mul w1, w1, w3 cmp w2, w1 - beq .L1194 - adrp x1, .LANCHOR170 + beq .L1189 + adrp x1, .LANCHOR169 adrp x0, .LC1 mov w2, 164 - add x1, x1, :lo12:.LANCHOR170 + add x1, x1, :lo12:.LANCHOR169 add x0, x0, :lo12:.LC1 bl printf -.L1194: - add x0, x19, :lo12:.LANCHOR53 - adrp x22, .LANCHOR42 - ldrh w3, [x21, #:lo12:.LANCHOR19] - adrp x25, .LANCHOR152 - ldrh w2, [x19, #:lo12:.LANCHOR53] - add x26, x20, :lo12:.LANCHOR70 +.L1189: + add x0, x19, :lo12:.LANCHOR52 + adrp x22, .LANCHOR41 + ldrh w3, [x21, #:lo12:.LANCHOR18] + adrp x25, .LANCHOR151 + ldrh w2, [x19, #:lo12:.LANCHOR52] + add x26, x20, :lo12:.LANCHOR69 ldrb w0, [x0, 7] - add x25, x25, :lo12:.LANCHOR152 - ldr x1, [x22, #:lo12:.LANCHOR42] + add x25, x25, :lo12:.LANCHOR151 + ldr x1, [x22, #:lo12:.LANCHOR41] mov w21, 0 - adrp x27, .LANCHOR71 + adrp x27, .LANCHOR70 mul w0, w0, w3 strh w0, [x1, x2, lsl 1] - adrp x1, .LANCHOR84 - ldrh w0, [x20, #:lo12:.LANCHOR70] - ldr w2, [x1, #:lo12:.LANCHOR84] + adrp x1, .LANCHOR83 + ldrh w0, [x20, #:lo12:.LANCHOR69] + ldr w2, [x1, #:lo12:.LANCHOR83] add w0, w0, w2 - str w0, [x1, #:lo12:.LANCHOR84] -.L1195: + str w0, [x1, #:lo12:.LANCHOR83] +.L1190: ldrh w0, [x26] cmp w0, w21 - bhi .L1199 + bhi .L1194 mov w0, -1 bl decrement_vpc_count - ldrh w0, [x19, #:lo12:.LANCHOR53] - ldr x2, [x22, #:lo12:.LANCHOR42] + ldrh w0, [x19, #:lo12:.LANCHOR52] + ldr x2, [x22, #:lo12:.LANCHOR41] ubfiz x1, x0, 1, 16 ldrh w1, [x2, x1] - cbz w1, .L1200 + cbz w1, .L1195 bl INSERT_DATA_LIST -.L1201: - adrp x0, .LANCHOR68 +.L1196: + adrp x0, .LANCHOR67 mov w21, -1 - strh wzr, [x20, #:lo12:.LANCHOR70] - strh w21, [x19, #:lo12:.LANCHOR53] - strh wzr, [x0, #:lo12:.LANCHOR68] + strh wzr, [x20, #:lo12:.LANCHOR69] + strh w21, [x19, #:lo12:.LANCHOR52] + strh wzr, [x0, #:lo12:.LANCHOR67] bl l2p_flush bl FtlVpcTblFlush - adrp x0, .LANCHOR145 - strh w21, [x0, #:lo12:.LANCHOR145] - adrp x0, .LANCHOR48 - ldrh w1, [x0, #:lo12:.LANCHOR48] - adrp x0, .LANCHOR171 - ldrh w0, [x0, #:lo12:.LANCHOR171] + adrp x0, .LANCHOR144 + strh w21, [x0, #:lo12:.LANCHOR144] + adrp x0, .LANCHOR47 + ldrh w1, [x0, #:lo12:.LANCHOR47] + adrp x0, .LANCHOR170 + ldrh w0, [x0, #:lo12:.LANCHOR170] add w0, w0, w0, lsl 1 cmp w1, w0, lsr 2 - ble .L1193 - adrp x0, .LANCHOR100 + ble .L1188 + adrp x0, .LANCHOR99 mov w1, 20 - strh w1, [x0, #:lo12:.LANCHOR100] -.L1193: + strh w1, [x0, #:lo12:.LANCHOR99] +.L1188: ldp x19, x20, [sp, 16] mov w0, 0 ldp x21, x22, [sp, 32] @@ -8656,26 +8585,26 @@ FtlGcFreeTempBlock: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 112 ret -.L1199: +.L1194: mov w24, 12 - ldr x28, [x27, #:lo12:.LANCHOR71] + ldr x28, [x27, #:lo12:.LANCHOR70] ldr w1, [x25] umull x24, w21, w24 add x23, x28, x24 ldr w0, [x23, 8] cmp w0, w1 - bcc .L1196 -.L1204: - ldrh w0, [x19, #:lo12:.LANCHOR53] - b .L1205 -.L1196: + bcc .L1191 +.L1199: + ldrh w0, [x19, #:lo12:.LANCHOR52] + b .L1200 +.L1191: add x1, x29, 108 mov w2, 0 bl log2phys ldr w0, [x28, x24] ldr w1, [x29, 108] cmp w0, w1 - bne .L1198 + bne .L1193 lsr w0, w0, 10 bl P2V_block_in_plane mov w24, w0 @@ -8684,20 +8613,20 @@ FtlGcFreeTempBlock: add x1, x23, 4 bl log2phys mov w0, w24 -.L1205: +.L1200: bl decrement_vpc_count - b .L1197 -.L1198: + b .L1192 +.L1193: ldr w0, [x23, 4] cmp w1, w0 - bne .L1204 -.L1197: + bne .L1199 +.L1192: add w21, w21, 1 and w21, w21, 65535 - b .L1195 -.L1200: + b .L1190 +.L1195: bl INSERT_FREE_LIST - b .L1201 + b .L1196 .size FtlGcFreeTempBlock, .-FtlGcFreeTempBlock .section .text.FtlGcPageRecovery,"ax",@progbits .align 2 @@ -8707,24 +8636,24 @@ FtlGcPageRecovery: stp x29, x30, [sp, -32]! add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR19 - adrp x19, .LANCHOR53 - add x19, x19, :lo12:.LANCHOR53 - ldrh w1, [x20, #:lo12:.LANCHOR19] + adrp x20, .LANCHOR18 + adrp x19, .LANCHOR52 + add x19, x19, :lo12:.LANCHOR52 + ldrh w1, [x20, #:lo12:.LANCHOR18] mov x0, x19 bl FtlGcScanTempBlk ldrh w1, [x19, 2] - ldrh w0, [x20, #:lo12:.LANCHOR19] + ldrh w0, [x20, #:lo12:.LANCHOR18] cmp w1, w0 - bcc .L1206 - adrp x0, .LANCHOR129 - add x0, x0, :lo12:.LANCHOR129 + bcc .L1201 + adrp x0, .LANCHOR128 + add x0, x0, :lo12:.LANCHOR128 bl FtlMapBlkWriteDump_data mov w0, 0 bl FtlGcFreeTempBlock - adrp x0, .LANCHOR133 - str wzr, [x0, #:lo12:.LANCHOR133] -.L1206: + adrp x0, .LANCHOR132 + str wzr, [x0, #:lo12:.LANCHOR132] +.L1201: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 ret @@ -8735,18 +8664,18 @@ FtlGcPageRecovery: .type FtlPowerLostRecovery, %function FtlPowerLostRecovery: stp x29, x30, [sp, -32]! - adrp x0, .LANCHOR157 + adrp x0, .LANCHOR156 add x29, sp, 0 str x19, [sp, 16] - adrp x19, .LANCHOR51 - add x19, x19, :lo12:.LANCHOR51 - str wzr, [x0, #:lo12:.LANCHOR157] + adrp x19, .LANCHOR50 + add x19, x19, :lo12:.LANCHOR50 + str wzr, [x0, #:lo12:.LANCHOR156] mov x0, x19 bl FtlRecoverySuperblock mov x0, x19 - adrp x19, .LANCHOR52 + adrp x19, .LANCHOR51 bl FtlSlcSuperblockCheck - add x19, x19, :lo12:.LANCHOR52 + add x19, x19, :lo12:.LANCHOR51 mov x0, x19 bl FtlRecoverySuperblock mov x0, x19 @@ -8769,51 +8698,51 @@ Ftl_gc_temp_data_write_back: mov w2, 0 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x19, .LANCHOR62 - adrp x20, .LANCHOR104 - ldr w1, [x19, #:lo12:.LANCHOR62] - add x19, x19, :lo12:.LANCHOR62 - ldr x0, [x20, #:lo12:.LANCHOR104] + adrp x19, .LANCHOR61 + adrp x20, .LANCHOR103 + ldr w1, [x19, #:lo12:.LANCHOR61] + add x19, x19, :lo12:.LANCHOR61 + ldr x0, [x20, #:lo12:.LANCHOR103] bl FlashProgPages mov w11, 0 -.L1212: +.L1207: ldr w1, [x19] cmp w11, w1 - bcc .L1215 - ldr x0, [x20, #:lo12:.LANCHOR104] + bcc .L1210 + ldr x0, [x20, #:lo12:.LANCHOR103] bl FtlGcBufFree str wzr, [x19] - adrp x0, .LANCHOR53+4 - ldrh w0, [x0, #:lo12:.LANCHOR53+4] - cbnz w0, .L1217 + adrp x0, .LANCHOR52+4 + ldrh w0, [x0, #:lo12:.LANCHOR52+4] + cbnz w0, .L1212 mov w0, 1 bl FtlGcFreeTempBlock mov w0, 1 -.L1211: +.L1206: ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 ret -.L1215: - ldr x2, [x20, #:lo12:.LANCHOR104] +.L1210: + ldr x2, [x20, #:lo12:.LANCHOR103] ubfiz x0, x11, 5, 16 add x1, x2, x0 ldr w2, [x2, x0] ldr x3, [x1, 16] cmn w2, #1 - bne .L1213 -.L1219: + bne .L1208 +.L1214: ldr w1, [x1, 4] ldr w0, [x3, 12] bl FtlGcUpdatePage add w11, w11, 1 and w11, w11, 65535 - b .L1212 -.L1213: + b .L1207 +.L1208: ldr w2, [x3, 8] - b .L1219 -.L1217: + b .L1214 +.L1212: mov w0, 0 - b .L1211 + b .L1206 .size Ftl_gc_temp_data_write_back, .-Ftl_gc_temp_data_write_back .section .text.Ftl_get_new_temp_ppa,"ax",@progbits .align 2 @@ -8821,33 +8750,33 @@ Ftl_gc_temp_data_write_back: .type Ftl_get_new_temp_ppa, %function Ftl_get_new_temp_ppa: stp x29, x30, [sp, -32]! - adrp x0, .LANCHOR53 + adrp x0, .LANCHOR52 mov w2, 65535 add x29, sp, 0 str x19, [sp, 16] mov x19, x0 - ldrh w3, [x0, #:lo12:.LANCHOR53] + ldrh w3, [x0, #:lo12:.LANCHOR52] cmp w3, w2 - beq .L1221 - add x1, x0, :lo12:.LANCHOR53 + beq .L1216 + add x1, x0, :lo12:.LANCHOR52 ldrh w0, [x1, 4] - cbnz w0, .L1222 -.L1221: + cbnz w0, .L1217 +.L1216: mov w0, 0 bl FtlGcFreeTempBlock - add x0, x19, :lo12:.LANCHOR53 + add x0, x19, :lo12:.LANCHOR52 strb wzr, [x0, 8] bl allocate_data_superblock - adrp x0, .LANCHOR68 - strh wzr, [x0, #:lo12:.LANCHOR68] - adrp x0, .LANCHOR70 - strh wzr, [x0, #:lo12:.LANCHOR70] + adrp x0, .LANCHOR67 + strh wzr, [x0, #:lo12:.LANCHOR67] + adrp x0, .LANCHOR69 + strh wzr, [x0, #:lo12:.LANCHOR69] bl l2p_flush mov w0, 0 bl FtlEctTblFlush bl FtlVpcTblFlush -.L1222: - add x0, x19, :lo12:.LANCHOR53 +.L1217: + add x0, x19, :lo12:.LANCHOR52 ldr x19, [sp, 16] ldp x29, x30, [sp], 32 b get_new_active_ppa @@ -8860,75 +8789,75 @@ rk_ftl_garbage_collect: stp x29, x30, [sp, -176]! add x29, sp, 0 stp x21, x22, [sp, 32] - adrp x21, .LANCHOR94 + adrp x21, .LANCHOR93 stp x19, x20, [sp, 16] - ldr w1, [x21, #:lo12:.LANCHOR94] + ldr w1, [x21, #:lo12:.LANCHOR93] stp x23, x24, [sp, 48] stp x25, x26, [sp, 64] stp x27, x28, [sp, 80] - cbnz w1, .L1281 - adrp x1, .LANCHOR44 - ldrh w1, [x1, #:lo12:.LANCHOR44] + cbnz w1, .L1276 + adrp x1, .LANCHOR43 + ldrh w1, [x1, #:lo12:.LANCHOR43] cmp w1, 47 - bls .L1281 - adrp x1, .LANCHOR73 + bls .L1276 + adrp x1, .LANCHOR72 mov w4, 65535 - ldrh w3, [x1, #:lo12:.LANCHOR73] + ldrh w3, [x1, #:lo12:.LANCHOR72] cmp w3, w4 - beq .L1226 - adrp x2, .LANCHOR72 - ldrh w5, [x2, #:lo12:.LANCHOR72] + beq .L1221 + adrp x2, .LANCHOR71 + ldrh w5, [x2, #:lo12:.LANCHOR71] cmp w5, w4 - bne .L1226 - strh w3, [x2, #:lo12:.LANCHOR72] + bne .L1221 + strh w3, [x2, #:lo12:.LANCHOR71] mov w2, -1 - strh w2, [x1, #:lo12:.LANCHOR73] -.L1226: - cbnz w0, .L1282 - adrp x1, .LANCHOR48 - ldrh w1, [x1, #:lo12:.LANCHOR48] + strh w2, [x1, #:lo12:.LANCHOR72] +.L1221: + cbnz w0, .L1277 + adrp x1, .LANCHOR47 + ldrh w1, [x1, #:lo12:.LANCHOR47] cmp w1, 24 - bhi .L1283 - adrp x2, .LANCHOR19 + bhi .L1278 + adrp x2, .LANCHOR18 cmp w1, 16 - ldrh w20, [x2, #:lo12:.LANCHOR19] - bls .L1229 + ldrh w20, [x2, #:lo12:.LANCHOR18] + bls .L1224 lsr w20, w20, 5 -.L1228: - adrp x2, .LANCHOR100 - ldrh w3, [x2, #:lo12:.LANCHOR100] +.L1223: + adrp x2, .LANCHOR99 + ldrh w3, [x2, #:lo12:.LANCHOR99] cmp w3, w1 mov x3, x2 - bcs .L1232 - adrp x1, .LANCHOR53 + bcs .L1227 + adrp x1, .LANCHOR52 mov w4, 65535 - ldrh w1, [x1, #:lo12:.LANCHOR53] + ldrh w1, [x1, #:lo12:.LANCHOR52] cmp w1, w4 - bne .L1233 - adrp x4, .LANCHOR72 - ldrh w4, [x4, #:lo12:.LANCHOR72] + bne .L1228 + adrp x4, .LANCHOR71 + ldrh w4, [x4, #:lo12:.LANCHOR71] cmp w4, w1 - bne .L1233 - adrp x0, .LANCHOR172 - ldrh w0, [x0, #:lo12:.LANCHOR172] - cbnz w0, .L1234 - adrp x1, .LANCHOR152 - adrp x4, .LANCHOR59 - ldr w1, [x1, #:lo12:.LANCHOR152] - ldr w4, [x4, #:lo12:.LANCHOR59] + bne .L1228 + adrp x0, .LANCHOR171 + ldrh w0, [x0, #:lo12:.LANCHOR171] + cbnz w0, .L1229 + adrp x1, .LANCHOR151 + adrp x4, .LANCHOR58 + ldr w1, [x1, #:lo12:.LANCHOR151] + ldr w4, [x4, #:lo12:.LANCHOR58] add w1, w1, w1, lsl 1 cmp w4, w1, lsr 2 - bcs .L1235 -.L1234: - adrp x1, .LANCHOR171 - ldrh w1, [x1, #:lo12:.LANCHOR171] + bcs .L1230 +.L1229: + adrp x1, .LANCHOR170 + ldrh w1, [x1, #:lo12:.LANCHOR170] add w1, w1, w1, lsl 1 asr w1, w1, 2 - strh w1, [x3, #:lo12:.LANCHOR100] -.L1236: - adrp x1, .LANCHOR95 - str wzr, [x1, #:lo12:.LANCHOR95] -.L1224: + strh w1, [x3, #:lo12:.LANCHOR99] +.L1231: + adrp x1, .LANCHOR94 + str wzr, [x1, #:lo12:.LANCHOR94] +.L1219: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -8936,371 +8865,371 @@ rk_ftl_garbage_collect: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 176 ret -.L1229: +.L1224: cmp w1, 12 - bls .L1230 + bls .L1225 lsr w20, w20, 4 - b .L1228 -.L1230: + b .L1223 +.L1225: cmp w1, 8 - bls .L1228 + bls .L1223 lsr w20, w20, 2 - b .L1228 -.L1283: + b .L1223 +.L1278: mov w20, 1 - b .L1228 -.L1235: + b .L1223 +.L1230: mov w1, 18 - strh w1, [x2, #:lo12:.LANCHOR100] - b .L1236 -.L1233: - adrp x1, .LANCHOR171 - ldrh w1, [x1, #:lo12:.LANCHOR171] + strh w1, [x2, #:lo12:.LANCHOR99] + b .L1231 +.L1228: + adrp x1, .LANCHOR170 + ldrh w1, [x1, #:lo12:.LANCHOR170] add w1, w1, w1, lsl 1 asr w1, w1, 2 - strh w1, [x3, #:lo12:.LANCHOR100] -.L1232: - adrp x1, .LANCHOR74 - ldrh w1, [x1, #:lo12:.LANCHOR74] - cbz w1, .L1227 + strh w1, [x3, #:lo12:.LANCHOR99] +.L1227: + adrp x1, .LANCHOR73 + ldrh w1, [x1, #:lo12:.LANCHOR73] + cbz w1, .L1222 add w20, w20, 32 and w20, w20, 65535 -.L1227: - adrp x19, .LANCHOR145 +.L1222: + adrp x19, .LANCHOR144 str w0, [x29, 152] mov w0, 65535 - ldrh w2, [x19, #:lo12:.LANCHOR145] + ldrh w2, [x19, #:lo12:.LANCHOR144] cmp w2, w0 - bne .L1239 - adrp x0, .LANCHOR72 - ldrh w1, [x0, #:lo12:.LANCHOR72] + bne .L1234 + adrp x0, .LANCHOR71 + ldrh w1, [x0, #:lo12:.LANCHOR71] cmp w1, w2 - beq .L1240 - adrp x2, .LANCHOR42 + beq .L1235 + adrp x2, .LANCHOR41 ubfiz x1, x1, 1, 16 - ldr x2, [x2, #:lo12:.LANCHOR42] + ldr x2, [x2, #:lo12:.LANCHOR41] ldrh w1, [x2, x1] - cbnz w1, .L1241 + cbnz w1, .L1236 mov w1, -1 - strh w1, [x0, #:lo12:.LANCHOR72] -.L1241: - ldrh w1, [x0, #:lo12:.LANCHOR72] - strh w1, [x19, #:lo12:.LANCHOR145] + strh w1, [x0, #:lo12:.LANCHOR71] +.L1236: + ldrh w1, [x0, #:lo12:.LANCHOR71] + strh w1, [x19, #:lo12:.LANCHOR144] mov w1, -1 - strh w1, [x0, #:lo12:.LANCHOR72] -.L1240: - add x0, x19, :lo12:.LANCHOR145 + strh w1, [x0, #:lo12:.LANCHOR71] +.L1235: + add x0, x19, :lo12:.LANCHOR144 mov w1, 65535 strb wzr, [x0, 8] - ldrh w0, [x19, #:lo12:.LANCHOR145] + ldrh w0, [x19, #:lo12:.LANCHOR144] cmp w0, w1 - beq .L1239 + beq .L1234 bl IsBlkInGcList - cbz w0, .L1243 + cbz w0, .L1238 mov w0, -1 - strh w0, [x19, #:lo12:.LANCHOR145] -.L1243: - ldrh w1, [x19, #:lo12:.LANCHOR145] + strh w0, [x19, #:lo12:.LANCHOR144] +.L1238: + ldrh w1, [x19, #:lo12:.LANCHOR144] mov w0, 65535 - add x22, x19, :lo12:.LANCHOR145 + add x22, x19, :lo12:.LANCHOR144 cmp w1, w0 - beq .L1239 + beq .L1234 mov x0, x22 bl make_superblock - adrp x0, .LANCHOR173 - ldrh w1, [x19, #:lo12:.LANCHOR145] + adrp x0, .LANCHOR172 + ldrh w1, [x19, #:lo12:.LANCHOR144] strh wzr, [x22, 2] - strh wzr, [x0, #:lo12:.LANCHOR173] - adrp x0, .LANCHOR42 + strh wzr, [x0, #:lo12:.LANCHOR172] + adrp x0, .LANCHOR41 strb wzr, [x22, 6] - ldr x0, [x0, #:lo12:.LANCHOR42] + ldr x0, [x0, #:lo12:.LANCHOR41] ldrh w1, [x0, x1, lsl 1] - adrp x0, .LANCHOR174 - strh w1, [x0, #:lo12:.LANCHOR174] -.L1239: - adrp x1, .LANCHOR51 - ldrh w0, [x19, #:lo12:.LANCHOR145] + adrp x0, .LANCHOR173 + strh w1, [x0, #:lo12:.LANCHOR173] +.L1234: + adrp x1, .LANCHOR50 + ldrh w0, [x19, #:lo12:.LANCHOR144] str x1, [x29, 128] - ldrh w2, [x1, #:lo12:.LANCHOR51] + ldrh w2, [x1, #:lo12:.LANCHOR50] cmp w2, w0 - beq .L1244 + beq .L1239 + adrp x1, .LANCHOR51 + ldrh w1, [x1, #:lo12:.LANCHOR51] + cmp w1, w0 + beq .L1239 adrp x1, .LANCHOR52 ldrh w1, [x1, #:lo12:.LANCHOR52] cmp w1, w0 - beq .L1244 - adrp x1, .LANCHOR53 - ldrh w1, [x1, #:lo12:.LANCHOR53] - cmp w1, w0 - bne .L1245 -.L1244: + bne .L1240 +.L1239: mov w0, -1 - strh w0, [x19, #:lo12:.LANCHOR145] -.L1245: - adrp x25, .LANCHOR102 - add x26, x25, :lo12:.LANCHOR102 -.L1279: - ldrh w1, [x19, #:lo12:.LANCHOR145] + strh w0, [x19, #:lo12:.LANCHOR144] +.L1240: + adrp x25, .LANCHOR101 + add x26, x25, :lo12:.LANCHOR101 +.L1274: + ldrh w1, [x19, #:lo12:.LANCHOR144] mov w0, 65535 cmp w1, w0 - bne .L1246 - adrp x0, .LANCHOR95 - adrp x22, .LANCHOR19 - add x22, x22, :lo12:.LANCHOR19 - str wzr, [x0, #:lo12:.LANCHOR95] -.L1247: - ldrh w5, [x25, #:lo12:.LANCHOR102] - add x7, x25, :lo12:.LANCHOR102 + bne .L1241 + adrp x0, .LANCHOR94 + adrp x22, .LANCHOR18 + add x22, x22, :lo12:.LANCHOR18 + str wzr, [x0, #:lo12:.LANCHOR94] +.L1242: + ldrh w5, [x25, #:lo12:.LANCHOR101] + add x7, x25, :lo12:.LANCHOR101 mov w0, w5 bl List_get_gc_head_node and w6, w0, 65535 - strh w6, [x19, #:lo12:.LANCHOR145] + strh w6, [x19, #:lo12:.LANCHOR144] mov w0, 65535 cmp w6, w0 - bne .L1248 + bne .L1243 strh wzr, [x7] mov w0, 8 - b .L1224 -.L1282: + b .L1219 +.L1277: mov w20, 1 - b .L1227 -.L1248: + b .L1222 +.L1243: mov w0, w6 bl IsBlkInGcList add w5, w5, 1 - cbz w0, .L1249 - strh w5, [x25, #:lo12:.LANCHOR102] - b .L1247 -.L1249: - adrp x23, .LANCHOR42 - adrp x4, .LANCHOR3 + cbz w0, .L1244 + strh w5, [x25, #:lo12:.LANCHOR101] + b .L1242 +.L1244: + adrp x23, .LANCHOR41 + adrp x4, .LANCHOR2 ldrh w0, [x22] ubfiz x1, x6, 1, 16 - ldr x2, [x23, #:lo12:.LANCHOR42] + ldr x2, [x23, #:lo12:.LANCHOR41] and w5, w5, 65535 - ldrh w4, [x4, #:lo12:.LANCHOR3] - strh w5, [x25, #:lo12:.LANCHOR102] + ldrh w4, [x4, #:lo12:.LANCHOR2] + strh w5, [x25, #:lo12:.LANCHOR101] ldrh w3, [x2, x1] mul w0, w0, w4 cmp w3, w0, asr 1 - bgt .L1251 + bgt .L1246 cmp w5, 48 - bls .L1252 + bls .L1247 cmp w3, 8 - bls .L1252 - adrp x3, .LANCHOR68 - ldrh w3, [x3, #:lo12:.LANCHOR68] + bls .L1247 + adrp x3, .LANCHOR67 + ldrh w3, [x3, #:lo12:.LANCHOR67] cmp w3, 35 - bhi .L1252 -.L1251: + bhi .L1247 +.L1246: strh wzr, [x26] -.L1252: +.L1247: ldrh w1, [x2, x1] cmp w0, w1 - bgt .L1253 + bgt .L1248 ldrh w0, [x26] cmp w0, 3 - bhi .L1253 + bhi .L1248 mov w0, -1 strh wzr, [x26] - strh w0, [x19, #:lo12:.LANCHOR145] -.L1312: - adrp x0, .LANCHOR172 - ldrh w0, [x0, #:lo12:.LANCHOR172] - b .L1224 -.L1253: - cbnz w1, .L1254 + strh w0, [x19, #:lo12:.LANCHOR144] +.L1307: + adrp x0, .LANCHOR171 + ldrh w0, [x0, #:lo12:.LANCHOR171] + b .L1219 +.L1248: + cbnz w1, .L1249 mov w0, -1 bl decrement_vpc_count ldrh w0, [x26] add w0, w0, 1 strh w0, [x26] - b .L1247 -.L1254: - add x0, x19, :lo12:.LANCHOR145 + b .L1242 +.L1249: + add x0, x19, :lo12:.LANCHOR144 strb wzr, [x0, 8] ldr x0, [x29, 128] - ldrh w0, [x0, #:lo12:.LANCHOR51] + ldrh w0, [x0, #:lo12:.LANCHOR50] cmp w0, w6 - bne .L1255 - adrp x1, .LANCHOR175 + bne .L1250 + adrp x1, .LANCHOR174 adrp x0, .LC1 mov w2, 717 - add x1, x1, :lo12:.LANCHOR175 + add x1, x1, :lo12:.LANCHOR174 add x0, x0, :lo12:.LC1 bl printf -.L1255: - adrp x0, .LANCHOR52 - ldrh w1, [x19, #:lo12:.LANCHOR145] - ldrh w0, [x0, #:lo12:.LANCHOR52] +.L1250: + adrp x0, .LANCHOR51 + ldrh w1, [x19, #:lo12:.LANCHOR144] + ldrh w0, [x0, #:lo12:.LANCHOR51] cmp w1, w0 - bne .L1256 - adrp x1, .LANCHOR175 + bne .L1251 + adrp x1, .LANCHOR174 adrp x0, .LC1 mov w2, 718 - add x1, x1, :lo12:.LANCHOR175 + add x1, x1, :lo12:.LANCHOR174 add x0, x0, :lo12:.LC1 bl printf -.L1256: - adrp x0, .LANCHOR53 - ldrh w1, [x19, #:lo12:.LANCHOR145] - ldrh w0, [x0, #:lo12:.LANCHOR53] +.L1251: + adrp x0, .LANCHOR52 + ldrh w1, [x19, #:lo12:.LANCHOR144] + ldrh w0, [x0, #:lo12:.LANCHOR52] cmp w1, w0 - bne .L1257 - adrp x1, .LANCHOR175 + bne .L1252 + adrp x1, .LANCHOR174 adrp x0, .LC1 mov w2, 719 - add x1, x1, :lo12:.LANCHOR175 + add x1, x1, :lo12:.LANCHOR174 add x0, x0, :lo12:.LC1 bl printf -.L1257: - add x22, x19, :lo12:.LANCHOR145 +.L1252: + add x22, x19, :lo12:.LANCHOR144 mov x0, x22 bl make_superblock - adrp x0, .LANCHOR173 - ldrh w1, [x19, #:lo12:.LANCHOR145] - strh wzr, [x0, #:lo12:.LANCHOR173] - ldr x0, [x23, #:lo12:.LANCHOR42] + adrp x0, .LANCHOR172 + ldrh w1, [x19, #:lo12:.LANCHOR144] + strh wzr, [x0, #:lo12:.LANCHOR172] + ldr x0, [x23, #:lo12:.LANCHOR41] ldrh w1, [x0, x1, lsl 1] - adrp x0, .LANCHOR174 + adrp x0, .LANCHOR173 strh wzr, [x22, 2] - strh w1, [x0, #:lo12:.LANCHOR174] + strh w1, [x0, #:lo12:.LANCHOR173] strb wzr, [x22, 6] -.L1246: +.L1241: mov w0, 1 - str w0, [x21, #:lo12:.LANCHOR94] - adrp x0, .LANCHOR19 + str w0, [x21, #:lo12:.LANCHOR93] + adrp x0, .LANCHOR18 str x0, [x29, 120] - ldrh w1, [x0, #:lo12:.LANCHOR19] + ldrh w1, [x0, #:lo12:.LANCHOR18] ldr w0, [x29, 152] str w1, [x29, 156] - cbz w0, .L1258 - adrp x0, .LANCHOR3 - ldrh w2, [x19, #:lo12:.LANCHOR145] - ldrh w0, [x0, #:lo12:.LANCHOR3] + cbz w0, .L1253 + adrp x0, .LANCHOR2 + ldrh w2, [x19, #:lo12:.LANCHOR144] + ldrh w0, [x0, #:lo12:.LANCHOR2] mul w0, w0, w1 - adrp x1, .LANCHOR42 - ldr x1, [x1, #:lo12:.LANCHOR42] + adrp x1, .LANCHOR41 + ldr x1, [x1, #:lo12:.LANCHOR41] ldrh w1, [x1, x2, lsl 1] sub w0, w0, w1 mov w1, 4 sdiv w0, w0, w1 add w20, w20, w0 and w20, w20, 65535 -.L1258: - add x0, x19, :lo12:.LANCHOR145 +.L1253: + add x0, x19, :lo12:.LANCHOR144 ldr w2, [x29, 156] ldrh w0, [x0, 2] add w1, w0, w20 cmp w1, w2 - ble .L1259 + ble .L1254 sub w20, w2, w0 and w20, w20, 65535 -.L1259: - adrp x0, .LANCHOR173 +.L1254: + adrp x0, .LANCHOR172 mov w28, 0 - add x0, x0, :lo12:.LANCHOR173 + add x0, x0, :lo12:.LANCHOR172 str x0, [x29, 144] -.L1260: +.L1255: cmp w20, w28, uxth - bls .L1268 - add x1, x19, :lo12:.LANCHOR145 - adrp x0, .LANCHOR3 - adrp x23, .LANCHOR66 + bls .L1263 + add x1, x19, :lo12:.LANCHOR144 + adrp x0, .LANCHOR2 + adrp x23, .LANCHOR65 add x1, x1, 16 - ldrh w7, [x0, #:lo12:.LANCHOR3] + ldrh w7, [x0, #:lo12:.LANCHOR2] mov w22, 0 ldrh w4, [x1, -14] mov w2, 0 - ldr x0, [x23, #:lo12:.LANCHOR66] + ldr x0, [x23, #:lo12:.LANCHOR65] mov w6, 65535 add w4, w4, w28 - b .L1269 -.L1262: + b .L1264 +.L1257: ldrh w3, [x1] cmp w3, w6 - beq .L1261 + beq .L1256 ubfiz x5, x22, 5, 16 add w22, w22, 1 add x5, x0, x5 and w22, w22, 65535 orr w3, w4, w3, lsl 10 str w3, [x5, 4] -.L1261: +.L1256: add w2, w2, 1 add x1, x1, 2 and w2, w2, 65535 -.L1269: +.L1264: cmp w2, w7 - bne .L1262 - add x1, x19, :lo12:.LANCHOR145 - adrp x24, .LANCHOR62 - add x24, x24, :lo12:.LANCHOR62 + bne .L1257 + add x1, x19, :lo12:.LANCHOR144 + adrp x24, .LANCHOR61 + add x24, x24, :lo12:.LANCHOR61 ldrb w2, [x1, 8] mov w1, w22 bl FlashReadPages ubfiz x0, x22, 5, 16 mov x22, 0 str x0, [x29, 136] -.L1263: +.L1258: ldr x0, [x29, 136] cmp x22, x0 - bne .L1267 + bne .L1262 add w28, w28, 1 - b .L1260 -.L1267: - ldr x0, [x23, #:lo12:.LANCHOR66] + b .L1255 +.L1262: + ldr x0, [x23, #:lo12:.LANCHOR65] add x1, x0, x22 ldr w0, [x0, x22] cmn w0, #1 - beq .L1264 + beq .L1259 ldr x27, [x1, 16] mov w0, 61589 ldrh w1, [x27] cmp w1, w0 - bne .L1264 + bne .L1259 ldr w4, [x27, 8] cmn w4, #1 - bne .L1265 + bne .L1260 str w4, [x29, 112] mov w2, 753 - adrp x1, .LANCHOR175 + adrp x1, .LANCHOR174 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR175 + add x1, x1, :lo12:.LANCHOR174 add x0, x0, :lo12:.LC1 bl printf ldr w4, [x29, 112] -.L1265: +.L1260: mov w2, 0 add x1, x29, 168 mov w0, w4 bl log2phys - ldr x0, [x23, #:lo12:.LANCHOR66] + ldr x0, [x23, #:lo12:.LANCHOR65] ldr w1, [x29, 168] add x0, x0, x22 ldr w2, [x0, 4] cmp w2, w1 - bne .L1264 + bne .L1259 ldr x1, [x29, 144] - adrp x4, .LANCHOR104 + adrp x4, .LANCHOR103 ldr x2, [x29, 144] ldr w0, [x0, 24] ldrh w1, [x1] add w1, w1, 1 strh w1, [x2] - ldr x2, [x4, #:lo12:.LANCHOR104] + ldr x2, [x4, #:lo12:.LANCHOR103] ldr w1, [x24] add x1, x2, x1, lsl 5 stp x4, x1, [x29, 104] str w0, [x1, 24] bl Ftl_get_new_temp_ppa ldp x4, x1, [x29, 104] - ldr x2, [x4, #:lo12:.LANCHOR104] + ldr x2, [x4, #:lo12:.LANCHOR103] str w0, [x1, 4] ldr w1, [x24] ubfiz x0, x1, 5, 32 add w1, w1, 1 add x2, x2, x0 - ldr x0, [x23, #:lo12:.LANCHOR66] + ldr x0, [x23, #:lo12:.LANCHOR65] add x0, x0, x22 ldr x4, [x0, 8] str x4, [x2, 8] @@ -9308,124 +9237,124 @@ rk_ftl_garbage_collect: str x4, [x2, 16] ldr w2, [x29, 168] str w2, [x27, 12] - adrp x2, .LANCHOR53 - add x11, x2, :lo12:.LANCHOR53 - ldrh w2, [x2, #:lo12:.LANCHOR53] + adrp x2, .LANCHOR52 + add x11, x2, :lo12:.LANCHOR52 + ldrh w2, [x2, #:lo12:.LANCHOR52] strh w2, [x27, 2] - adrp x2, .LANCHOR83 + adrp x2, .LANCHOR82 str w1, [x24] mov w1, 1 - ldr w2, [x2, #:lo12:.LANCHOR83] + ldr w2, [x2, #:lo12:.LANCHOR82] str w2, [x27, 4] bl FtlGcBufAlloc ldrb w1, [x11, 7] ldr w0, [x24] cmp w1, w0 - beq .L1266 + beq .L1261 ldrh w0, [x11, 4] - cbnz w0, .L1264 -.L1266: + cbnz w0, .L1259 +.L1261: bl Ftl_gc_temp_data_write_back - cbz w0, .L1264 - add x0, x19, :lo12:.LANCHOR145 + cbz w0, .L1259 + add x0, x19, :lo12:.LANCHOR144 mov w1, -1 - str wzr, [x21, #:lo12:.LANCHOR94] - strh w1, [x19, #:lo12:.LANCHOR145] + str wzr, [x21, #:lo12:.LANCHOR93] + strh w1, [x19, #:lo12:.LANCHOR144] strh wzr, [x0, 2] - b .L1312 -.L1264: + b .L1307 +.L1259: add x22, x22, 32 - b .L1263 -.L1268: - add x1, x19, :lo12:.LANCHOR145 + b .L1258 +.L1263: + add x1, x19, :lo12:.LANCHOR144 ldrh w0, [x1, 2] add w20, w20, w0 ldr w0, [x29, 156] and w20, w20, 65535 strh w20, [x1, 2] cmp w0, w20 - bhi .L1270 - adrp x0, .LANCHOR62 - ldr w0, [x0, #:lo12:.LANCHOR62] - cbz w0, .L1271 + bhi .L1265 + adrp x0, .LANCHOR61 + ldr w0, [x0, #:lo12:.LANCHOR61] + cbz w0, .L1266 bl Ftl_gc_temp_data_write_back - cbz w0, .L1271 - str wzr, [x21, #:lo12:.LANCHOR94] - b .L1312 -.L1271: - adrp x0, .LANCHOR173 - ldrh w0, [x0, #:lo12:.LANCHOR173] - cbnz w0, .L1272 - ldrh w1, [x19, #:lo12:.LANCHOR145] - adrp x20, .LANCHOR42 - add x0, x19, :lo12:.LANCHOR145 - ldr x3, [x20, #:lo12:.LANCHOR42] + cbz w0, .L1266 + str wzr, [x21, #:lo12:.LANCHOR93] + b .L1307 +.L1266: + adrp x0, .LANCHOR172 + ldrh w0, [x0, #:lo12:.LANCHOR172] + cbnz w0, .L1267 + ldrh w1, [x19, #:lo12:.LANCHOR144] + adrp x20, .LANCHOR41 + add x0, x19, :lo12:.LANCHOR144 + ldr x3, [x20, #:lo12:.LANCHOR41] ubfiz x2, x1, 1, 16 ldrh w4, [x3, x2] - cbz w4, .L1272 - adrp x2, .LANCHOR174 - adrp x22, .LANCHOR152 - add x23, x22, :lo12:.LANCHOR152 + cbz w4, .L1267 + adrp x2, .LANCHOR173 + adrp x22, .LANCHOR151 + add x23, x22, :lo12:.LANCHOR151 mov w24, 0 - ldrh w5, [x2, #:lo12:.LANCHOR174] + ldrh w5, [x2, #:lo12:.LANCHOR173] mov w3, 0 ldrh w2, [x0, 2] adrp x0, .LC42 add x0, x0, :lo12:.LC42 bl printf -.L1273: +.L1268: ldr w0, [x23] cmp w24, w0 - bcs .L1275 + bcs .L1270 mov w2, 0 add x1, x29, 172 mov w0, w24 bl log2phys ldr w3, [x29, 172] cmn w3, #1 - beq .L1274 + beq .L1269 lsr w0, w3, 10 bl P2V_block_in_plane - ldrh w1, [x19, #:lo12:.LANCHOR145] + ldrh w1, [x19, #:lo12:.LANCHOR144] cmp w1, w0, uxth - bne .L1274 + bne .L1269 adrp x0, .LC43 mov w2, w3 mov w1, w24 add x0, x0, :lo12:.LC43 bl printf -.L1275: - ldr w0, [x22, #:lo12:.LANCHOR152] +.L1270: + ldr w0, [x22, #:lo12:.LANCHOR151] cmp w24, w0 - bcc .L1272 - ldrh w1, [x19, #:lo12:.LANCHOR145] - ldr x0, [x20, #:lo12:.LANCHOR42] + bcc .L1267 + ldrh w1, [x19, #:lo12:.LANCHOR144] + ldr x0, [x20, #:lo12:.LANCHOR41] strh wzr, [x0, x1, lsl 1] - ldrh w0, [x19, #:lo12:.LANCHOR145] + ldrh w0, [x19, #:lo12:.LANCHOR144] bl update_vpc_list bl l2p_flush bl FtlVpcTblFlush -.L1272: +.L1267: mov w0, -1 - strh w0, [x19, #:lo12:.LANCHOR145] -.L1270: - adrp x0, .LANCHOR48 - str wzr, [x21, #:lo12:.LANCHOR94] - ldrh w0, [x0, #:lo12:.LANCHOR48] + strh w0, [x19, #:lo12:.LANCHOR144] +.L1265: + adrp x0, .LANCHOR47 + str wzr, [x21, #:lo12:.LANCHOR93] + ldrh w0, [x0, #:lo12:.LANCHOR47] cmp w0, 2 - bhi .L1278 + bhi .L1273 ldr x0, [x29, 120] - ldrh w20, [x0, #:lo12:.LANCHOR19] - b .L1279 -.L1274: + ldrh w20, [x0, #:lo12:.LANCHOR18] + b .L1274 +.L1269: add w24, w24, 1 - b .L1273 -.L1278: + b .L1268 +.L1273: add w0, w0, 1 - b .L1224 -.L1281: + b .L1219 +.L1276: mov w0, 0 - b .L1224 + b .L1219 .size rk_ftl_garbage_collect, .-rk_ftl_garbage_collect .section .text.FtlRead,"ax",@progbits .align 2 @@ -9436,22 +9365,22 @@ FtlRead: and w0, w0, 255 cmp w0, 16 add x29, sp, 0 - stp x19, x20, [sp, 16] - mov w19, w1 - stp x23, x24, [sp, 48] - mov x23, x3 - stp x25, x26, [sp, 64] - mov w26, w2 stp x21, x22, [sp, 32] + mov x22, x3 + stp x23, x24, [sp, 48] + mov w24, w2 stp x27, x28, [sp, 80] - bne .L1314 + mov w27, w1 + stp x19, x20, [sp, 16] + stp x25, x26, [sp, 64] + bne .L1309 mov x2, x3 - mov w1, w26 - add w0, w19, 256 + mov w1, w24 + add w0, w27, 256 bl FtlVendorPartRead - mov w21, w0 -.L1313: - mov w0, w21 + mov w19, w0 +.L1308: + mov w0, w19 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -9459,88 +9388,91 @@ FtlRead: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 176 ret -.L1314: - add w0, w1, w2 - str w0, [x29, 136] - adrp x0, .LANCHOR34 - add w1, w1, w2 - ldr w0, [x0, #:lo12:.LANCHOR34] +.L1309: + adrp x0, .LANCHOR33 + ldr w0, [x0, #:lo12:.LANCHOR33] cmp w1, w0 - bhi .L1335 - adrp x0, .LANCHOR166 - ldr w21, [x0, #:lo12:.LANCHOR166] - cmn w21, #1 - beq .L1313 - adrp x22, .LANCHOR12 - adrp x25, .LANCHOR135 - add x25, x25, :lo12:.LANCHOR135 - mov w27, 0 - ldrh w0, [x22, #:lo12:.LANCHOR12] - mov w21, 0 - adrp x28, .LANCHOR103 + bcs .L1332 + cmp w2, w0 + bhi .L1332 + add w1, w1, w2 + str w1, [x29, 136] + cmp w0, w1 + bcc .L1332 + adrp x0, .LANCHOR165 + ldr w19, [x0, #:lo12:.LANCHOR165] + cmn w19, #1 + beq .L1308 + adrp x21, .LANCHOR11 + adrp x25, .LANCHOR134 + add x25, x25, :lo12:.LANCHOR134 + mov w26, 0 + ldrh w0, [x21, #:lo12:.LANCHOR11] + mov w19, 0 + adrp x28, .LANCHOR102 stp wzr, wzr, [x29, 140] - udiv w1, w19, w0 + udiv w1, w27, w0 stp wzr, w1, [x29, 148] - add w1, w19, w2 - sub w24, w1, #1 - adrp x1, .LANCHOR163 + add w1, w27, w2 + sub w23, w1, #1 + adrp x1, .LANCHOR162 ldr w20, [x29, 152] - udiv w24, w24, w0 + udiv w23, w23, w0 ldr w0, [x29, 152] - sub w0, w24, w0 + sub w0, w23, w0 add w0, w0, 1 str w0, [x29, 156] - ldr w0, [x1, #:lo12:.LANCHOR163] + ldr w0, [x1, #:lo12:.LANCHOR162] add w0, w0, w2 - str w0, [x1, #:lo12:.LANCHOR163] - adrp x1, .LANCHOR89 + str w0, [x1, #:lo12:.LANCHOR162] + adrp x1, .LANCHOR88 ldr w2, [x29, 156] - ldr w0, [x1, #:lo12:.LANCHOR89] + ldr w0, [x1, #:lo12:.LANCHOR88] add w0, w0, w2 - str w0, [x1, #:lo12:.LANCHOR89] -.L1316: + str w0, [x1, #:lo12:.LANCHOR88] +.L1311: ldr w0, [x29, 156] - cbnz w0, .L1333 - adrp x0, .LANCHOR74 - ldrh w0, [x0, #:lo12:.LANCHOR74] - cbnz w0, .L1334 - adrp x0, .LANCHOR48 - ldrh w0, [x0, #:lo12:.LANCHOR48] + cbnz w0, .L1328 + adrp x0, .LANCHOR73 + ldrh w0, [x0, #:lo12:.LANCHOR73] + cbnz w0, .L1329 + adrp x0, .LANCHOR47 + ldrh w0, [x0, #:lo12:.LANCHOR47] cmp w0, 31 - bhi .L1313 -.L1334: + bhi .L1308 +.L1329: mov w1, 1 mov w0, 0 bl rk_ftl_garbage_collect - b .L1313 -.L1333: + b .L1308 +.L1328: add x1, x29, 172 mov w2, 0 mov w0, w20 bl log2phys ldr w1, [x29, 172] cmn w1, #1 - bne .L1317 - add x5, x22, :lo12:.LANCHOR12 - mov w4, 0 -.L1318: - ldrh w0, [x5] - cmp w4, w0 - bcc .L1320 -.L1321: + bne .L1312 + add x6, x21, :lo12:.LANCHOR11 + mov w5, 0 +.L1313: + ldrh w0, [x6] + cmp w5, w0 + bcc .L1315 +.L1316: ldr w0, [x29, 156] add w20, w20, 1 subs w0, w0, #1 str w0, [x29, 156] - beq .L1325 - adrp x0, .LANCHOR3 - ldrh w0, [x0, #:lo12:.LANCHOR3] - cmp w27, w0, lsl 2 - bne .L1316 -.L1325: - cbz w27, .L1316 - ldr x0, [x28, #:lo12:.LANCHOR103] - mov w1, w27 + beq .L1320 + adrp x0, .LANCHOR2 + ldrh w0, [x0, #:lo12:.LANCHOR2] + cmp w26, w0, lsl 2 + bne .L1311 +.L1320: + cbz w26, .L1311 + ldr x0, [x28, #:lo12:.LANCHOR102] + mov w1, w26 mov w2, 0 bl FlashReadPages ldr w0, [x29, 140] @@ -9552,159 +9484,159 @@ FtlRead: ldr w0, [x29, 144] lsl w0, w0, 9 str w0, [x29, 120] - ubfiz x0, x27, 5, 32 - mov x27, 0 + ubfiz x0, x26, 5, 32 + mov x26, 0 str x0, [x29, 104] - add x0, x22, :lo12:.LANCHOR12 + add x0, x21, :lo12:.LANCHOR11 str x0, [x29, 96] -.L1332: - ldr x0, [x28, #:lo12:.LANCHOR103] +.L1327: + ldr x0, [x28, #:lo12:.LANCHOR102] ldr w2, [x29, 152] - add x0, x0, x27 + add x0, x0, x26 ldr w1, [x0, 24] cmp w2, w1 - bne .L1327 + bne .L1322 ldr x1, [x0, 8] - adrp x0, .LANCHOR109 - ldr x0, [x0, #:lo12:.LANCHOR109] + adrp x0, .LANCHOR108 + ldr x0, [x0, #:lo12:.LANCHOR108] cmp x1, x0 - bne .L1328 + bne .L1323 ldr x0, [x29, 128] ldr w2, [x29, 120] add x1, x1, x0 - mov x0, x23 -.L1346: + mov x0, x22 +.L1343: bl ftl_memcpy -.L1328: - ldr x0, [x28, #:lo12:.LANCHOR103] - add x0, x0, x27 +.L1323: + ldr x0, [x28, #:lo12:.LANCHOR102] + add x0, x0, x26 ldr x1, [x0, 16] ldr w2, [x0, 24] ldr w1, [x1, 8] cmp w2, w1 - beq .L1329 + beq .L1324 ldr w1, [x25, 72] add w1, w1, 1 str w1, [x25, 72] -.L1329: +.L1324: ldr w1, [x0] cmn w1, #1 - bne .L1330 + bne .L1325 ldr w0, [x25, 72] - mov w21, w1 + mov w19, w1 add w0, w0, 1 str w0, [x25, 72] -.L1331: +.L1326: ldr x0, [x29, 104] - add x27, x27, 32 - cmp x0, x27 - bne .L1332 - mov w27, 0 - b .L1316 -.L1320: - madd w0, w20, w0, w4 - cmp w19, w0 - bhi .L1319 + add x26, x26, 32 + cmp x0, x26 + bne .L1327 + mov w26, 0 + b .L1311 +.L1315: + madd w0, w20, w0, w5 + cmp w27, w0 + bhi .L1314 ldr w1, [x29, 136] cmp w1, w0 - bls .L1319 - sub w0, w0, w19 - str x5, [x29, 120] + bls .L1314 + sub w0, w0, w27 + str x6, [x29, 120] lsl w0, w0, 9 - str w4, [x29, 128] + str w5, [x29, 128] mov w2, 512 mov w1, 0 - add x0, x23, x0 + add x0, x22, x0 bl ftl_memset - ldr w4, [x29, 128] - ldr x5, [x29, 120] -.L1319: - add w4, w4, 1 - b .L1318 -.L1317: - ldr x2, [x28, #:lo12:.LANCHOR103] - ubfiz x0, x27, 5, 32 + ldr w5, [x29, 128] + ldr x6, [x29, 120] +.L1314: + add w5, w5, 1 + b .L1313 +.L1312: + ldr x2, [x28, #:lo12:.LANCHOR102] + ubfiz x0, x26, 5, 32 add x0, x2, x0 str w1, [x0, 4] ldr w1, [x29, 152] cmp w20, w1 - bne .L1322 - adrp x1, .LANCHOR109 - ldr x1, [x1, #:lo12:.LANCHOR109] + bne .L1317 + adrp x1, .LANCHOR108 + ldr x1, [x1, #:lo12:.LANCHOR108] str x1, [x0, 8] - ldrh w1, [x22, #:lo12:.LANCHOR12] - udiv w2, w19, w1 - msub w2, w2, w1, w19 + ldrh w1, [x21, #:lo12:.LANCHOR11] + udiv w2, w27, w1 + msub w2, w2, w1, w27 str w2, [x29, 148] sub w2, w1, w2 - cmp w26, w2 - csel w2, w26, w2, ls + cmp w24, w2 + csel w2, w24, w2, ls str w2, [x29, 144] cmp w1, w2 - bne .L1323 - str x23, [x0, 8] -.L1323: - adrp x1, .LANCHOR24 - adrp x2, .LANCHOR115 + bne .L1318 + str x22, [x0, 8] +.L1318: + adrp x1, .LANCHOR23 + adrp x2, .LANCHOR114 str w20, [x0, 24] - ldrh w1, [x1, #:lo12:.LANCHOR24] - ldr x2, [x2, #:lo12:.LANCHOR115] - mul w1, w1, w27 - add w27, w27, 1 + ldrh w1, [x1, #:lo12:.LANCHOR23] + ldr x2, [x2, #:lo12:.LANCHOR114] + mul w1, w1, w26 + add w26, w26, 1 and x1, x1, 4294967292 add x1, x2, x1 str x1, [x0, 16] - b .L1321 -.L1322: - cmp w20, w24 - bne .L1324 - ldrh w2, [x22, #:lo12:.LANCHOR12] - adrp x1, .LANCHOR110 + b .L1316 +.L1317: + cmp w20, w23 + bne .L1319 + ldrh w2, [x21, #:lo12:.LANCHOR11] + adrp x1, .LANCHOR109 ldr w3, [x29, 136] - ldr x1, [x1, #:lo12:.LANCHOR110] + ldr x1, [x1, #:lo12:.LANCHOR109] str x1, [x0, 8] mul w1, w20, w2 sub w3, w3, w1 str w3, [x29, 140] cmp w2, w3 - bne .L1323 -.L1345: - sub w1, w1, w19 + bne .L1318 +.L1342: + sub w1, w1, w27 lsl w1, w1, 9 - add x1, x23, x1 + add x1, x22, x1 str x1, [x0, 8] - b .L1323 -.L1324: - ldrh w1, [x22, #:lo12:.LANCHOR12] + b .L1318 +.L1319: + ldrh w1, [x21, #:lo12:.LANCHOR11] mul w1, w1, w20 - b .L1345 -.L1327: - cmp w24, w1 - bne .L1328 + b .L1342 +.L1322: + cmp w23, w1 + bne .L1323 ldr x1, [x0, 8] - adrp x0, .LANCHOR110 - ldr x0, [x0, #:lo12:.LANCHOR110] + adrp x0, .LANCHOR109 + ldr x0, [x0, #:lo12:.LANCHOR109] cmp x1, x0 - bne .L1328 + bne .L1323 ldr x0, [x29, 96] ldr w2, [x29, 116] ldrh w0, [x0] - mul w0, w0, w24 - sub w0, w0, w19 + mul w0, w0, w23 + sub w0, w0, w27 lsl w0, w0, 9 - add x0, x23, x0 - b .L1346 -.L1330: + add x0, x22, x0 + b .L1343 +.L1325: cmp w1, 256 - bne .L1331 + bne .L1326 ldr w0, [x0, 4] lsr w0, w0, 10 bl P2V_block_in_plane bl FtlGcRefreshBlock - b .L1331 -.L1335: - mov w21, -1 - b .L1313 + b .L1326 +.L1332: + mov w19, -1 + b .L1308 .size FtlRead, .-FtlRead .section .text.sftl_read,"ax",@progbits .align 2 @@ -9726,20 +9658,20 @@ FtlWrite: and w0, w0, 255 cmp w0, 16 add x29, sp, 0 - stp x23, x24, [sp, 48] - mov w23, w1 - stp x25, x26, [sp, 64] - mov x26, x3 - stp x19, x20, [sp, 16] stp x21, x22, [sp, 32] + mov w22, w1 + stp x25, x26, [sp, 64] + mov w26, w2 stp x27, x28, [sp, 80] - str w2, [x29, 172] - bne .L1349 - add w0, w1, 256 - ldr w1, [x29, 172] + mov x27, x3 + stp x19, x20, [sp, 16] + stp x23, x24, [sp, 48] + bne .L1346 mov x2, x3 + mov w1, w26 + add w0, w22, 256 bl FtlVendorPartWrite -.L1348: +.L1345: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -9747,79 +9679,80 @@ FtlWrite: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 224 ret -.L1349: - ldr w0, [x29, 172] - add w0, w1, w0 - str w0, [x29, 152] - adrp x0, .LANCHOR34 - ldr w1, [x29, 152] - ldr w0, [x0, #:lo12:.LANCHOR34] +.L1346: + adrp x0, .LANCHOR33 + ldr w0, [x0, #:lo12:.LANCHOR33] cmp w1, w0 - bhi .L1381 - adrp x0, .LANCHOR166 - ldr w0, [x0, #:lo12:.LANCHOR166] + bcs .L1380 + cmp w2, w0 + bhi .L1380 + add w1, w1, w2 + str w1, [x29, 136] + cmp w0, w1 + bcc .L1380 + adrp x0, .LANCHOR165 + ldr w0, [x0, #:lo12:.LANCHOR165] cmn w0, #1 - beq .L1348 - adrp x0, .LANCHOR176 + beq .L1345 + adrp x0, .LANCHOR175 mov w1, 2048 - ldr w2, [x29, 152] - str w1, [x0, #:lo12:.LANCHOR176] - adrp x1, .LANCHOR12 + add w2, w22, w2 + str w1, [x0, #:lo12:.LANCHOR175] + adrp x1, .LANCHOR11 sub w2, w2, #1 - ldr w3, [x29, 172] - ldrh w0, [x1, #:lo12:.LANCHOR12] str x1, [x29, 160] - udiv w25, w23, w0 + ldrh w0, [x1, #:lo12:.LANCHOR11] + udiv w25, w22, w0 udiv w0, w2, w0 - adrp x2, .LANCHOR162 + adrp x2, .LANCHOR161 mov w19, w25 str w0, [x29, 144] sub w0, w0, w25 add w24, w0, 1 str w0, [x29, 140] - ldr w0, [x2, #:lo12:.LANCHOR162] - add w0, w0, w3 - str w0, [x2, #:lo12:.LANCHOR162] - adrp x2, .LANCHOR85 - ldr w0, [x2, #:lo12:.LANCHOR85] + ldr w0, [x2, #:lo12:.LANCHOR161] + add w0, w0, w26 + str w0, [x2, #:lo12:.LANCHOR161] + adrp x2, .LANCHOR84 + ldr w0, [x2, #:lo12:.LANCHOR84] add w0, w0, w24 - str w0, [x2, #:lo12:.LANCHOR85] - adrp x0, .LANCHOR51 - add x20, x0, :lo12:.LANCHOR51 -.L1351: - cbnz w24, .L1376 + str w0, [x2, #:lo12:.LANCHOR84] + adrp x0, .LANCHOR50 + add x20, x0, :lo12:.LANCHOR50 +.L1348: + cbnz w24, .L1373 ldr w1, [x29, 140] mov w0, 0 bl rk_ftl_garbage_collect - adrp x0, .LANCHOR48 + adrp x0, .LANCHOR47 mov x22, x0 - ldrh w1, [x0, #:lo12:.LANCHOR48] + ldrh w1, [x0, #:lo12:.LANCHOR47] cmp w1, 5 - bls .L1377 -.L1379: - mov w0, 0 - b .L1348 + bls .L1374 .L1376: - adrp x0, .LANCHOR51 - add x0, x0, :lo12:.LANCHOR51 - adrp x1, .LANCHOR3 + mov w0, 0 + b .L1345 +.L1373: + adrp x0, .LANCHOR50 + add x0, x0, :lo12:.LANCHOR50 + adrp x1, .LANCHOR2 str x1, [x29, 112] ldrb w2, [x0, 6] - ldrh w0, [x1, #:lo12:.LANCHOR3] + ldrh w0, [x1, #:lo12:.LANCHOR2] cmp w2, w0 - bcc .L1352 - adrp x1, .LANCHOR177 + bcc .L1349 + adrp x1, .LANCHOR176 adrp x0, .LC1 mov w2, 1041 - add x1, x1, :lo12:.LANCHOR177 + add x1, x1, :lo12:.LANCHOR176 add x0, x0, :lo12:.LC1 bl printf -.L1352: +.L1349: ldrh w0, [x20, 4] - cbnz w0, .L1353 + cbnz w0, .L1350 mov x0, x20 bl allocate_new_data_superblock -.L1353: +.L1350: ldrb w0, [x20, 7] ldrh w1, [x20, 4] lsl w0, w0, 2 @@ -9830,163 +9763,164 @@ FtlWrite: csel w0, w0, w24, ls str w0, [x29, 148] ldr x0, [x29, 112] - ldrh w0, [x0, #:lo12:.LANCHOR3] + ldrh w0, [x0, #:lo12:.LANCHOR2] cmp w1, w0 - bcc .L1354 - adrp x1, .LANCHOR177 + bcc .L1351 + adrp x1, .LANCHOR176 adrp x0, .LC1 mov w2, 1074 - add x1, x1, :lo12:.LANCHOR177 + add x1, x1, :lo12:.LANCHOR176 add x0, x0, :lo12:.LC1 bl printf -.L1354: - adrp x0, .LANCHOR24 - add x0, x0, :lo12:.LANCHOR24 - mov x28, 0 - str x0, [x29, 104] +.L1351: adrp x0, .LANCHOR23 add x0, x0, :lo12:.LANCHOR23 + str xzr, [x29, 168] + str x0, [x29, 104] + adrp x0, .LANCHOR22 + add x0, x0, :lo12:.LANCHOR22 str x0, [x29, 96] -.L1355: - ldr w0, [x29, 148] - mov w22, w28 - adrp x27, .LANCHOR105 - cmp w28, w0 - bcc .L1374 - mov x22, x0 -.L1356: - ldr x0, [x27, #:lo12:.LANCHOR105] +.L1352: + ldr w1, [x29, 148] + adrp x28, .LANCHOR104 + ldr w23, [x29, 168] + cmp w23, w1 + bcc .L1371 + mov x23, x1 +.L1353: + ldr x0, [x28, #:lo12:.LANCHOR104] mov x3, x20 mov w2, 0 - mov w1, w22 + mov w1, w23 bl FtlProgPages - cmp w24, w22 - bcs .L1375 - adrp x1, .LANCHOR177 + cmp w24, w23 + bcs .L1372 + adrp x1, .LANCHOR176 adrp x0, .LC1 mov w2, 1152 - add x1, x1, :lo12:.LANCHOR177 + add x1, x1, :lo12:.LANCHOR176 add x0, x0, :lo12:.LC1 bl printf -.L1375: - sub w24, w24, w22 - b .L1351 -.L1374: +.L1372: + sub w24, w24, w23 + b .L1348 +.L1371: ldrh w0, [x20, 4] - cbz w0, .L1356 + cbz w0, .L1353 add x1, x29, 188 mov w2, 0 mov w0, w19 bl log2phys mov x0, x20 - lsl x21, x28, 5 bl get_new_active_ppa - ldr x1, [x27, #:lo12:.LANCHOR105] + ldr x1, [x29, 168] + lsl x21, x1, 5 + ldr x1, [x28, #:lo12:.LANCHOR104] add x1, x1, x21 str w0, [x1, 4] ldr x0, [x29, 104] str w19, [x1, 24] ldrh w2, [x0] - mul w22, w22, w2 - and x0, x22, 4294967292 + mul w23, w23, w2 + and x0, x23, 4294967292 str x0, [x29, 128] - adrp x0, .LANCHOR115 + adrp x0, .LANCHOR114 ldr x3, [x29, 128] - ldr x0, [x0, #:lo12:.LANCHOR115] + ldr x0, [x0, #:lo12:.LANCHOR114] str x0, [x29, 120] - add x22, x0, x3 - str x22, [x1, 16] - mov x0, x22 + add x23, x0, x3 + str x23, [x1, 16] + mov x0, x23 mov w1, 0 bl ftl_memset ldr w0, [x29, 144] cmp w19, w25 ccmp w19, w0, 4, ne - bne .L1357 + bne .L1354 cmp w19, w25 ldr x0, [x29, 160] - bne .L1358 - ldrh w2, [x0, #:lo12:.LANCHOR12] - udiv w0, w23, w2 - msub w0, w0, w2, w23 - str w0, [x29, 156] + bne .L1355 + ldrh w2, [x0, #:lo12:.LANCHOR11] + udiv w0, w22, w2 + msub w0, w0, w2, w22 + str w0, [x29, 152] sub w2, w2, w0 - ldr w0, [x29, 172] - cmp w2, w0 - csel w0, w2, w0, ls - str w0, [x29, 168] -.L1359: + cmp w2, w26 + csel w0, w2, w26, ls + str w0, [x29, 156] +.L1356: ldr x0, [x29, 160] - ldr w1, [x29, 168] - ldrh w0, [x0, #:lo12:.LANCHOR12] + ldr w1, [x29, 156] + ldrh w0, [x0, #:lo12:.LANCHOR11] cmp w1, w0 - ldr x0, [x27, #:lo12:.LANCHOR105] - bne .L1360 + ldr x0, [x28, #:lo12:.LANCHOR104] + bne .L1357 add x21, x0, x21 cmp w19, w25 - bne .L1361 - str x26, [x21, 8] -.L1362: + bne .L1358 + str x27, [x21, 8] +.L1359: ldr x0, [x29, 112] ldrb w1, [x20, 6] - ldrh w0, [x0, #:lo12:.LANCHOR3] + ldrh w0, [x0, #:lo12:.LANCHOR2] cmp w1, w0 - bcc .L1371 - adrp x1, .LANCHOR177 + bcc .L1368 + adrp x1, .LANCHOR176 adrp x0, .LC1 mov w2, 1143 - add x1, x1, :lo12:.LANCHOR177 + add x1, x1, :lo12:.LANCHOR176 add x0, x0, :lo12:.LC1 bl printf -.L1371: +.L1368: ldp x1, x2, [x29, 120] mov w0, -3947 - add x28, x28, 1 strh w0, [x1, x2] - adrp x1, .LANCHOR83 - ldr w0, [x1, #:lo12:.LANCHOR83] - stp w0, w19, [x22, 4] + adrp x1, .LANCHOR82 + ldr w0, [x1, #:lo12:.LANCHOR82] + stp w0, w19, [x23, 4] add w19, w19, 1 add w0, w0, 1 cmn w0, #1 csel w0, w0, wzr, ne - str w0, [x1, #:lo12:.LANCHOR83] + str w0, [x1, #:lo12:.LANCHOR82] ldr w0, [x29, 188] - str w0, [x22, 12] + str w0, [x23, 12] ldrh w0, [x20] - strh w0, [x22, 2] - b .L1355 -.L1358: - ldrh w2, [x0, #:lo12:.LANCHOR12] - ldr w0, [x29, 152] - str wzr, [x29, 156] + strh w0, [x23, 2] + ldr x0, [x29, 168] + add x0, x0, 1 + str x0, [x29, 168] + b .L1352 +.L1355: + ldrh w2, [x0, #:lo12:.LANCHOR11] + ldr w0, [x29, 136] msub w2, w19, w2, w0 and w0, w2, 65535 - str w0, [x29, 168] - b .L1359 -.L1361: - ldr w0, [x29, 168] -.L1389: + stp wzr, w0, [x29, 152] + b .L1356 +.L1358: + ldr w0, [x29, 156] +.L1388: mul w0, w0, w19 - sub w0, w0, w23 + sub w0, w0, w22 lsl w0, w0, 9 - add x0, x26, x0 + add x0, x27, x0 str x0, [x21, 8] - b .L1362 -.L1360: + b .L1359 +.L1357: add x0, x0, x21 cmp w19, w25 - bne .L1363 - adrp x1, .LANCHOR109 - ldr x1, [x1, #:lo12:.LANCHOR109] -.L1388: + bne .L1360 + adrp x1, .LANCHOR108 + ldr x1, [x1, #:lo12:.LANCHOR108] +.L1387: str x1, [x0, 8] ldr w0, [x29, 188] cmn w0, #1 - beq .L1365 + beq .L1362 str w0, [x29, 196] mov w2, 0 - ldr x0, [x27, #:lo12:.LANCHOR105] + ldr x0, [x28, #:lo12:.LANCHOR104] str w19, [x29, 216] add x0, x0, x21 ldp x1, x0, [x0, 8] @@ -9996,42 +9930,42 @@ FtlWrite: bl FlashReadPages ldr w3, [x29, 192] cmn w3, #1 - bne .L1366 - adrp x0, .LANCHOR135 - add x0, x0, :lo12:.LANCHOR135 + bne .L1363 + adrp x0, .LANCHOR134 + add x0, x0, :lo12:.LANCHOR134 mov w2, w19 ldr w1, [x0, 72] add w1, w1, 1 str w1, [x0, 72] - ldr w1, [x22, 8] + ldr w1, [x23, 8] adrp x0, .LC44 add x0, x0, :lo12:.LC44 bl printf -.L1369: - ldr w0, [x29, 168] +.L1366: + ldr w0, [x29, 156] cmp w19, w25 lsl w2, w0, 9 - bne .L1370 - ldr x0, [x27, #:lo12:.LANCHOR105] - mov x1, x26 + bne .L1367 + ldr x0, [x28, #:lo12:.LANCHOR104] + mov x1, x27 add x21, x0, x21 - ldr w0, [x29, 156] + ldr w0, [x29, 152] ldr x3, [x21, 8] lsl w0, w0, 9 add x0, x3, x0 -.L1390: +.L1389: bl ftl_memcpy - b .L1362 + b .L1359 +.L1360: + adrp x1, .LANCHOR109 + ldr x1, [x1, #:lo12:.LANCHOR109] + b .L1387 .L1363: - adrp x1, .LANCHOR110 - ldr x1, [x1, #:lo12:.LANCHOR110] - b .L1388 -.L1366: - ldr w1, [x22, 8] + ldr w1, [x23, 8] cmp w19, w1 - beq .L1368 - adrp x0, .LANCHOR135 - add x0, x0, :lo12:.LANCHOR135 + beq .L1365 + adrp x0, .LANCHOR134 + add x0, x0, :lo12:.LANCHOR134 ldr w2, [x0, 72] add w2, w2, 1 str w2, [x0, 72] @@ -10039,64 +9973,64 @@ FtlWrite: mov w2, w19 add x0, x0, :lo12:.LC45 bl printf -.L1368: - ldr w0, [x22, 8] +.L1365: + ldr w0, [x23, 8] cmp w19, w0 - beq .L1369 + beq .L1366 mov w2, 1128 - adrp x1, .LANCHOR177 + adrp x1, .LANCHOR176 adrp x0, .LC1 - add x1, x1, :lo12:.LANCHOR177 + add x1, x1, :lo12:.LANCHOR176 add x0, x0, :lo12:.LC1 bl printf - b .L1369 -.L1365: - ldr x0, [x27, #:lo12:.LANCHOR105] + b .L1366 +.L1362: + ldr x0, [x28, #:lo12:.LANCHOR104] ldr x1, [x29, 96] add x0, x0, x21 ldrh w2, [x1] mov w1, 0 ldr x0, [x0, 8] bl ftl_memset - b .L1369 -.L1370: + b .L1366 +.L1367: ldr x0, [x29, 160] - ldrh w1, [x0, #:lo12:.LANCHOR12] - ldr x0, [x27, #:lo12:.LANCHOR105] + ldrh w1, [x0, #:lo12:.LANCHOR11] + ldr x0, [x28, #:lo12:.LANCHOR104] add x21, x0, x21 mul w1, w1, w19 - sub w1, w1, w23 + sub w1, w1, w22 ldr x0, [x21, 8] lsl w1, w1, 9 - add x1, x26, x1 - b .L1390 -.L1357: - ldr x0, [x27, #:lo12:.LANCHOR105] + add x1, x27, x1 + b .L1389 +.L1354: + ldr x0, [x28, #:lo12:.LANCHOR104] add x21, x0, x21 ldr x0, [x29, 160] - ldrh w0, [x0, #:lo12:.LANCHOR12] - b .L1389 -.L1377: - adrp x23, .LANCHOR72 - adrp x20, .LANCHOR101 - adrp x21, .LANCHOR100 - add x23, x23, :lo12:.LANCHOR72 - add x20, x20, :lo12:.LANCHOR101 - add x21, x21, :lo12:.LANCHOR100 + ldrh w0, [x0, #:lo12:.LANCHOR11] + b .L1388 +.L1374: + adrp x23, .LANCHOR71 + adrp x20, .LANCHOR100 + adrp x21, .LANCHOR99 + add x23, x23, :lo12:.LANCHOR71 + add x20, x20, :lo12:.LANCHOR100 + add x21, x21, :lo12:.LANCHOR99 mov w19, 256 -.L1380: - adrp x0, .LANCHOR145 +.L1377: + adrp x0, .LANCHOR144 mov w1, 65535 - ldrh w0, [x0, #:lo12:.LANCHOR145] + ldrh w0, [x0, #:lo12:.LANCHOR144] cmp w0, w1 - bne .L1378 + bne .L1375 ldrh w1, [x23] cmp w1, w0 - bne .L1378 + bne .L1375 mov w0, 0 bl List_get_gc_head_node bl FtlGcRefreshBlock -.L1378: +.L1375: mov w0, 128 mov w1, 1 strh w0, [x20] @@ -10106,15 +10040,15 @@ FtlWrite: mov w1, 1 mov w0, 0 bl rk_ftl_garbage_collect - ldrh w0, [x22, #:lo12:.LANCHOR48] + ldrh w0, [x22, #:lo12:.LANCHOR47] cmp w0, 2 - bhi .L1379 + bhi .L1376 subs w19, w19, #1 - bne .L1380 - b .L1379 -.L1381: + bne .L1377 + b .L1376 +.L1380: mov w0, -1 - b .L1348 + b .L1345 .size FtlWrite, .-FtlWrite .section .text.sftl_gc,"ax",@progbits .align 2 @@ -10133,33 +10067,33 @@ FtlLoadSysInfo: stp x29, x30, [sp, -112]! add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x19, .LANCHOR138 + adrp x19, .LANCHOR137 stp x21, x22, [sp, 32] - add x0, x19, :lo12:.LANCHOR138 - adrp x22, .LANCHOR106 + add x0, x19, :lo12:.LANCHOR137 + adrp x22, .LANCHOR105 stp x25, x26, [sp, 64] - adrp x25, .LANCHOR114 + adrp x25, .LANCHOR113 stp x23, x24, [sp, 48] stp x27, x28, [sp, 80] - adrp x23, .LANCHOR42 - ldr x1, [x22, #:lo12:.LANCHOR106] - adrp x21, .LANCHOR5 + adrp x23, .LANCHOR41 + ldr x1, [x22, #:lo12:.LANCHOR105] + adrp x21, .LANCHOR4 str x1, [x0, 8] - adrp x20, .LANCHOR139 - ldr x1, [x25, #:lo12:.LANCHOR114] + adrp x20, .LANCHOR138 + ldr x1, [x25, #:lo12:.LANCHOR113] str x1, [x0, 16] - ldr x0, [x23, #:lo12:.LANCHOR42] + ldr x0, [x23, #:lo12:.LANCHOR41] mov w1, 0 - ldrh w2, [x21, #:lo12:.LANCHOR5] + ldrh w2, [x21, #:lo12:.LANCHOR4] lsl w2, w2, 1 bl ftl_memset - ldrh w0, [x20, #:lo12:.LANCHOR139] + ldrh w0, [x20, #:lo12:.LANCHOR138] mov w1, 65535 cmp w0, w1 - bne .L1393 -.L1404: + bne .L1392 +.L1403: mov w0, -1 -.L1392: +.L1391: ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x23, x24, [sp, 48] @@ -10167,133 +10101,122 @@ FtlLoadSysInfo: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 112 ret -.L1393: - add x24, x20, :lo12:.LANCHOR139 +.L1392: + add x24, x20, :lo12:.LANCHOR138 mov w1, 1 bl FtlGetLastWrittenPage sxth w28, w0 add w0, w0, 1 - adrp x26, .LANCHOR23 + adrp x26, .LANCHOR22 strh w0, [x24, 2] - adrp x27, .LANCHOR178 - ldrsh w24, [x20, #:lo12:.LANCHOR139] - add x26, x26, :lo12:.LANCHOR23 - add x27, x27, :lo12:.LANCHOR178 -.L1395: - tbz w28, #31, .L1401 - adrp x1, .LANCHOR178 - adrp x0, .LC1 - mov w2, 1465 - add x1, x1, :lo12:.LANCHOR178 - add x0, x0, :lo12:.LC1 - bl printf -.L1400: - adrp x1, .LANCHOR23 - ldrh w0, [x21, #:lo12:.LANCHOR5] - ldrh w1, [x1, #:lo12:.LANCHOR23] - add x0, x0, 24 - cmp x1, x0, lsl 1 - bcs .L1403 - adrp x1, .LANCHOR178 + adrp x27, .LANCHOR177 + ldrsh w24, [x20, #:lo12:.LANCHOR138] + add x26, x26, :lo12:.LANCHOR22 + add x27, x27, :lo12:.LANCHOR177 +.L1394: + tbz w28, #31, .L1400 + adrp x1, .LANCHOR177 adrp x0, .LC1 mov w2, 1467 - add x1, x1, :lo12:.LANCHOR178 + add x1, x1, :lo12:.LANCHOR177 add x0, x0, :lo12:.LC1 bl printf -.L1403: - add x24, x19, :lo12:.LANCHOR138 - adrp x19, .LANCHOR39 - add x22, x19, :lo12:.LANCHOR39 +.L1399: + adrp x1, .LANCHOR22 + ldrh w0, [x21, #:lo12:.LANCHOR4] + ldrh w1, [x1, #:lo12:.LANCHOR22] + add x0, x0, 24 + cmp x1, x0, lsl 1 + bcs .L1402 + adrp x1, .LANCHOR177 + adrp x0, .LC1 + mov w2, 1469 + add x1, x1, :lo12:.LANCHOR177 + add x0, x0, :lo12:.LC1 + bl printf +.L1402: + add x24, x19, :lo12:.LANCHOR137 + adrp x19, .LANCHOR38 + add x22, x19, :lo12:.LANCHOR38 mov w2, 48 mov x0, x22 ldr x1, [x24, 8] bl ftl_memcpy - ldr x0, [x23, #:lo12:.LANCHOR42] - ldrh w2, [x21, #:lo12:.LANCHOR5] + ldr x0, [x23, #:lo12:.LANCHOR41] + ldrh w2, [x21, #:lo12:.LANCHOR4] ldr x1, [x24, 8] lsl w2, w2, 1 add x1, x1, 48 bl ftl_memcpy - ldrh w1, [x21, #:lo12:.LANCHOR5] - ldr x0, [x24, 8] - lsr w2, w1, 3 - ubfiz x1, x1, 1, 16 - add x1, x1, 48 - add w2, w2, 4 - and x1, x1, -4 - add x1, x0, x1 - adrp x0, .LANCHOR1 - ldr x0, [x0, #:lo12:.LANCHOR1] - bl ftl_memcpy - ldr w1, [x19, #:lo12:.LANCHOR39] + ldr w1, [x19, #:lo12:.LANCHOR38] mov w0, 19539 movk w0, 0x4654, lsl 16 cmp w1, w0 - bne .L1404 - add x20, x20, :lo12:.LANCHOR139 - adrp x0, .LANCHOR10 + bne .L1403 + add x20, x20, :lo12:.LANCHOR138 + adrp x0, .LANCHOR9 ldrh w1, [x22, 8] ldrb w2, [x22, 10] - ldrh w0, [x0, #:lo12:.LANCHOR10] + ldrh w0, [x0, #:lo12:.LANCHOR9] strh w1, [x20, 6] cmp w2, w0 - bne .L1404 - adrp x0, .LANCHOR179 - adrp x2, .LANCHOR152 - adrp x3, .LANCHOR3 - str w1, [x0, #:lo12:.LANCHOR179] - adrp x0, .LANCHOR19 - ldrh w3, [x3, #:lo12:.LANCHOR3] - ldrh w0, [x0, #:lo12:.LANCHOR19] + bne .L1403 + adrp x0, .LANCHOR178 + adrp x2, .LANCHOR151 + adrp x3, .LANCHOR2 + str w1, [x0, #:lo12:.LANCHOR178] + adrp x0, .LANCHOR18 + ldrh w3, [x3, #:lo12:.LANCHOR2] + ldrh w0, [x0, #:lo12:.LANCHOR18] mul w0, w0, w1 - str w0, [x2, #:lo12:.LANCHOR152] - adrp x2, .LANCHOR12 - ldrh w2, [x2, #:lo12:.LANCHOR12] + str w0, [x2, #:lo12:.LANCHOR151] + adrp x2, .LANCHOR11 + ldrh w2, [x2, #:lo12:.LANCHOR11] mul w0, w2, w0 - adrp x2, .LANCHOR34 - str w0, [x2, #:lo12:.LANCHOR34] - adrp x0, .LANCHOR7 - ldr w2, [x0, #:lo12:.LANCHOR7] - adrp x0, .LANCHOR37+6 - ldrh w0, [x0, #:lo12:.LANCHOR37+6] + adrp x2, .LANCHOR33 + str w0, [x2, #:lo12:.LANCHOR33] + adrp x0, .LANCHOR6 + ldr w2, [x0, #:lo12:.LANCHOR6] + adrp x0, .LANCHOR36+6 + ldrh w0, [x0, #:lo12:.LANCHOR36+6] cmp w1, w2 sub w0, w2, w0 sub w0, w0, w1 udiv w0, w0, w3 - adrp x3, .LANCHOR171 - strh w0, [x3, #:lo12:.LANCHOR171] - bls .L1405 - adrp x1, .LANCHOR178 + adrp x3, .LANCHOR170 + strh w0, [x3, #:lo12:.LANCHOR170] + bls .L1404 + adrp x1, .LANCHOR177 adrp x0, .LC1 - mov w2, 1489 - add x1, x1, :lo12:.LANCHOR178 + mov w2, 1491 + add x1, x1, :lo12:.LANCHOR177 add x0, x0, :lo12:.LC1 bl printf -.L1405: - add x4, x19, :lo12:.LANCHOR39 - adrp x0, .LANCHOR51 - add x2, x0, :lo12:.LANCHOR51 - adrp x5, .LANCHOR145 - adrp x20, .LANCHOR52 +.L1404: + add x4, x19, :lo12:.LANCHOR38 + adrp x0, .LANCHOR50 + add x2, x0, :lo12:.LANCHOR50 + adrp x5, .LANCHOR144 + adrp x20, .LANCHOR51 mov x22, x5 ldrh w1, [x4, 16] ldrh w6, [x4, 14] - strh w6, [x0, #:lo12:.LANCHOR51] + strh w6, [x0, #:lo12:.LANCHOR50] lsr w3, w1, 6 and w1, w1, 63 strb w1, [x2, 6] ldrb w1, [x4, 11] strb w1, [x2, 8] - add x1, x5, :lo12:.LANCHOR145 + add x1, x5, :lo12:.LANCHOR144 strh w3, [x2, 2] mov w2, -1 - strh w2, [x5, #:lo12:.LANCHOR145] - add x2, x20, :lo12:.LANCHOR52 + strh w2, [x5, #:lo12:.LANCHOR144] + add x2, x20, :lo12:.LANCHOR51 strh wzr, [x1, 2] strb wzr, [x1, 6] strb wzr, [x1, 8] ldrh w1, [x4, 18] - strh w1, [x20, #:lo12:.LANCHOR52] + strh w1, [x20, #:lo12:.LANCHOR51] ldrh w1, [x4, 20] lsr w3, w1, 6 and w1, w1, 63 @@ -10301,10 +10224,10 @@ FtlLoadSysInfo: ldrb w1, [x4, 12] strh w3, [x2, 2] strb w1, [x2, 8] - adrp x2, .LANCHOR53 + adrp x2, .LANCHOR52 ldrh w1, [x4, 22] - add x3, x2, :lo12:.LANCHOR53 - strh w1, [x2, #:lo12:.LANCHOR53] + add x3, x2, :lo12:.LANCHOR52 + strh w1, [x2, #:lo12:.LANCHOR52] mov x21, x2 ldrh w1, [x4, 24] lsr w7, w1, 6 @@ -10312,92 +10235,92 @@ FtlLoadSysInfo: strb w1, [x3, 6] ldrb w1, [x4, 13] strb w1, [x3, 8] - adrp x1, .LANCHOR84 + adrp x1, .LANCHOR83 strh w7, [x3, 2] ldr w3, [x4, 32] + str wzr, [x1, #:lo12:.LANCHOR83] + adrp x1, .LANCHOR84 str wzr, [x1, #:lo12:.LANCHOR84] - adrp x1, .LANCHOR85 - str wzr, [x1, #:lo12:.LANCHOR85] - adrp x1, .LANCHOR89 - str wzr, [x1, #:lo12:.LANCHOR89] adrp x1, .LANCHOR88 str wzr, [x1, #:lo12:.LANCHOR88] + adrp x1, .LANCHOR87 + str wzr, [x1, #:lo12:.LANCHOR87] + adrp x1, .LANCHOR89 + str w3, [x1, #:lo12:.LANCHOR89] adrp x1, .LANCHOR90 - str w3, [x1, #:lo12:.LANCHOR90] + str wzr, [x1, #:lo12:.LANCHOR90] adrp x1, .LANCHOR91 str wzr, [x1, #:lo12:.LANCHOR91] - adrp x1, .LANCHOR92 - str wzr, [x1, #:lo12:.LANCHOR92] - adrp x1, .LANCHOR87 + adrp x1, .LANCHOR86 ldr w3, [x4, 40] - str wzr, [x1, #:lo12:.LANCHOR87] - adrp x1, .LANCHOR82 - ldr w4, [x1, #:lo12:.LANCHOR82] + str wzr, [x1, #:lo12:.LANCHOR86] + adrp x1, .LANCHOR81 + ldr w4, [x1, #:lo12:.LANCHOR81] cmp w3, w4 - bls .L1406 - str w3, [x1, #:lo12:.LANCHOR82] -.L1406: - add x19, x19, :lo12:.LANCHOR39 - adrp x1, .LANCHOR83 - ldr w3, [x1, #:lo12:.LANCHOR83] + bls .L1405 + str w3, [x1, #:lo12:.LANCHOR81] +.L1405: + add x19, x19, :lo12:.LANCHOR38 + adrp x1, .LANCHOR82 + ldr w3, [x1, #:lo12:.LANCHOR82] ldr w2, [x19, 36] cmp w2, w3 - bls .L1407 - str w2, [x1, #:lo12:.LANCHOR83] -.L1407: + bls .L1406 + str w2, [x1, #:lo12:.LANCHOR82] +.L1406: mov w1, 65535 cmp w6, w1 + beq .L1407 + add x0, x0, :lo12:.LANCHOR50 + bl make_superblock +.L1407: + ldrh w2, [x20, #:lo12:.LANCHOR51] + mov w1, 65535 + add x0, x20, :lo12:.LANCHOR51 + cmp w2, w1 beq .L1408 - add x0, x0, :lo12:.LANCHOR51 bl make_superblock .L1408: - ldrh w2, [x20, #:lo12:.LANCHOR52] + ldrh w2, [x21, #:lo12:.LANCHOR52] mov w1, 65535 - add x0, x20, :lo12:.LANCHOR52 + add x0, x21, :lo12:.LANCHOR52 cmp w2, w1 beq .L1409 bl make_superblock .L1409: - ldrh w2, [x21, #:lo12:.LANCHOR53] + ldrh w2, [x22, #:lo12:.LANCHOR144] mov w1, 65535 - add x0, x21, :lo12:.LANCHOR53 + add x0, x22, :lo12:.LANCHOR144 cmp w2, w1 beq .L1410 bl make_superblock .L1410: - ldrh w2, [x22, #:lo12:.LANCHOR145] - mov w1, 65535 - add x0, x22, :lo12:.LANCHOR145 - cmp w2, w1 - beq .L1411 - bl make_superblock -.L1411: mov w0, 0 - b .L1392 -.L1401: - add x3, x19, :lo12:.LANCHOR138 + b .L1391 +.L1400: + add x3, x19, :lo12:.LANCHOR137 orr w0, w28, w24, lsl 10 mov w2, 1 str x3, [x29, 104] mov w1, w2 str w0, [x3, 4] - ldr x0, [x22, #:lo12:.LANCHOR106] + ldr x0, [x22, #:lo12:.LANCHOR105] str x0, [x3, 8] mov x0, x3 bl FlashReadPages ldr x3, [x29, 104] ldr x0, [x3, 16] ldr w8, [x0, 12] - cbz w8, .L1396 - ldr w0, [x19, #:lo12:.LANCHOR138] + cbz w8, .L1395 + ldr w0, [x19, #:lo12:.LANCHOR137] cmn w0, #1 - beq .L1396 + beq .L1395 ldrh w1, [x26] ldr x0, [x3, 8] bl js_hash cmp w8, w0 - beq .L1396 - add x10, x20, :lo12:.LANCHOR139 + beq .L1395 + add x10, x20, :lo12:.LANCHOR138 mov w6, w0 mov w5, w8 adrp x0, .LC46 @@ -10408,39 +10331,39 @@ FtlLoadSysInfo: add x0, x0, :lo12:.LC46 str x10, [x29, 104] bl printf - cbnz w28, .L1397 + cbnz w28, .L1396 ldr x10, [x29, 104] ldrh w0, [x10, 4] cmp w24, w0 - beq .L1397 + beq .L1396 sxth w24, w0 - adrp x0, .LANCHOR20 - ldrh w7, [x0, #:lo12:.LANCHOR20] + adrp x0, .LANCHOR19 + ldrh w7, [x0, #:lo12:.LANCHOR19] sub w7, w7, #1 -.L1423: +.L1422: sxth w28, w7 - b .L1395 -.L1397: - mov w0, -1 - str w0, [x19, #:lo12:.LANCHOR138] + b .L1394 .L1396: - ldr w0, [x19, #:lo12:.LANCHOR138] + mov w0, -1 + str w0, [x19, #:lo12:.LANCHOR137] +.L1395: + ldr w0, [x19, #:lo12:.LANCHOR137] cmn w0, #1 - beq .L1399 - ldr x0, [x22, #:lo12:.LANCHOR106] + beq .L1398 + ldr x0, [x22, #:lo12:.LANCHOR105] mov w1, 19539 movk w1, 0x4654, lsl 16 ldr w0, [x0] cmp w0, w1 - bne .L1399 - ldr x0, [x25, #:lo12:.LANCHOR114] + bne .L1398 + ldr x0, [x25, #:lo12:.LANCHOR113] ldrh w1, [x0] mov w0, 61604 cmp w1, w0 - beq .L1400 -.L1399: + beq .L1399 +.L1398: sub w7, w28, #1 - b .L1423 + b .L1422 .size FtlLoadSysInfo, .-FtlLoadSysInfo .section .text.FtlMapTblRecovery,"ax",@progbits .align 2 @@ -10455,7 +10378,7 @@ FtlMapTblRecovery: stp x25, x26, [sp, 64] mov w20, 0 ldrh w25, [x0, 6] - adrp x26, .LANCHOR20 + adrp x26, .LANCHOR19 stp x23, x24, [sp, 48] ldr x23, [x0, 40] ldr x24, [x0, 16] @@ -10464,21 +10387,21 @@ FtlMapTblRecovery: str x0, [x29, 144] ldrh w0, [x19, 8] stp x21, x22, [sp, 32] - adrp x22, .LANCHOR106 + adrp x22, .LANCHOR105 stp x27, x28, [sp, 80] str w0, [x29, 152] mov x0, x23 bl ftl_memset stp wzr, wzr, [x19, 48] - adrp x0, .LANCHOR138 - add x6, x0, :lo12:.LANCHOR138 - ldr x1, [x22, #:lo12:.LANCHOR106] + adrp x0, .LANCHOR137 + add x6, x0, :lo12:.LANCHOR137 + ldr x1, [x22, #:lo12:.LANCHOR105] mov x27, x6 str x0, [x29, 128] str x1, [x6, 8] - adrp x1, .LANCHOR114 + adrp x1, .LANCHOR113 ldr w0, [x29, 152] - ldr x21, [x1, #:lo12:.LANCHOR114] + ldr x21, [x1, #:lo12:.LANCHOR113] mov w1, -1 str x21, [x6, 16] sub w0, w0, #1 @@ -10486,22 +10409,22 @@ FtlMapTblRecovery: strh w1, [x19, 2] mov w1, 1 str w0, [x29, 108] - add x0, x26, :lo12:.LANCHOR20 + add x0, x26, :lo12:.LANCHOR19 str w1, [x19, 56] str x0, [x29, 96] -.L1425: +.L1424: ldr w0, [x29, 152] cmp w20, w0 - bge .L1444 + bge .L1443 ldr w0, [x29, 108] sxtw x28, w20 cmp w20, w0 - bne .L1426 + bne .L1425 lsl x0, x28, 1 mov w1, 1 add x26, x24, x0 - adrp x27, .LANCHOR23 - add x27, x27, :lo12:.LANCHOR23 + adrp x27, .LANCHOR22 + add x27, x27, :lo12:.LANCHOR22 ldrh w0, [x24, x0] mov w24, 0 bl FtlGetLastWrittenPage @@ -10512,26 +10435,26 @@ FtlMapTblRecovery: strh w20, [x19] str w1, [x29, 152] ldr w0, [x0, x28, lsl 2] - adrp x28, .LANCHOR180 + adrp x28, .LANCHOR179 str w0, [x19, 48] - add x28, x28, :lo12:.LANCHOR180 + add x28, x28, :lo12:.LANCHOR179 ldr x0, [x29, 128] - add x22, x0, :lo12:.LANCHOR138 -.L1427: + add x22, x0, :lo12:.LANCHOR137 +.L1426: ldr w0, [x29, 152] cmp w24, w0 - ble .L1430 -.L1444: + ble .L1429 +.L1443: mov x0, x19 bl ftl_free_no_use_map_blk - adrp x0, .LANCHOR20 + adrp x0, .LANCHOR19 ldrh w1, [x19, 2] - ldrh w0, [x0, #:lo12:.LANCHOR20] + ldrh w0, [x0, #:lo12:.LANCHOR19] cmp w1, w0 - bne .L1432 + bne .L1431 mov x0, x19 bl ftl_map_blk_alloc_new_blk -.L1432: +.L1431: mov x0, x19 bl ftl_map_blk_gc mov x0, x19 @@ -10544,7 +10467,7 @@ FtlMapTblRecovery: ldp x27, x28, [sp, 80] ldp x29, x30, [sp], 160 ret -.L1430: +.L1429: ldrh w0, [x26] mov w2, 1 mov w1, w2 @@ -10556,16 +10479,16 @@ FtlMapTblRecovery: ldr w0, [x0, 12] str w0, [x29, 156] uxtw x0, w0 - cbz w0, .L1428 + cbz w0, .L1427 ldr w0, [x22] cmn w0, #1 - beq .L1428 + beq .L1427 ldrh w1, [x27] ldr x0, [x22, 8] bl js_hash ldr w1, [x29, 156] cmp w1, w0 - beq .L1428 + beq .L1427 mov w5, w0 mov x4, x1 mov w3, w24 @@ -10576,30 +10499,30 @@ FtlMapTblRecovery: bl printf mov w0, -1 str w0, [x22] -.L1428: +.L1427: ldr w0, [x22] cmn w0, #1 - beq .L1429 + beq .L1428 ldrh w0, [x21, 8] cmp w25, w0 - bls .L1429 + bls .L1428 ldrh w2, [x21] ldrh w1, [x19, 4] cmp w2, w1 - bne .L1429 + bne .L1428 ubfiz x0, x0, 2, 16 ldr w1, [x22, 4] str w1, [x23, x0] -.L1429: +.L1428: add w6, w24, 1 sxth w24, w6 - b .L1427 -.L1426: + b .L1426 +.L1425: lsl x2, x28, 1 - ldr x0, [x22, #:lo12:.LANCHOR106] + ldr x0, [x22, #:lo12:.LANCHOR105] str x0, [x27, 8] add x0, x24, x2 - ldrh w1, [x26, #:lo12:.LANCHOR20] + ldrh w1, [x26, #:lo12:.LANCHOR19] str x0, [x29, 136] ldrh w0, [x24, x2] sub w1, w1, #1 @@ -10611,28 +10534,28 @@ FtlMapTblRecovery: bl FlashReadPages ldr w0, [x27] cmn w0, #1 - beq .L1446 + beq .L1445 ldrh w1, [x21] ldrh w0, [x19, 4] cmp w1, w0 - bne .L1446 + bne .L1445 ldrh w1, [x21, 8] mov w0, 64245 cmp w1, w0 - beq .L1434 -.L1446: - adrp x0, .LANCHOR23 - add x0, x0, :lo12:.LANCHOR23 + beq .L1433 +.L1445: + adrp x0, .LANCHOR22 + add x0, x0, :lo12:.LANCHOR22 mov w28, 0 str x0, [x29, 120] - adrp x0, .LANCHOR180 - add x0, x0, :lo12:.LANCHOR180 + adrp x0, .LANCHOR179 + add x0, x0, :lo12:.LANCHOR179 str x0, [x29, 112] -.L1435: +.L1434: ldr x0, [x29, 96] ldrh w0, [x0] cmp w28, w0 - bge .L1442 + bge .L1441 ldr x0, [x29, 136] mov w2, 1 mov w1, w2 @@ -10645,17 +10568,17 @@ FtlMapTblRecovery: ldr w0, [x0, 12] str w0, [x29, 156] uxtw x0, w0 - cbz w0, .L1439 + cbz w0, .L1438 ldr w0, [x27] cmn w0, #1 - beq .L1439 + beq .L1438 ldr x0, [x29, 120] ldrh w1, [x0] ldr x0, [x27, 8] bl js_hash ldr w1, [x29, 156] cmp w1, w0 - beq .L1439 + beq .L1438 mov x4, x1 ldr x1, [x29, 112] mov w5, w0 @@ -10666,51 +10589,51 @@ FtlMapTblRecovery: bl printf mov w0, -1 str w0, [x27] -.L1439: +.L1438: ldr w0, [x27] cmn w0, #1 - beq .L1440 + beq .L1439 ldrh w0, [x21, 8] cmp w25, w0 - bls .L1440 + bls .L1439 ldrh w2, [x21] ldrh w1, [x19, 4] cmp w2, w1 - bne .L1440 + bne .L1439 ubfiz x0, x0, 2, 16 ldr w1, [x27, 4] str w1, [x23, x0] -.L1440: +.L1439: add w7, w28, 1 sxth w28, w7 - b .L1435 -.L1434: - ldrh w3, [x26, #:lo12:.LANCHOR20] + b .L1434 +.L1433: + ldrh w3, [x26, #:lo12:.LANCHOR19] mov w0, 0 - ldr x4, [x22, #:lo12:.LANCHOR106] + ldr x4, [x22, #:lo12:.LANCHOR105] sub w3, w3, #1 -.L1436: +.L1435: cmp w0, w3 - blt .L1438 -.L1442: + blt .L1437 +.L1441: add w20, w20, 1 sxth w20, w20 - b .L1425 -.L1438: + b .L1424 +.L1437: lsl w2, w0, 1 sxtw x2, w2 lsl x1, x2, 2 ldrh w1, [x4, x1] cmp w25, w1 - bls .L1437 + bls .L1436 add x2, x2, 1 ubfiz x1, x1, 2, 16 ldr w2, [x4, x2, lsl 2] str w2, [x23, x1] -.L1437: +.L1436: add w0, w0, 1 sxth w0, w0 - b .L1436 + b .L1435 .size FtlMapTblRecovery, .-FtlMapTblRecovery .section .text.FtlLoadVonderInfo,"ax",@progbits .align 2 @@ -10718,31 +10641,31 @@ FtlMapTblRecovery: .type FtlLoadVonderInfo, %function FtlLoadVonderInfo: stp x29, x30, [sp, -16]! - adrp x1, .LANCHOR27 - adrp x0, .LANCHOR161 - add x0, x0, :lo12:.LANCHOR161 + adrp x1, .LANCHOR26 + adrp x0, .LANCHOR160 + add x0, x0, :lo12:.LANCHOR160 add x29, sp, 0 - ldrh w1, [x1, #:lo12:.LANCHOR27] + ldrh w1, [x1, #:lo12:.LANCHOR26] strh w1, [x0, 10] mov w1, -3962 strh w1, [x0, 4] - adrp x1, .LANCHOR35 - ldrh w1, [x1, #:lo12:.LANCHOR35] + adrp x1, .LANCHOR34 + ldrh w1, [x1, #:lo12:.LANCHOR34] strh w1, [x0, 8] - adrp x1, .LANCHOR28 - ldrh w1, [x1, #:lo12:.LANCHOR28] + adrp x1, .LANCHOR27 + ldrh w1, [x1, #:lo12:.LANCHOR27] strh w1, [x0, 6] - adrp x1, .LANCHOR36 - ldr x1, [x1, #:lo12:.LANCHOR36] + adrp x1, .LANCHOR35 + ldr x1, [x1, #:lo12:.LANCHOR35] str x1, [x0, 16] - adrp x1, .LANCHOR122 - ldr x1, [x1, #:lo12:.LANCHOR122] - str x1, [x0, 24] adrp x1, .LANCHOR121 ldr x1, [x1, #:lo12:.LANCHOR121] + str x1, [x0, 24] + adrp x1, .LANCHOR120 + ldr x1, [x1, #:lo12:.LANCHOR120] str x1, [x0, 32] - adrp x1, .LANCHOR123 - ldr x1, [x1, #:lo12:.LANCHOR123] + adrp x1, .LANCHOR122 + ldr x1, [x1, #:lo12:.LANCHOR122] str x1, [x0, 40] bl FtlMapTblRecovery mov w0, 0 @@ -10757,8 +10680,8 @@ FtlLoadMapInfo: stp x29, x30, [sp, -16]! add x29, sp, 0 bl FtlL2PDataInit - adrp x0, .LANCHOR129 - add x0, x0, :lo12:.LANCHOR129 + adrp x0, .LANCHOR128 + add x0, x0, :lo12:.LANCHOR128 bl FtlMapTblRecovery mov w0, 0 ldp x29, x30, [sp], 16 @@ -10770,34 +10693,34 @@ FtlLoadMapInfo: .type FtlSysBlkInit, %function FtlSysBlkInit: stp x29, x30, [sp, -64]! - adrp x0, .LANCHOR4 + adrp x0, .LANCHOR3 add x29, sp, 0 - ldrh w0, [x0, #:lo12:.LANCHOR4] + ldrh w0, [x0, #:lo12:.LANCHOR3] stp x19, x20, [sp, 16] - adrp x19, .LANCHOR156 + adrp x19, .LANCHOR155 stp x21, x22, [sp, 32] - strh wzr, [x19, #:lo12:.LANCHOR156] + strh wzr, [x19, #:lo12:.LANCHOR155] str x23, [sp, 48] bl FtlFreeSysBlkQueueInit bl FtlScanSysBlk - adrp x0, .LANCHOR139 - ldrh w1, [x0, #:lo12:.LANCHOR139] + adrp x0, .LANCHOR138 + ldrh w1, [x0, #:lo12:.LANCHOR138] mov w0, 65535 cmp w1, w0 - bne .L1471 -.L1473: + bne .L1470 +.L1472: mov w21, -1 -.L1470: +.L1469: mov w0, w21 ldr x23, [sp, 48] ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] ldp x29, x30, [sp], 64 ret -.L1471: +.L1470: bl FtlLoadSysInfo mov w21, w0 - cbnz w0, .L1473 + cbnz w0, .L1472 bl FtlLoadMapInfo bl FtlLoadVonderInfo bl Ftl_load_ext_data @@ -10807,46 +10730,46 @@ FtlSysBlkInit: bl FtlPowerLostRecovery mov w0, 1 bl FtlUpdateVaildLpn - adrp x0, .LANCHOR33 - ldrh w2, [x0, #:lo12:.LANCHOR33] - adrp x0, .LANCHOR55 - ldr x1, [x0, #:lo12:.LANCHOR55] + adrp x0, .LANCHOR32 + ldrh w2, [x0, #:lo12:.LANCHOR32] + adrp x0, .LANCHOR54 + ldr x1, [x0, #:lo12:.LANCHOR54] mov w0, 0 add x1, x1, 4 -.L1474: +.L1473: cmp w0, w2 - bge .L1479 + bge .L1478 ldr w3, [x1], 16 - tbz w3, #31, .L1475 -.L1479: - adrp x3, .LANCHOR83 + tbz w3, #31, .L1474 +.L1478: + adrp x3, .LANCHOR82 cmp w0, w2 - ldr w1, [x3, #:lo12:.LANCHOR83] + ldr w1, [x3, #:lo12:.LANCHOR82] add w1, w1, 32 - str w1, [x3, #:lo12:.LANCHOR83] - bge .L1481 -.L1476: - adrp x23, .LANCHOR51 - add x20, x23, :lo12:.LANCHOR51 + str w1, [x3, #:lo12:.LANCHOR82] + bge .L1480 +.L1475: + adrp x23, .LANCHOR50 + add x20, x23, :lo12:.LANCHOR50 mov x0, x20 - adrp x22, .LANCHOR52 + adrp x22, .LANCHOR51 bl FtlSuperblockPowerLostFix - add x19, x22, :lo12:.LANCHOR52 + add x19, x22, :lo12:.LANCHOR51 mov x0, x19 bl FtlSuperblockPowerLostFix - adrp x0, .LANCHOR42 + adrp x0, .LANCHOR41 ldrh w3, [x20, 4] - ldr x1, [x0, #:lo12:.LANCHOR42] - ldrh w0, [x23, #:lo12:.LANCHOR51] + ldr x1, [x0, #:lo12:.LANCHOR41] + ldrh w0, [x23, #:lo12:.LANCHOR50] lsl x0, x0, 1 ldrh w2, [x1, x0] sub w2, w2, w3 - adrp x3, .LANCHOR19 + adrp x3, .LANCHOR18 strh w2, [x1, x0] strb wzr, [x20, 6] - ldrh w0, [x3, #:lo12:.LANCHOR19] + ldrh w0, [x3, #:lo12:.LANCHOR18] strh w0, [x20, 2] - ldrh w0, [x22, #:lo12:.LANCHOR52] + ldrh w0, [x22, #:lo12:.LANCHOR51] strh wzr, [x20, 4] ldrh w4, [x19, 4] lsl x0, x0, 1 @@ -10854,27 +10777,27 @@ FtlSysBlkInit: sub w2, w2, w4 strh w2, [x1, x0] strb wzr, [x19, 6] - ldrh w0, [x3, #:lo12:.LANCHOR19] + ldrh w0, [x3, #:lo12:.LANCHOR18] strh w0, [x19, 2] - adrp x0, .LANCHOR39 - add x0, x0, :lo12:.LANCHOR39 + adrp x0, .LANCHOR38 + add x0, x0, :lo12:.LANCHOR38 strh wzr, [x19, 4] ldrh w1, [x0, 30] add w1, w1, 1 strh w1, [x0, 30] bl l2p_flush bl FtlVpcTblFlush -.L1483: +.L1482: bl FtlVpcTblFlush - b .L1470 -.L1475: + b .L1469 +.L1474: add w0, w0, 1 - b .L1474 -.L1481: - ldrh w0, [x19, #:lo12:.LANCHOR156] - cbnz w0, .L1476 + b .L1473 +.L1480: + ldrh w0, [x19, #:lo12:.LANCHOR155] + cbnz w0, .L1475 bl l2p_flush - b .L1483 + b .L1482 .size FtlSysBlkInit, .-FtlSysBlkInit .section .text.ftl_low_format,"ax",@progbits .align 2 @@ -10882,154 +10805,150 @@ FtlSysBlkInit: .type ftl_low_format, %function ftl_low_format: stp x29, x30, [sp, -80]! - adrp x0, .LANCHOR83 + adrp x0, .LANCHOR82 add x29, sp, 0 stp x23, x24, [sp, 48] - adrp x24, .LANCHOR4 - str wzr, [x0, #:lo12:.LANCHOR83] - adrp x0, .LANCHOR143 + adrp x23, .LANCHOR3 + str wzr, [x0, #:lo12:.LANCHOR82] + adrp x0, .LANCHOR142 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR82 - str wzr, [x0, #:lo12:.LANCHOR143] - ldrh w0, [x24, #:lo12:.LANCHOR4] + adrp x20, .LANCHOR81 + str wzr, [x0, #:lo12:.LANCHOR142] + ldrh w0, [x23, #:lo12:.LANCHOR3] stp x21, x22, [sp, 32] stp x25, x26, [sp, 64] - str wzr, [x20, #:lo12:.LANCHOR82] + str wzr, [x20, #:lo12:.LANCHOR81] bl FtlFreeSysBlkQueueInit bl FtlLoadBbt - cbz w0, .L1485 + cbz w0, .L1484 bl FtlMakeBbt -.L1485: - adrp x23, .LANCHOR12 - adrp x0, .LANCHOR109 +.L1484: + adrp x22, .LANCHOR11 + adrp x0, .LANCHOR108 mov w6, 23752 - ldrh w1, [x23, #:lo12:.LANCHOR12] + ldrh w1, [x22, #:lo12:.LANCHOR11] movk w6, 0xa0f, lsl 16 - ldr x4, [x0, #:lo12:.LANCHOR109] - adrp x0, .LANCHOR110 + ldr x4, [x0, #:lo12:.LANCHOR108] + adrp x0, .LANCHOR109 lsl w1, w1, 7 - ldr x5, [x0, #:lo12:.LANCHOR110] + ldr x5, [x0, #:lo12:.LANCHOR109] mov w0, 0 -.L1486: +.L1485: cmp w0, w1 - blt .L1487 + blt .L1486 + adrp x24, .LANCHOR4 adrp x21, .LANCHOR5 - adrp x22, .LANCHOR6 - add x26, x22, :lo12:.LANCHOR6 - mov w19, 0 - ldrh w25, [x21, #:lo12:.LANCHOR5] -.L1488: - ldrh w0, [x26] - cmp w0, w25 - bhi .L1489 - adrp x25, .LANCHOR3 - sub w1, w19, #2 - ldrh w0, [x25, #:lo12:.LANCHOR3] - cmp w1, w0, lsl 1 - bgt .L1490 -.L1494: add x26, x21, :lo12:.LANCHOR5 mov w19, 0 - mov w24, 0 -.L1491: + ldrh w25, [x24, #:lo12:.LANCHOR4] +.L1487: ldrh w0, [x26] - cmp w0, w24 - bhi .L1495 - adrp x0, .LANCHOR99 - ldrh w1, [x22, #:lo12:.LANCHOR6] - ldrh w4, [x25, #:lo12:.LANCHOR3] - adrp x2, .LANCHOR171 - str w1, [x0, #:lo12:.LANCHOR99] - adrp x0, .LANCHOR7 - adrp x3, .LANCHOR152 - ldr w1, [x0, #:lo12:.LANCHOR7] + cmp w0, w25 + bhi .L1488 + adrp x25, .LANCHOR2 + sub w1, w19, #2 + ldrh w0, [x25, #:lo12:.LANCHOR2] + cmp w1, w0, lsl 1 + bgt .L1489 +.L1493: + add x24, x24, :lo12:.LANCHOR4 + mov w19, 0 + mov w23, 0 +.L1490: + ldrh w0, [x24] + cmp w0, w23 + bhi .L1494 + adrp x0, .LANCHOR98 + ldrh w1, [x21, #:lo12:.LANCHOR5] + ldrh w4, [x25, #:lo12:.LANCHOR2] + adrp x2, .LANCHOR170 + str w1, [x0, #:lo12:.LANCHOR98] + adrp x0, .LANCHOR6 + adrp x3, .LANCHOR151 + ldr w1, [x0, #:lo12:.LANCHOR6] udiv w5, w1, w4 ubfx x0, x5, 5, 16 - str w5, [x3, #:lo12:.LANCHOR152] + str w5, [x3, #:lo12:.LANCHOR151] add w6, w0, 36 - strh w6, [x2, #:lo12:.LANCHOR171] + strh w6, [x2, #:lo12:.LANCHOR170] mov w6, 24 mul w6, w4, w6 cmp w19, w6 - ble .L1496 + ble .L1495 sub w1, w1, w19 udiv w1, w1, w4 - str w1, [x3, #:lo12:.LANCHOR152] + str w1, [x3, #:lo12:.LANCHOR151] lsr w1, w1, 5 add w1, w1, 24 - strh w1, [x2, #:lo12:.LANCHOR171] -.L1496: - adrp x1, .LANCHOR15 - ldrh w1, [x1, #:lo12:.LANCHOR15] - cbz w1, .L1498 - ldrh w6, [x2, #:lo12:.LANCHOR171] + strh w1, [x2, #:lo12:.LANCHOR170] +.L1495: + adrp x1, .LANCHOR14 + ldrh w1, [x1, #:lo12:.LANCHOR14] + cbz w1, .L1497 + ldrh w6, [x2, #:lo12:.LANCHOR170] add w6, w6, w1, lsr 1 - strh w6, [x2, #:lo12:.LANCHOR171] + strh w6, [x2, #:lo12:.LANCHOR170] mul w6, w1, w4 cmp w19, w6 - bge .L1498 + bge .L1497 add w1, w1, 32 - str w5, [x3, #:lo12:.LANCHOR152] + str w5, [x3, #:lo12:.LANCHOR151] add w1, w0, w1 - strh w1, [x2, #:lo12:.LANCHOR171] -.L1498: - ldrh w1, [x2, #:lo12:.LANCHOR171] - adrp x25, .LANCHOR179 - ldr w0, [x3, #:lo12:.LANCHOR152] - adrp x24, .LANCHOR42 + strh w1, [x2, #:lo12:.LANCHOR170] +.L1497: + ldrh w1, [x2, #:lo12:.LANCHOR170] + adrp x23, .LANCHOR178 + ldr w0, [x3, #:lo12:.LANCHOR151] sub w0, w0, w1 - adrp x1, .LANCHOR19 - ldrh w1, [x1, #:lo12:.LANCHOR19] + adrp x1, .LANCHOR18 + ldrh w1, [x1, #:lo12:.LANCHOR18] mul w0, w0, w4 - str w0, [x25, #:lo12:.LANCHOR179] + str w0, [x23, #:lo12:.LANCHOR178] mul w0, w1, w0 - ldrh w1, [x23, #:lo12:.LANCHOR12] - str w0, [x3, #:lo12:.LANCHOR152] - mov w23, -1 + ldrh w1, [x22, #:lo12:.LANCHOR11] + str w0, [x3, #:lo12:.LANCHOR151] + mov x22, x23 mul w0, w1, w0 - adrp x1, .LANCHOR34 - str w0, [x1, #:lo12:.LANCHOR34] + adrp x1, .LANCHOR33 + str w0, [x1, #:lo12:.LANCHOR33] bl FtlBbmTblFlush - ldr x0, [x24, #:lo12:.LANCHOR42] + ldrh w2, [x21, #:lo12:.LANCHOR5] + adrp x21, .LANCHOR41 mov w1, 0 - ldrh w2, [x22, #:lo12:.LANCHOR6] + ldr x0, [x21, #:lo12:.LANCHOR41] lsl w2, w2, 1 bl ftl_memset - adrp x0, .LANCHOR59 - adrp x1, .LANCHOR145 - ldrh w2, [x21, #:lo12:.LANCHOR5] - str wzr, [x0, #:lo12:.LANCHOR59] - add x0, x1, :lo12:.LANCHOR145 - strh w23, [x1, #:lo12:.LANCHOR145] - mov w1, 255 - lsr w2, w2, 3 - strh wzr, [x0, 2] - strb wzr, [x0, 6] - strb wzr, [x0, 8] - adrp x0, .LANCHOR51 - add x19, x0, :lo12:.LANCHOR51 - strh wzr, [x0, #:lo12:.LANCHOR51] - mov w0, 1 - strb w0, [x19, 8] - adrp x0, .LANCHOR1 + adrp x2, .LANCHOR144 + add x1, x2, :lo12:.LANCHOR144 + adrp x0, .LANCHOR58 + strh wzr, [x1, 2] + strb wzr, [x1, 6] + strb wzr, [x1, 8] + adrp x1, .LANCHOR50 + add x19, x1, :lo12:.LANCHOR50 + str wzr, [x0, #:lo12:.LANCHOR58] + mov w0, -1 + mov w23, w0 + strh wzr, [x1, #:lo12:.LANCHOR50] + mov w1, 1 + strh w0, [x2, #:lo12:.LANCHOR144] strh wzr, [x19, 2] - ldr x0, [x0, #:lo12:.LANCHOR1] strb wzr, [x19, 6] - bl ftl_memset -.L1500: + strb w1, [x19, 8] +.L1499: mov x0, x19 bl make_superblock ldrb w1, [x19, 7] ldrh w0, [x19] - cbnz w1, .L1501 - ldr x1, [x24, #:lo12:.LANCHOR42] + cbnz w1, .L1500 + ldr x1, [x21, #:lo12:.LANCHOR41] ubfiz x0, x0, 1, 16 strh w23, [x1, x0] ldrh w0, [x19] add w0, w0, 1 strh w0, [x19] - b .L1500 -.L1487: + b .L1499 +.L1486: ubfiz x3, x0, 2, 16 mvn w2, w0 orr w2, w0, w2, lsl 16 @@ -11037,8 +10956,8 @@ ftl_low_format: and w0, w0, 65535 str w2, [x4, x3] str w6, [x5, x3] - b .L1486 -.L1489: + b .L1485 +.L1488: mov w0, w25 mov w1, 1 add w25, w25, 1 @@ -11046,100 +10965,100 @@ ftl_low_format: add w19, w19, w0 and w25, w25, 65535 and w19, w19, 65535 - b .L1488 -.L1490: + b .L1487 +.L1489: udiv w0, w19, w0 - adrp x1, .LANCHOR31 - ldr w19, [x1, #:lo12:.LANCHOR31] + adrp x1, .LANCHOR30 + ldr w19, [x1, #:lo12:.LANCHOR30] add w0, w0, w19 bl FtlSysBlkNumInit - ldrh w0, [x24, #:lo12:.LANCHOR4] - add x24, x22, :lo12:.LANCHOR6 + ldrh w0, [x23, #:lo12:.LANCHOR3] + add x23, x21, :lo12:.LANCHOR5 bl FtlFreeSysBlkQueueInit - ldrh w19, [x21, #:lo12:.LANCHOR5] -.L1492: - ldrh w0, [x24] + ldrh w19, [x24, #:lo12:.LANCHOR4] +.L1491: + ldrh w0, [x23] cmp w0, w19 - bls .L1494 + bls .L1493 mov w0, w19 add w19, w19, 1 mov w1, 1 and w19, w19, 65535 bl FtlLowFormatEraseBlock - b .L1492 -.L1495: - mov w0, w24 + b .L1491 +.L1494: + mov w0, w23 mov w1, 0 - add w24, w24, 1 + add w23, w23, 1 bl FtlLowFormatEraseBlock add w19, w19, w0 - and w24, w24, 65535 + and w23, w23, 65535 and w19, w19, 65535 - b .L1491 -.L1501: - ldr w1, [x20, #:lo12:.LANCHOR82] + b .L1490 +.L1500: + ldr w1, [x20, #:lo12:.LANCHOR81] ubfiz x0, x0, 1, 16 str w1, [x19, 12] mov w23, -1 add w1, w1, 1 - str w1, [x20, #:lo12:.LANCHOR82] - ldr x1, [x24, #:lo12:.LANCHOR42] + str w1, [x20, #:lo12:.LANCHOR81] + ldr x1, [x21, #:lo12:.LANCHOR41] ldrh w2, [x19, 4] strh w2, [x1, x0] - adrp x2, .LANCHOR52 - add x0, x2, :lo12:.LANCHOR52 + adrp x2, .LANCHOR51 + add x0, x2, :lo12:.LANCHOR51 ldrh w1, [x19] mov x19, x0 add w1, w1, 1 strh wzr, [x0, 2] - strh w1, [x2, #:lo12:.LANCHOR52] + strh w1, [x2, #:lo12:.LANCHOR51] mov w1, 1 strb wzr, [x0, 6] strb w1, [x0, 8] -.L1502: +.L1501: mov x0, x19 bl make_superblock ldrb w1, [x19, 7] ldrh w0, [x19] - cbnz w1, .L1503 - ldr x1, [x24, #:lo12:.LANCHOR42] + cbnz w1, .L1502 + ldr x1, [x21, #:lo12:.LANCHOR41] ubfiz x0, x0, 1, 16 strh w23, [x1, x0] ldrh w0, [x19] add w0, w0, 1 strh w0, [x19] - b .L1502 -.L1503: - ldr w1, [x20, #:lo12:.LANCHOR82] + b .L1501 +.L1502: + ldr w1, [x20, #:lo12:.LANCHOR81] ubfiz x0, x0, 1, 16 str w1, [x19, 12] add w1, w1, 1 - str w1, [x20, #:lo12:.LANCHOR82] - ldr x1, [x24, #:lo12:.LANCHOR42] + str w1, [x20, #:lo12:.LANCHOR81] + ldr x1, [x21, #:lo12:.LANCHOR41] ldrh w2, [x19, 4] mov w19, -1 strh w2, [x1, x0] - adrp x0, .LANCHOR53 - strh w19, [x0, #:lo12:.LANCHOR53] + adrp x0, .LANCHOR52 + strh w19, [x0, #:lo12:.LANCHOR52] bl FtlFreeSysBlkQueueOut - adrp x2, .LANCHOR139 - add x1, x2, :lo12:.LANCHOR139 - strh w0, [x2, #:lo12:.LANCHOR139] - ldr w0, [x25, #:lo12:.LANCHOR179] + adrp x2, .LANCHOR138 + add x1, x2, :lo12:.LANCHOR138 + strh w0, [x2, #:lo12:.LANCHOR138] + ldr w0, [x22, #:lo12:.LANCHOR178] strh w0, [x1, 6] - ldr w0, [x20, #:lo12:.LANCHOR82] + ldr w0, [x20, #:lo12:.LANCHOR81] str w0, [x1, 8] add w0, w0, 1 strh wzr, [x1, 2] strh w19, [x1, 4] - str w0, [x20, #:lo12:.LANCHOR82] + str w0, [x20, #:lo12:.LANCHOR81] bl FtlVpcTblFlush bl FtlSysBlkInit - cbnz w0, .L1504 - adrp x0, .LANCHOR166 + cbnz w0, .L1503 + adrp x0, .LANCHOR165 mov w1, 1 - str w1, [x0, #:lo12:.LANCHOR166] -.L1504: + str w1, [x0, #:lo12:.LANCHOR165] +.L1503: mov w0, 0 ldp x19, x20, [sp, 16] ldp x21, x22, [sp, 32] @@ -11159,10 +11078,10 @@ sftl_init: mov w0, -1 add x29, sp, 0 stp x19, x20, [sp, 16] - adrp x20, .LANCHOR166 - adrp x19, .LANCHOR181 - add x19, x19, :lo12:.LANCHOR181 - str w0, [x20, #:lo12:.LANCHOR166] + adrp x20, .LANCHOR165 + adrp x19, .LANCHOR180 + add x19, x19, :lo12:.LANCHOR180 + str w0, [x20, #:lo12:.LANCHOR165] adrp x0, .LC38 add x0, x0, :lo12:.LC38 bl printf @@ -11171,24 +11090,24 @@ sftl_init: bl FtlConstantsInit bl FtlMemInit bl FtlVariablesInit - adrp x0, .LANCHOR4 - ldrh w0, [x0, #:lo12:.LANCHOR4] + adrp x0, .LANCHOR3 + ldrh w0, [x0, #:lo12:.LANCHOR3] bl FtlFreeSysBlkQueueInit -.L1510: +.L1509: bl FtlLoadBbt - cbz w0, .L1511 -.L1521: + cbz w0, .L1510 +.L1520: ldr w0, [x19] cmp w0, 1 - bne .L1510 + bne .L1509 str wzr, [x19] bl ftl_low_format - b .L1510 -.L1511: + b .L1509 +.L1510: bl FtlSysBlkInit - cbnz w0, .L1521 + cbnz w0, .L1520 mov w1, 1 - str w1, [x20, #:lo12:.LANCHOR166] + str w1, [x20, #:lo12:.LANCHOR165] ldp x19, x20, [sp, 16] ldp x29, x30, [sp], 32 ret @@ -11200,107 +11119,142 @@ sftl_init: FtlWriteToIDB: stp x29, x30, [sp, -224]! add x29, sp, 0 - stp x23, x24, [sp, 48] - add w23, w1, w0 - stp x25, x26, [sp, 64] - sub w25, w23, #1 - stp x19, x20, [sp, 16] - cmp w25, 63 stp x21, x22, [sp, 32] - adrp x24, .LANCHOR182 + add w22, w1, w0 + stp x23, x24, [sp, 48] + sub w23, w22, #1 stp x27, x28, [sp, 80] - bls .L1523 + cmp w23, 63 + stp x19, x20, [sp, 16] + adrp x27, .LANCHOR181 + stp x25, x26, [sp, 64] + bls .L1522 mov w19, w0 cmp w0, 575 - bls .L1524 -.L1523: - ldr w0, [x24, #:lo12:.LANCHOR182] - cbnz w0, .L1525 -.L1590: + bls .L1523 +.L1522: + ldr w0, [x27, #:lo12:.LANCHOR181] + cbnz w0, .L1524 +.L1588: mov w19, 0 - b .L1522 -.L1525: - adrp x0, .LANCHOR183 - str x0, [x29, 120] + b .L1521 +.L1524: + adrp x0, .LANCHOR182 + str x0, [x29, 112] mov w1, 35899 - ldr x23, [x0, #:lo12:.LANCHOR183] + ldr x26, [x0, #:lo12:.LANCHOR182] movk w1, 0xfcdc, lsl 16 - ldr w2, [x23] + ldr w2, [x26] cmp w2, w1 - bne .L1527 - adrp x21, .LANCHOR0 - add x0, x21, :lo12:.LANCHOR0 - mov w19, 65535 + bne .L1526 + adrp x22, .LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 + add x1, x26, 258048 + mov w19, 65023 + add x1, x1, 2044 mov w3, 4097 - ldrh w1, [x0, 10] - mov x0, 262140 - add x2, x23, x0 + ldrh w2, [x0, 10] mov w0, 0 -.L1531: - ldr w4, [x2] - cbnz w4, .L1528 - ldr w4, [x23, w0, uxtw 2] +.L1530: + ldr w4, [x1] + cbnz w4, .L1527 + ldr w4, [x26, w0, uxtw 2] add w0, w0, 1 - str w4, [x2], -4 + str w4, [x1, 2048] cmp w0, w3 sub w19, w19, #1 csel w0, w0, wzr, cc + sub x1, x1, #4 cmp w19, 4096 - bne .L1531 + bne .L1530 mov w19, 512 - b .L1530 -.L1528: + b .L1529 +.L1527: add w19, w19, 127 lsr w19, w19, 7 -.L1530: - add w0, w19, 4 - ubfiz w1, w1, 2, 14 - mov w22, 0 - udiv w0, w0, w1 - add w0, w0, 1 - stp wzr, w0, [x29, 152] +.L1529: + ubfiz w0, w2, 2, 14 + add w21, w19, 4 + mov w1, w19 + mov w24, 0 + udiv w21, w21, w0 + adrp x0, .LC50 + add x0, x0, :lo12:.LC50 + add w21, w21, 1 + mov w2, w21 + bl printf lsl w0, w19, 7 str w0, [x29, 136] - adrp x0, .LANCHOR78 - add x20, x0, :lo12:.LANCHOR78 + adrp x0, .LANCHOR77 + add x20, x0, :lo12:.LANCHOR77 + str wzr, [x29, 156] +.L1531: + add w0, w21, w24 + str w0, [x29, 140] + cmp w0, 8 + bls .L1553 + ldr w0, [x29, 156] + cbnz w0, .L1554 +.L1526: + mov w19, -1 +.L1554: + ldr x0, [x29, 112] + str wzr, [x27, #:lo12:.LANCHOR181] + ldr x0, [x0, #:lo12:.LANCHOR182] + bl free + adrp x0, .LANCHOR183 + ldr x0, [x0, #:lo12:.LANCHOR183] + bl free +.L1521: + mov w0, w19 + ldp x19, x20, [sp, 16] + ldp x21, x22, [sp, 32] + ldp x23, x24, [sp, 48] + ldp x25, x26, [sp, 64] + ldp x27, x28, [sp, 80] + ldp x29, x30, [sp], 224 + ret .L1553: - adrp x26, .LANCHOR184 + adrp x23, .LANCHOR183 mov w1, 0 mov x2, 512 - ldr x0, [x26, #:lo12:.LANCHOR184] + ldr x0, [x23, #:lo12:.LANCHOR183] bl memset - str x26, [x29, 144] - add x0, x21, :lo12:.LANCHOR0 - ldrh w27, [x0, 10] - adrp x0, .LANCHOR78 - add x0, x0, :lo12:.LANCHOR78 + add x0, x22, :lo12:.LANCHOR0 + ldrh w3, [x0, 10] + mul w0, w24, w3 + str w0, [x29, 144] + adrp x0, .LANCHOR77 + add x0, x0, :lo12:.LANCHOR77 ldr x1, [x0, 32] - mul w25, w27, w22 cbz x1, .L1561 ldr x0, [x0, 40] - mov w26, 6 + mov w25, 6 cmp x0, 0 mov w0, 9 - csel w26, w26, w0, eq + csel w25, w25, w0, eq .L1532: - ldr x2, [x20, 8] - mov w1, w25 - mov w0, 0 - blr x2 - ldr w0, [x29, 156] - cmp w0, 1 - beq .L1533 - ldr x2, [x20, 8] - add w1, w27, w25 - mov w0, 0 - blr x2 + mul w4, w24, w3 + mov w28, 0 .L1533: - cmp w26, 9 + ldr x5, [x20, 8] + mov w1, w4 + str w3, [x29, 128] + mov w0, 0 + str w4, [x29, 152] + add w28, w28, 1 + blr x5 + ldr w3, [x29, 128] + cmp w21, w28 + ldr w4, [x29, 152] + add w4, w4, w3 + bhi .L1533 + cmp w25, 9 bne .L1563 - ldr x0, [x29, 144] + ldr x28, [x23, #:lo12:.LANCHOR183] mov w2, 1024 + str w3, [x29, 152] mov w1, 0 - ldr x28, [x0, #:lo12:.LANCHOR184] mov x0, x28 bl ftl_memset mov w0, 18766 @@ -11309,7 +11263,7 @@ FtlWriteToIDB: stp w0, w1, [x28] mov w0, 4 strb w0, [x28, 17] - add x0, x21, :lo12:.LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 strb wzr, [x28, 16] strb wzr, [x28, 20] strh wzr, [x28, 22] @@ -11321,73 +11275,73 @@ FtlWriteToIDB: add x0, x28, 12 bl js_hash str w0, [x28, 8] + ldr w3, [x29, 152] .L1534: - ldr w0, [x29, 156] - mov x6, x23 - mul w0, w0, w27 - mov x27, 0 - str w0, [x29, 140] - add w0, w25, 1 - str w0, [x29, 132] + mul w0, w21, w3 + mov x6, x26 + str w0, [x29, 152] + mov x5, 0 + add x0, x22, :lo12:.LANCHOR0 + str x0, [x29, 128] .L1535: - ldr w0, [x29, 140] - mov w1, w27 - cmp w27, w0 + ldr w0, [x29, 152] + mov w1, w5 + cmp w5, w0 bcs .L1542 - cmp w26, 9 + cmp w25, 9 bne .L1536 - ldr w0, [x29, 132] - add w0, w0, w1 -.L1589: + add w0, w1, 1 +.L1586: str w0, [x29, 160] mov w0, 61424 str w0, [x29, 164] cmp w1, 0 - ccmp w26, 9, 0, eq + ccmp w25, 9, 0, eq bne .L1538 ldr x1, [x20, 32] mov w0, 70 - str x6, [x29, 104] + stp x6, x5, [x29, 96] blr x1 - ldr x7, [x20, 16] + ldr w1, [x29, 144] add x3, x29, 160 + ldr x7, [x20, 16] mov x2, x28 - mov w1, w25 mov w0, 0 blr x7 mov w1, w0 - add x0, x21, :lo12:.LANCHOR0 + ldr x0, [x29, 128] ldr x2, [x20, 32] - str w1, [x29, 112] + str w1, [x29, 120] ldrb w0, [x0, 22] blr x2 - ldr w1, [x29, 112] - ldr x6, [x29, 104] + ldr w1, [x29, 120] + ldp x6, x5, [x29, 96] cmn w1, #1 bne .L1539 .L1542: - ldr x0, [x29, 144] - ldr x26, [x0, #:lo12:.LANCHOR184] - add x0, x21, :lo12:.LANCHOR0 - ldrb w28, [x0, 14] + add x0, x22, :lo12:.LANCHOR0 + ldr x25, [x23, #:lo12:.LANCHOR183] + ldrb w1, [x0, 14] ldrh w0, [x0, 10] - mul w1, w0, w22 - str w1, [x29, 140] + str w1, [x29, 128] + mul w1, w24, w0 + str w1, [x29, 144] ldr x1, [x20, 32] cbnz x1, .L1540 - mov w25, 6 -.L1541: - ldr w1, [x29, 156] - mov x27, 0 - mul w0, w1, w0 - str w0, [x29, 132] + mov w1, 6 +.L1587: + mul w0, w21, w0 + mov x28, 0 + str w0, [x29, 120] + str w1, [x29, 152] .L1544: - ldr w0, [x29, 132] - mov w1, w27 - cmp w27, w0 - bcs .L1548 - cmp w27, 0 - ccmp w25, 9, 0, eq + ldr w0, [x29, 120] + mov w1, w28 + cmp w0, w28 + bls .L1548 + ldr w0, [x29, 152] + cmp w28, 0 + ccmp w0, 9, 0, eq bne .L1545 ldr x1, [x20, 32] mov w0, 70 @@ -11397,76 +11351,77 @@ FtlWriteToIDB: blr x1 ldr x6, [x20, 24] add x3, x29, 160 - ldr w1, [x29, 140] - mov x2, x26 + ldr w1, [x29, 144] + mov x2, x25 mov w0, 0 blr x6 + ldrb w0, [x29, 128] ldr x1, [x20, 40] - mov w0, w28 blr x1 - add x0, x21, :lo12:.LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 ldr x1, [x20, 32] ldrb w0, [x0, 22] blr x1 - ldr w0, [x26] + ldr w0, [x25] mov w1, 18766 movk w1, 0x464e, lsl 16 cmp w0, w1 beq .L1546 .L1548: - ldr x0, [x29, 144] - mov x2, x23 + ldr x0, [x23, #:lo12:.LANCHOR183] + mov x2, x26 mov x1, 0 - ldr x0, [x0, #:lo12:.LANCHOR184] .L1547: ldr w3, [x29, 136] - mov w26, w1 + mov w28, w1 cmp w1, w3 bcc .L1551 - ldr w0, [x29, 152] + ldr w0, [x29, 156] add w0, w0, 1 - str w0, [x29, 152] + str w0, [x29, 156] cmp w0, 5 bls .L1550 b .L1554 .L1561: - mov w26, 6 + mov w25, 6 b .L1532 .L1563: mov x28, 0 b .L1534 .L1536: - add w0, w1, w25 - lsl w0, w0, 2 - b .L1589 + lsl w0, w1, 2 + b .L1586 .L1538: ldr x7, [x20, 16] add x3, x29, 160 + ldr w0, [x29, 144] mov x2, x6 - add w1, w1, w25 + str x5, [x29, 104] + add w1, w1, w0 + str x6, [x29, 120] mov w0, 0 - str x6, [x29, 112] blr x7 cmn w0, #1 beq .L1542 - ldr x6, [x29, 112] + ldr x6, [x29, 120] + ldr x5, [x29, 104] add x6, x6, 2048 .L1539: - add x27, x27, 1 + add x5, x5, 1 b .L1535 .L1540: ldr x1, [x20, 40] - mov w25, 6 + mov w2, 6 cmp x1, 0 mov w1, 9 - csel w25, w25, w1, eq - b .L1541 + csel w1, w2, w1, eq + b .L1587 .L1545: ldr x6, [x20, 24] add x3, x29, 160 - ldr w0, [x29, 140] - mov x2, x26 - add w1, w1, w0 + ldr w0, [x29, 144] + mov x2, x25 + add w1, w0, w1 mov w0, 0 blr x6 cmn w0, #1 @@ -11475,14 +11430,14 @@ FtlWriteToIDB: mov w1, 61424 cmp w0, w1 bne .L1548 - add x26, x26, 2048 + add x25, x25, 2048 .L1546: - add x27, x27, 1 + add x28, x28, 1 b .L1544 .L1551: mov x25, x2 ldr w4, [x0, x1, lsl 2] - lsl x27, x1, 2 + lsl x5, x1, 2 add x2, x2, 4 add x1, x1, 1 ldr w3, [x25] @@ -11490,111 +11445,81 @@ FtlWriteToIDB: beq .L1547 mov x2, 512 mov w1, 0 + str x5, [x29, 144] bl memset - ldr x0, [x29, 144] - mov w1, w22 + ldr x0, [x23, #:lo12:.LANCHOR183] + mov w1, w24 + ldr x5, [x29, 144] + mov w4, w28 ldr w3, [x25] - mov w4, w26 - ldr x0, [x0, #:lo12:.LANCHOR184] - ldr w2, [x0, x27] - adrp x0, .LC50 - add x0, x0, :lo12:.LC50 + ldr w2, [x0, x5] + adrp x0, .LC51 + add x0, x0, :lo12:.LC51 bl printf - add x0, x21, :lo12:.LANCHOR0 + add x0, x22, :lo12:.LANCHOR0 ldr x2, [x20, 8] ldrh w1, [x0, 10] mov w0, 0 - mul w1, w1, w22 + mul w1, w1, w24 blr x2 .L1550: - ldr w0, [x29, 156] - add w22, w22, w0 - cmp w22, 7 - bls .L1553 - ldr w0, [x29, 152] - cbnz w0, .L1554 -.L1527: - mov w19, -1 -.L1554: - ldr x0, [x29, 120] - str wzr, [x24, #:lo12:.LANCHOR182] - ldr x0, [x0, #:lo12:.LANCHOR183] - bl free - adrp x0, .LANCHOR184 - ldr x0, [x0, #:lo12:.LANCHOR184] - bl free -.L1522: - mov w0, w19 - ldp x19, x20, [sp, 16] - ldp x21, x22, [sp, 32] - ldp x23, x24, [sp, 48] - ldp x25, x26, [sp, 64] - ldp x27, x28, [sp, 80] - ldp x29, x30, [sp], 224 - ret -.L1524: - mov w21, w1 - mov x22, x2 + ldr w24, [x29, 140] + b .L1531 +.L1523: + mov w20, w1 + mov x21, x2 cmp w0, 64 bne .L1555 - adrp x20, .LANCHOR183 + adrp x24, .LANCHOR182 mov w0, 262144 bl ftl_malloc - str x0, [x20, #:lo12:.LANCHOR183] + str x0, [x24, #:lo12:.LANCHOR182] mov w0, 262144 bl ftl_malloc mov x1, x0 - adrp x0, .LANCHOR184 - str x1, [x0, #:lo12:.LANCHOR184] - ldr x0, [x20, #:lo12:.LANCHOR183] + adrp x0, .LANCHOR183 + str x1, [x0, #:lo12:.LANCHOR183] + ldr x0, [x24, #:lo12:.LANCHOR182] cbz x0, .L1556 cbz x1, .L1556 mov w1, 1 mov w2, 262144 - str w1, [x24, #:lo12:.LANCHOR182] + str w1, [x27, #:lo12:.LANCHOR181] mov w1, 0 bl ftl_memset .L1555: - ldr w0, [x24, #:lo12:.LANCHOR182] - cbz w0, .L1590 - adrp x0, .LANCHOR183 + ldr w0, [x27, #:lo12:.LANCHOR181] + cbz w0, .L1588 + adrp x0, .LANCHOR182 cmp w19, 63 - ldr x1, [x0, #:lo12:.LANCHOR183] + ldr x0, [x0, #:lo12:.LANCHOR182] bhi .L1558 - mov w0, 64 - sub w19, w0, w19 - sub w21, w21, w19 + mov w1, 64 + sub w19, w1, w19 + sub w20, w20, w19 ubfiz x19, x19, 9, 25 - add x22, x22, x19 - mov x20, x1 + add x1, x21, x19 .L1559: - cmp w25, 575 + cmp w23, 575 bls .L1560 - sub w21, w21, w23 - sub w21, w21, #446 + sub w20, w20, w22 + sub w20, w20, #446 .L1560: - mov w4, w21 - mov x3, x20 - mov w2, 262144 - adrp x0, .LC52 - add x0, x0, :lo12:.LC52 - bl printf - lsl w2, w21, 9 - mov x1, x22 - mov x0, x20 + lsl w2, w20, 9 bl ftl_memcpy - b .L1590 + b .L1588 .L1556: - adrp x1, .LANCHOR185 - adrp x0, .LC51 - add x1, x1, :lo12:.LANCHOR185 - add x0, x0, :lo12:.LC51 + adrp x1, .LANCHOR184 + adrp x0, .LC52 + add x1, x1, :lo12:.LANCHOR184 + add x0, x0, :lo12:.LC52 bl printf b .L1555 .L1558: - lsl w20, w19, 7 - sub w20, w20, #8192 - add x20, x1, x20, lsl 2 + lsl w2, w19, 7 + mov x1, x21 + sub w2, w2, #8192 + add x0, x0, x2, lsl 2 b .L1559 .size FtlWriteToIDB, .-FtlWriteToIDB .section .text.sftl_write,"ax",@progbits @@ -11611,26 +11536,26 @@ sftl_write: add w21, w19, w21 mov x20, x2 bl FtlWriteToIDB -.L1592: +.L1590: sub w1, w21, w19 mov x3, x20 cmp w19, 256 - bhi .L1594 + bhi .L1592 mov w2, w19 ldr x21, [sp, 32] ldp x19, x20, [sp, 16] mov w0, 0 ldp x29, x30, [sp], 48 b FtlWrite -.L1594: +.L1592: mov w2, 256 mov w0, 0 bl FtlWrite - cbnz w0, .L1591 + cbnz w0, .L1589 add x20, x20, 131072 sub w19, w19, #256 - b .L1592 -.L1591: + b .L1590 +.L1589: ldp x19, x20, [sp, 16] ldr x21, [sp, 32] ldp x29, x30, [sp], 48 @@ -11716,7 +11641,6 @@ sftl_write: .global p_map_block_ver_table .global p_map_block_valid_page_count .global p_map_block_table - .global p_blk_mode_table .global p_valid_page_count_check_table .global p_valid_page_count_table .global g_totle_swl_count @@ -11788,245 +11712,245 @@ sftl_write: .global c_ftl_nand_type .section .bss.DeviceCapacity,"aw",@nobits .align 2 - .set .LANCHOR26,. + 0 + .set .LANCHOR25,. + 0 .type DeviceCapacity, %object .size DeviceCapacity, 4 DeviceCapacity: .zero 4 .section .bss.FtlUpdateVaildLpnCount,"aw",@nobits .align 1 - .set .LANCHOR58,. + 0 + .set .LANCHOR57,. + 0 .type FtlUpdateVaildLpnCount, %object .size FtlUpdateVaildLpnCount, 2 FtlUpdateVaildLpnCount: .zero 2 .section .bss.c_ftl_nand_bbm_buf_size,"aw",@nobits .align 1 - .set .LANCHOR127,. + 0 + .set .LANCHOR126,. + 0 .type c_ftl_nand_bbm_buf_size, %object .size c_ftl_nand_bbm_buf_size, 2 c_ftl_nand_bbm_buf_size: .zero 2 .section .bss.c_ftl_nand_blk_pre_plane,"aw",@nobits .align 1 - .set .LANCHOR6,. + 0 + .set .LANCHOR5,. + 0 .type c_ftl_nand_blk_pre_plane, %object .size c_ftl_nand_blk_pre_plane, 2 c_ftl_nand_blk_pre_plane: .zero 2 .section .bss.c_ftl_nand_blks_per_die,"aw",@nobits .align 1 - .set .LANCHOR17,. + 0 + .set .LANCHOR16,. + 0 .type c_ftl_nand_blks_per_die, %object .size c_ftl_nand_blks_per_die, 2 c_ftl_nand_blks_per_die: .zero 2 .section .bss.c_ftl_nand_blks_per_die_shift,"aw",@nobits .align 1 - .set .LANCHOR18,. + 0 + .set .LANCHOR17,. + 0 .type c_ftl_nand_blks_per_die_shift, %object .size c_ftl_nand_blks_per_die_shift, 2 c_ftl_nand_blks_per_die_shift: .zero 2 .section .bss.c_ftl_nand_byte_pre_oob,"aw",@nobits .align 1 - .set .LANCHOR24,. + 0 + .set .LANCHOR23,. + 0 .type c_ftl_nand_byte_pre_oob, %object .size c_ftl_nand_byte_pre_oob, 2 c_ftl_nand_byte_pre_oob: .zero 2 .section .bss.c_ftl_nand_byte_pre_page,"aw",@nobits .align 1 - .set .LANCHOR23,. + 0 + .set .LANCHOR22,. + 0 .type c_ftl_nand_byte_pre_page, %object .size c_ftl_nand_byte_pre_page, 2 c_ftl_nand_byte_pre_page: .zero 2 .section .bss.c_ftl_nand_data_blks_per_plane,"aw",@nobits .align 1 - .set .LANCHOR5,. + 0 + .set .LANCHOR4,. + 0 .type c_ftl_nand_data_blks_per_plane, %object .size c_ftl_nand_data_blks_per_plane, 2 c_ftl_nand_data_blks_per_plane: .zero 2 .section .bss.c_ftl_nand_data_op_blks_per_plane,"aw",@nobits .align 1 - .set .LANCHOR171,. + 0 + .set .LANCHOR170,. + 0 .type c_ftl_nand_data_op_blks_per_plane, %object .size c_ftl_nand_data_op_blks_per_plane, 2 c_ftl_nand_data_op_blks_per_plane: .zero 2 .section .bss.c_ftl_nand_die_num,"aw",@nobits .align 1 - .set .LANCHOR10,. + 0 + .set .LANCHOR9,. + 0 .type c_ftl_nand_die_num, %object .size c_ftl_nand_die_num, 2 c_ftl_nand_die_num: .zero 2 .section .bss.c_ftl_nand_ext_blk_pre_plane,"aw",@nobits .align 1 - .set .LANCHOR15,. + 0 + .set .LANCHOR14,. + 0 .type c_ftl_nand_ext_blk_pre_plane, %object .size c_ftl_nand_ext_blk_pre_plane, 2 c_ftl_nand_ext_blk_pre_plane: .zero 2 .section .bss.c_ftl_nand_init_sys_blks_per_plane,"aw",@nobits .align 2 - .set .LANCHOR31,. + 0 + .set .LANCHOR30,. + 0 .type c_ftl_nand_init_sys_blks_per_plane, %object .size c_ftl_nand_init_sys_blks_per_plane, 4 c_ftl_nand_init_sys_blks_per_plane: .zero 4 .section .bss.c_ftl_nand_l2pmap_ram_region_num,"aw",@nobits .align 1 - .set .LANCHOR33,. + 0 + .set .LANCHOR32,. + 0 .type c_ftl_nand_l2pmap_ram_region_num, %object .size c_ftl_nand_l2pmap_ram_region_num, 2 c_ftl_nand_l2pmap_ram_region_num: .zero 2 .section .bss.c_ftl_nand_map_blks_per_plane,"aw",@nobits .align 1 - .set .LANCHOR29,. + 0 + .set .LANCHOR28,. + 0 .type c_ftl_nand_map_blks_per_plane, %object .size c_ftl_nand_map_blks_per_plane, 2 c_ftl_nand_map_blks_per_plane: .zero 2 .section .bss.c_ftl_nand_map_region_num,"aw",@nobits .align 1 - .set .LANCHOR32,. + 0 + .set .LANCHOR31,. + 0 .type c_ftl_nand_map_region_num, %object .size c_ftl_nand_map_region_num, 2 c_ftl_nand_map_region_num: .zero 2 .section .bss.c_ftl_nand_max_data_blks,"aw",@nobits .align 2 - .set .LANCHOR7,. + 0 + .set .LANCHOR6,. + 0 .type c_ftl_nand_max_data_blks, %object .size c_ftl_nand_max_data_blks, 4 c_ftl_nand_max_data_blks: .zero 4 .section .bss.c_ftl_nand_max_map_blks,"aw",@nobits .align 2 - .set .LANCHOR30,. + 0 + .set .LANCHOR29,. + 0 .type c_ftl_nand_max_map_blks, %object .size c_ftl_nand_max_map_blks, 4 c_ftl_nand_max_map_blks: .zero 4 .section .bss.c_ftl_nand_max_sys_blks,"aw",@nobits .align 2 - .set .LANCHOR4,. + 0 + .set .LANCHOR3,. + 0 .type c_ftl_nand_max_sys_blks, %object .size c_ftl_nand_max_sys_blks, 4 c_ftl_nand_max_sys_blks: .zero 4 .section .bss.c_ftl_nand_max_vendor_blks,"aw",@nobits .align 1 - .set .LANCHOR27,. + 0 + .set .LANCHOR26,. + 0 .type c_ftl_nand_max_vendor_blks, %object .size c_ftl_nand_max_vendor_blks, 2 c_ftl_nand_max_vendor_blks: .zero 2 .section .bss.c_ftl_nand_page_pre_blk,"aw",@nobits .align 1 - .set .LANCHOR19,. + 0 + .set .LANCHOR18,. + 0 .type c_ftl_nand_page_pre_blk, %object .size c_ftl_nand_page_pre_blk, 2 c_ftl_nand_page_pre_blk: .zero 2 .section .bss.c_ftl_nand_page_pre_slc_blk,"aw",@nobits .align 1 - .set .LANCHOR20,. + 0 + .set .LANCHOR19,. + 0 .type c_ftl_nand_page_pre_slc_blk, %object .size c_ftl_nand_page_pre_slc_blk, 2 c_ftl_nand_page_pre_slc_blk: .zero 2 .section .bss.c_ftl_nand_page_pre_super_blk,"aw",@nobits .align 1 - .set .LANCHOR21,. + 0 + .set .LANCHOR20,. + 0 .type c_ftl_nand_page_pre_super_blk, %object .size c_ftl_nand_page_pre_super_blk, 2 c_ftl_nand_page_pre_super_blk: .zero 2 .section .bss.c_ftl_nand_planes_num,"aw",@nobits .align 1 - .set .LANCHOR3,. + 0 + .set .LANCHOR2,. + 0 .type c_ftl_nand_planes_num, %object .size c_ftl_nand_planes_num, 2 c_ftl_nand_planes_num: .zero 2 .section .bss.c_ftl_nand_planes_per_die,"aw",@nobits .align 1 - .set .LANCHOR11,. + 0 + .set .LANCHOR10,. + 0 .type c_ftl_nand_planes_per_die, %object .size c_ftl_nand_planes_per_die, 2 c_ftl_nand_planes_per_die: .zero 2 .section .bss.c_ftl_nand_reserved_blks,"aw",@nobits .align 1 - .set .LANCHOR25,. + 0 + .set .LANCHOR24,. + 0 .type c_ftl_nand_reserved_blks, %object .size c_ftl_nand_reserved_blks, 2 c_ftl_nand_reserved_blks: .zero 2 .section .bss.c_ftl_nand_sec_pre_page,"aw",@nobits .align 1 - .set .LANCHOR12,. + 0 + .set .LANCHOR11,. + 0 .type c_ftl_nand_sec_pre_page, %object .size c_ftl_nand_sec_pre_page, 2 c_ftl_nand_sec_pre_page: .zero 2 .section .bss.c_ftl_nand_sec_pre_page_shift,"aw",@nobits .align 1 - .set .LANCHOR22,. + 0 + .set .LANCHOR21,. + 0 .type c_ftl_nand_sec_pre_page_shift, %object .size c_ftl_nand_sec_pre_page_shift, 2 c_ftl_nand_sec_pre_page_shift: .zero 2 .section .bss.c_ftl_nand_sys_blks_per_plane,"aw",@nobits .align 2 - .set .LANCHOR2,. + 0 + .set .LANCHOR1,. + 0 .type c_ftl_nand_sys_blks_per_plane, %object .size c_ftl_nand_sys_blks_per_plane, 4 c_ftl_nand_sys_blks_per_plane: .zero 4 .section .bss.c_ftl_nand_totle_phy_blks,"aw",@nobits .align 2 - .set .LANCHOR8,. + 0 + .set .LANCHOR7,. + 0 .type c_ftl_nand_totle_phy_blks, %object .size c_ftl_nand_totle_phy_blks, 4 c_ftl_nand_totle_phy_blks: .zero 4 .section .bss.c_ftl_nand_type,"aw",@nobits .align 1 - .set .LANCHOR9,. + 0 + .set .LANCHOR8,. + 0 .type c_ftl_nand_type, %object .size c_ftl_nand_type, 2 c_ftl_nand_type: .zero 2 .section .bss.c_ftl_nand_vendor_region_num,"aw",@nobits .align 1 - .set .LANCHOR28,. + 0 + .set .LANCHOR27,. + 0 .type c_ftl_nand_vendor_region_num, %object .size c_ftl_nand_vendor_region_num, 2 c_ftl_nand_vendor_region_num: .zero 2 .section .bss.c_ftl_vendor_part_size,"aw",@nobits .align 1 - .set .LANCHOR16,. + 0 + .set .LANCHOR15,. + 0 .type c_ftl_vendor_part_size, %object .size c_ftl_vendor_part_size, 2 c_ftl_vendor_part_size: .zero 2 .section .bss.c_gc_page_buf_num,"aw",@nobits .align 2 - .set .LANCHOR67,. + 0 + .set .LANCHOR66,. + 0 .type c_gc_page_buf_num, %object .size c_gc_page_buf_num, 4 c_gc_page_buf_num: .zero 4 .section .bss.c_mlc_erase_count_value,"aw",@nobits .align 1 - .set .LANCHOR14,. + 0 + .set .LANCHOR13,. + 0 .type c_mlc_erase_count_value, %object .size c_mlc_erase_count_value, 2 c_mlc_erase_count_value: @@ -12039,294 +11963,294 @@ check_vpc_table: .zero 16384 .section .bss.ftl_gc_temp_power_lost_recovery_flag,"aw",@nobits .align 2 - .set .LANCHOR133,. + 0 + .set .LANCHOR132,. + 0 .type ftl_gc_temp_power_lost_recovery_flag, %object .size ftl_gc_temp_power_lost_recovery_flag, 4 ftl_gc_temp_power_lost_recovery_flag: .zero 4 .section .bss.gBbtInfo,"aw",@nobits .align 3 - .set .LANCHOR37,. + 0 + .set .LANCHOR36,. + 0 .type gBbtInfo, %object .size gBbtInfo, 96 gBbtInfo: .zero 96 .section .bss.gL2pMapInfo,"aw",@nobits .align 3 - .set .LANCHOR129,. + 0 + .set .LANCHOR128,. + 0 .type gL2pMapInfo, %object .size gL2pMapInfo, 64 gL2pMapInfo: .zero 64 .section .bss.gSysFreeQueue,"aw",@nobits .align 3 - .set .LANCHOR38,. + 0 + .set .LANCHOR37,. + 0 .type gSysFreeQueue, %object .size gSysFreeQueue, 2056 gSysFreeQueue: .zero 2056 .section .bss.gSysInfo,"aw",@nobits .align 3 - .set .LANCHOR139,. + 0 + .set .LANCHOR138,. + 0 .type gSysInfo, %object .size gSysInfo, 16 gSysInfo: .zero 16 .section .bss.gVendorBlkInfo,"aw",@nobits .align 3 - .set .LANCHOR161,. + 0 + .set .LANCHOR160,. + 0 .type gVendorBlkInfo, %object .size gVendorBlkInfo, 64 gVendorBlkInfo: .zero 64 .section .bss.g_GlobalDataVersion,"aw",@nobits .align 2 - .set .LANCHOR83,. + 0 + .set .LANCHOR82,. + 0 .type g_GlobalDataVersion, %object .size g_GlobalDataVersion, 4 g_GlobalDataVersion: .zero 4 .section .bss.g_GlobalSysVersion,"aw",@nobits .align 2 - .set .LANCHOR82,. + 0 + .set .LANCHOR81,. + 0 .type g_GlobalSysVersion, %object .size g_GlobalSysVersion, 4 g_GlobalSysVersion: .zero 4 .section .bss.g_MaxLbaSector,"aw",@nobits .align 2 - .set .LANCHOR34,. + 0 + .set .LANCHOR33,. + 0 .type g_MaxLbaSector, %object .size g_MaxLbaSector, 4 g_MaxLbaSector: .zero 4 .section .bss.g_MaxLbn,"aw",@nobits .align 2 - .set .LANCHOR179,. + 0 + .set .LANCHOR178,. + 0 .type g_MaxLbn, %object .size g_MaxLbn, 4 g_MaxLbn: .zero 4 .section .bss.g_MaxLpn,"aw",@nobits .align 2 - .set .LANCHOR152,. + 0 + .set .LANCHOR151,. + 0 .type g_MaxLpn, %object .size g_MaxLpn, 4 g_MaxLpn: .zero 4 .section .bss.g_VaildLpn,"aw",@nobits .align 2 - .set .LANCHOR59,. + 0 + .set .LANCHOR58,. + 0 .type g_VaildLpn, %object .size g_VaildLpn, 4 g_VaildLpn: .zero 4 .section .bss.g_active_superblock,"aw",@nobits .align 3 - .set .LANCHOR51,. + 0 + .set .LANCHOR50,. + 0 .type g_active_superblock, %object .size g_active_superblock, 48 g_active_superblock: .zero 48 .section .bss.g_buffer_superblock,"aw",@nobits .align 3 - .set .LANCHOR52,. + 0 + .set .LANCHOR51,. + 0 .type g_buffer_superblock, %object .size g_buffer_superblock, 48 g_buffer_superblock: .zero 48 .section .bss.g_cur_erase_blk,"aw",@nobits .align 2 - .set .LANCHOR99,. + 0 + .set .LANCHOR98,. + 0 .type g_cur_erase_blk, %object .size g_cur_erase_blk, 4 g_cur_erase_blk: .zero 4 .section .bss.g_ect_tbl_info_size,"aw",@nobits .align 1 - .set .LANCHOR116,. + 0 + .set .LANCHOR115,. + 0 .type g_ect_tbl_info_size, %object .size g_ect_tbl_info_size, 2 g_ect_tbl_info_size: .zero 2 .section .bss.g_ect_tbl_power_up_flush,"aw",@nobits .align 1 - .set .LANCHOR164,. + 0 + .set .LANCHOR163,. + 0 .type g_ect_tbl_power_up_flush, %object .size g_ect_tbl_power_up_flush, 2 g_ect_tbl_power_up_flush: .zero 2 .section .bss.g_ftl_nand_free_count,"aw",@nobits .align 2 - .set .LANCHOR176,. + 0 + .set .LANCHOR175,. + 0 .type g_ftl_nand_free_count, %object .size g_ftl_nand_free_count, 4 g_ftl_nand_free_count: .zero 4 .section .bss.g_gc_bad_block_gc_index,"aw",@nobits .align 1 - .set .LANCHOR76,. + 0 + .set .LANCHOR75,. + 0 .type g_gc_bad_block_gc_index, %object .size g_gc_bad_block_gc_index, 2 g_gc_bad_block_gc_index: .zero 2 .section .bss.g_gc_bad_block_temp_num,"aw",@nobits .align 1 - .set .LANCHOR74,. + 0 + .set .LANCHOR73,. + 0 .type g_gc_bad_block_temp_num, %object .size g_gc_bad_block_temp_num, 2 g_gc_bad_block_temp_num: .zero 2 .section .bss.g_gc_bad_block_temp_tbl,"aw",@nobits .align 3 - .set .LANCHOR75,. + 0 + .set .LANCHOR74,. + 0 .type g_gc_bad_block_temp_tbl, %object .size g_gc_bad_block_temp_tbl, 34 g_gc_bad_block_temp_tbl: .zero 34 .section .bss.g_gc_blk_index,"aw",@nobits .align 1 - .set .LANCHOR102,. + 0 + .set .LANCHOR101,. + 0 .type g_gc_blk_index, %object .size g_gc_blk_index, 2 g_gc_blk_index: .zero 2 .section .bss.g_gc_blk_num,"aw",@nobits .align 1 - .set .LANCHOR68,. + 0 + .set .LANCHOR67,. + 0 .type g_gc_blk_num, %object .size g_gc_blk_num, 2 g_gc_blk_num: .zero 2 .section .bss.g_gc_cur_blk_max_valid_pages,"aw",@nobits .align 1 - .set .LANCHOR174,. + 0 + .set .LANCHOR173,. + 0 .type g_gc_cur_blk_max_valid_pages, %object .size g_gc_cur_blk_max_valid_pages, 2 g_gc_cur_blk_max_valid_pages: .zero 2 .section .bss.g_gc_cur_blk_valid_pages,"aw",@nobits .align 1 - .set .LANCHOR173,. + 0 + .set .LANCHOR172,. + 0 .type g_gc_cur_blk_valid_pages, %object .size g_gc_cur_blk_valid_pages, 2 g_gc_cur_blk_valid_pages: .zero 2 .section .bss.g_gc_free_blk_threshold,"aw",@nobits .align 1 - .set .LANCHOR100,. + 0 + .set .LANCHOR99,. + 0 .type g_gc_free_blk_threshold, %object .size g_gc_free_blk_threshold, 2 g_gc_free_blk_threshold: .zero 2 .section .bss.g_gc_head_data_block,"aw",@nobits .align 2 - .set .LANCHOR96,. + 0 + .set .LANCHOR95,. + 0 .type g_gc_head_data_block, %object .size g_gc_head_data_block, 4 g_gc_head_data_block: .zero 4 .section .bss.g_gc_head_data_block_count,"aw",@nobits .align 2 - .set .LANCHOR97,. + 0 + .set .LANCHOR96,. + 0 .type g_gc_head_data_block_count, %object .size g_gc_head_data_block_count, 4 g_gc_head_data_block_count: .zero 4 .section .bss.g_gc_merge_free_blk_threshold,"aw",@nobits .align 1 - .set .LANCHOR101,. + 0 + .set .LANCHOR100,. + 0 .type g_gc_merge_free_blk_threshold, %object .size g_gc_merge_free_blk_threshold, 2 g_gc_merge_free_blk_threshold: .zero 2 .section .bss.g_gc_next_blk,"aw",@nobits .align 1 - .set .LANCHOR72,. + 0 + .set .LANCHOR71,. + 0 .type g_gc_next_blk, %object .size g_gc_next_blk, 2 g_gc_next_blk: .zero 2 .section .bss.g_gc_next_blk_1,"aw",@nobits .align 1 - .set .LANCHOR73,. + 0 + .set .LANCHOR72,. + 0 .type g_gc_next_blk_1, %object .size g_gc_next_blk_1, 2 g_gc_next_blk_1: .zero 2 .section .bss.g_gc_num_req,"aw",@nobits .align 2 - .set .LANCHOR62,. + 0 + .set .LANCHOR61,. + 0 .type g_gc_num_req, %object .size g_gc_num_req, 4 g_gc_num_req: .zero 4 .section .bss.g_gc_page_offset,"aw",@nobits .align 1 - .set .LANCHOR70,. + 0 + .set .LANCHOR69,. + 0 .type g_gc_page_offset, %object .size g_gc_page_offset, 2 g_gc_page_offset: .zero 2 .section .bss.g_gc_skip_write_count,"aw",@nobits .align 2 - .set .LANCHOR98,. + 0 + .set .LANCHOR97,. + 0 .type g_gc_skip_write_count, %object .size g_gc_skip_write_count, 4 g_gc_skip_write_count: .zero 4 .section .bss.g_gc_superblock,"aw",@nobits .align 3 - .set .LANCHOR145,. + 0 + .set .LANCHOR144,. + 0 .type g_gc_superblock, %object .size g_gc_superblock, 48 g_gc_superblock: .zero 48 .section .bss.g_gc_temp_superblock,"aw",@nobits .align 3 - .set .LANCHOR53,. + 0 + .set .LANCHOR52,. + 0 .type g_gc_temp_superblock, %object .size g_gc_temp_superblock, 48 g_gc_temp_superblock: .zero 48 .section .bss.g_in_gc_progress,"aw",@nobits .align 2 - .set .LANCHOR94,. + 0 + .set .LANCHOR93,. + 0 .type g_in_gc_progress, %object .size g_in_gc_progress, 4 g_in_gc_progress: .zero 4 .section .bss.g_in_swl_replace,"aw",@nobits .align 2 - .set .LANCHOR95,. + 0 + .set .LANCHOR94,. + 0 .type g_in_swl_replace, %object .size g_in_swl_replace, 4 g_in_swl_replace: .zero 4 .section .bss.g_l2p_last_update_region_id,"aw",@nobits .align 1 - .set .LANCHOR56,. + 0 + .set .LANCHOR55,. + 0 .type g_l2p_last_update_region_id, %object .size g_l2p_last_update_region_id, 2 g_l2p_last_update_region_id: .zero 2 .section .bss.g_max_erase_count,"aw",@nobits .align 2 - .set .LANCHOR92,. + 0 + .set .LANCHOR91,. + 0 .type g_max_erase_count, %object .size g_max_erase_count, 4 g_max_erase_count: .zero 4 .section .bss.g_min_erase_count,"aw",@nobits .align 2 - .set .LANCHOR93,. + 0 + .set .LANCHOR92,. + 0 .type g_min_erase_count, %object .size g_min_erase_count, 4 g_min_erase_count: .zero 4 .section .bss.g_nand_ops,"aw",@nobits .align 3 - .set .LANCHOR78,. + 0 + .set .LANCHOR77,. + 0 .type g_nand_ops, %object .size g_nand_ops, 48 g_nand_ops: @@ -12340,203 +12264,203 @@ g_nand_phy_info: .zero 24 .section .bss.g_num_data_superblocks,"aw",@nobits .align 1 - .set .LANCHOR44,. + 0 + .set .LANCHOR43,. + 0 .type g_num_data_superblocks, %object .size g_num_data_superblocks, 2 g_num_data_superblocks: .zero 2 .section .bss.g_num_free_superblocks,"aw",@nobits .align 1 - .set .LANCHOR48,. + 0 + .set .LANCHOR47,. + 0 .type g_num_free_superblocks, %object .size g_num_free_superblocks, 2 g_num_free_superblocks: .zero 2 .section .bss.g_power_lost_recovery_flag,"aw",@nobits .align 1 - .set .LANCHOR156,. + 0 + .set .LANCHOR155,. + 0 .type g_power_lost_recovery_flag, %object .size g_power_lost_recovery_flag, 2 g_power_lost_recovery_flag: .zero 2 .section .bss.g_recovery_page_min_ver,"aw",@nobits .align 2 - .set .LANCHOR134,. + 0 + .set .LANCHOR133,. + 0 .type g_recovery_page_min_ver, %object .size g_recovery_page_min_ver, 4 g_recovery_page_min_ver: .zero 4 .section .bss.g_recovery_page_num,"aw",@nobits .align 2 - .set .LANCHOR157,. + 0 + .set .LANCHOR156,. + 0 .type g_recovery_page_num, %object .size g_recovery_page_num, 4 g_recovery_page_num: .zero 4 .section .bss.g_recovery_ppa_tbl,"aw",@nobits .align 3 - .set .LANCHOR158,. + 0 + .set .LANCHOR157,. + 0 .type g_recovery_ppa_tbl, %object .size g_recovery_ppa_tbl, 128 g_recovery_ppa_tbl: .zero 128 .section .bss.g_sys_ext_data,"aw",@nobits .align 3 - .set .LANCHOR135,. + 0 + .set .LANCHOR134,. + 0 .type g_sys_ext_data, %object .size g_sys_ext_data, 512 g_sys_ext_data: .zero 512 .section .bss.g_sys_save_data,"aw",@nobits .align 3 - .set .LANCHOR39,. + 0 + .set .LANCHOR38,. + 0 .type g_sys_save_data, %object .size g_sys_save_data, 48 g_sys_save_data: .zero 48 .section .bss.g_tmp_data_superblock_id,"aw",@nobits .align 1 - .set .LANCHOR131,. + 0 + .set .LANCHOR130,. + 0 .type g_tmp_data_superblock_id, %object .size g_tmp_data_superblock_id, 2 g_tmp_data_superblock_id: .zero 2 .section .bss.g_totle_avg_erase_count,"aw",@nobits .align 2 - .set .LANCHOR143,. + 0 + .set .LANCHOR142,. + 0 .type g_totle_avg_erase_count, %object .size g_totle_avg_erase_count, 4 g_totle_avg_erase_count: .zero 4 .section .bss.g_totle_cache_write_count,"aw",@nobits .align 2 - .set .LANCHOR87,. + 0 + .set .LANCHOR86,. + 0 .type g_totle_cache_write_count, %object .size g_totle_cache_write_count, 4 g_totle_cache_write_count: .zero 4 .section .bss.g_totle_discard_page_count,"aw",@nobits .align 2 - .set .LANCHOR86,. + 0 + .set .LANCHOR85,. + 0 .type g_totle_discard_page_count, %object .size g_totle_discard_page_count, 4 g_totle_discard_page_count: .zero 4 .section .bss.g_totle_gc_page_count,"aw",@nobits .align 2 - .set .LANCHOR84,. + 0 + .set .LANCHOR83,. + 0 .type g_totle_gc_page_count, %object .size g_totle_gc_page_count, 4 g_totle_gc_page_count: .zero 4 .section .bss.g_totle_l2p_write_count,"aw",@nobits .align 2 - .set .LANCHOR88,. + 0 + .set .LANCHOR87,. + 0 .type g_totle_l2p_write_count, %object .size g_totle_l2p_write_count, 4 g_totle_l2p_write_count: .zero 4 .section .bss.g_totle_map_block,"aw",@nobits .align 1 - .set .LANCHOR130,. + 0 + .set .LANCHOR129,. + 0 .type g_totle_map_block, %object .size g_totle_map_block, 2 g_totle_map_block: .zero 2 .section .bss.g_totle_mlc_erase_count,"aw",@nobits .align 2 - .set .LANCHOR90,. + 0 + .set .LANCHOR89,. + 0 .type g_totle_mlc_erase_count, %object .size g_totle_mlc_erase_count, 4 g_totle_mlc_erase_count: .zero 4 .section .bss.g_totle_read_page_count,"aw",@nobits .align 2 - .set .LANCHOR89,. + 0 + .set .LANCHOR88,. + 0 .type g_totle_read_page_count, %object .size g_totle_read_page_count, 4 g_totle_read_page_count: .zero 4 .section .bss.g_totle_read_sector,"aw",@nobits .align 2 - .set .LANCHOR163,. + 0 + .set .LANCHOR162,. + 0 .type g_totle_read_sector, %object .size g_totle_read_sector, 4 g_totle_read_sector: .zero 4 .section .bss.g_totle_slc_erase_count,"aw",@nobits .align 2 - .set .LANCHOR91,. + 0 + .set .LANCHOR90,. + 0 .type g_totle_slc_erase_count, %object .size g_totle_slc_erase_count, 4 g_totle_slc_erase_count: .zero 4 .section .bss.g_totle_swl_count,"aw",@nobits .align 2 - .set .LANCHOR132,. + 0 + .set .LANCHOR131,. + 0 .type g_totle_swl_count, %object .size g_totle_swl_count, 4 g_totle_swl_count: .zero 4 .section .bss.g_totle_sys_slc_erase_count,"aw",@nobits .align 2 - .set .LANCHOR80,. + 0 + .set .LANCHOR79,. + 0 .type g_totle_sys_slc_erase_count, %object .size g_totle_sys_slc_erase_count, 4 g_totle_sys_slc_erase_count: .zero 4 .section .bss.g_totle_vendor_block,"aw",@nobits .align 1 - .set .LANCHOR35,. + 0 + .set .LANCHOR34,. + 0 .type g_totle_vendor_block, %object .size g_totle_vendor_block, 2 g_totle_vendor_block: .zero 2 .section .bss.g_totle_write_page_count,"aw",@nobits .align 2 - .set .LANCHOR85,. + 0 + .set .LANCHOR84,. + 0 .type g_totle_write_page_count, %object .size g_totle_write_page_count, 4 g_totle_write_page_count: .zero 4 .section .bss.g_totle_write_sector,"aw",@nobits .align 2 - .set .LANCHOR162,. + 0 + .set .LANCHOR161,. + 0 .type g_totle_write_sector, %object .size g_totle_write_sector, 4 g_totle_write_sector: .zero 4 .section .bss.gc_discard_updated,"aw",@nobits .align 2 - .set .LANCHOR167,. + 0 + .set .LANCHOR166,. + 0 .type gc_discard_updated, %object .size gc_discard_updated, 4 gc_discard_updated: .zero 4 .section .bss.gc_ink_free_return_value,"aw",@nobits .align 1 - .set .LANCHOR172,. + 0 + .set .LANCHOR171,. + 0 .type gc_ink_free_return_value, %object .size gc_ink_free_return_value, 2 gc_ink_free_return_value: .zero 2 .section .bss.gp_ect_tbl_info,"aw",@nobits .align 3 - .set .LANCHOR118,. + 0 + .set .LANCHOR117,. + 0 .type gp_ect_tbl_info, %object .size gp_ect_tbl_info, 8 gp_ect_tbl_info: .zero 8 .section .bss.gp_flash_check_buf,"aw",@nobits .align 3 - .set .LANCHOR184,. + 0 + .set .LANCHOR183,. + 0 .type gp_flash_check_buf, %object .size gp_flash_check_buf, 8 gp_flash_check_buf: .zero 8 .section .bss.gp_gc_page_buf_info,"aw",@nobits .align 3 - .set .LANCHOR63,. + 0 + .set .LANCHOR62,. + 0 .type gp_gc_page_buf_info, %object .size gp_gc_page_buf_info, 8 gp_gc_page_buf_info: @@ -12549,189 +12473,182 @@ gp_last_act_superblock: .zero 8 .section .bss.idb_buf,"aw",@nobits .align 3 - .set .LANCHOR183,. + 0 + .set .LANCHOR182,. + 0 .type idb_buf, %object .size idb_buf, 8 idb_buf: .zero 8 .section .bss.idb_need_write_back,"aw",@nobits .align 2 - .set .LANCHOR182,. + 0 + .set .LANCHOR181,. + 0 .type idb_need_write_back, %object .size idb_need_write_back, 4 idb_need_write_back: .zero 4 .section .bss.low_format_en,"aw",@nobits .align 2 - .set .LANCHOR181,. + 0 + .set .LANCHOR180,. + 0 .type low_format_en, %object .size low_format_en, 4 low_format_en: .zero 4 - .section .bss.p_blk_mode_table,"aw",@nobits - .align 3 - .set .LANCHOR1,. + 0 - .type p_blk_mode_table, %object - .size p_blk_mode_table, 8 -p_blk_mode_table: - .zero 8 .section .bss.p_data_block_list_head,"aw",@nobits .align 3 - .set .LANCHOR41,. + 0 + .set .LANCHOR40,. + 0 .type p_data_block_list_head, %object .size p_data_block_list_head, 8 p_data_block_list_head: .zero 8 .section .bss.p_data_block_list_table,"aw",@nobits .align 3 - .set .LANCHOR40,. + 0 + .set .LANCHOR39,. + 0 .type p_data_block_list_table, %object .size p_data_block_list_table, 8 p_data_block_list_table: .zero 8 .section .bss.p_data_block_list_tail,"aw",@nobits .align 3 - .set .LANCHOR43,. + 0 + .set .LANCHOR42,. + 0 .type p_data_block_list_tail, %object .size p_data_block_list_tail, 8 p_data_block_list_tail: .zero 8 .section .bss.p_erase_count_table,"aw",@nobits .align 3 - .set .LANCHOR47,. + 0 + .set .LANCHOR46,. + 0 .type p_erase_count_table, %object .size p_erase_count_table, 8 p_erase_count_table: .zero 8 .section .bss.p_free_data_block_list_head,"aw",@nobits .align 3 - .set .LANCHOR46,. + 0 + .set .LANCHOR45,. + 0 .type p_free_data_block_list_head, %object .size p_free_data_block_list_head, 8 p_free_data_block_list_head: .zero 8 .section .bss.p_gc_blk_tbl,"aw",@nobits .align 3 - .set .LANCHOR69,. + 0 + .set .LANCHOR68,. + 0 .type p_gc_blk_tbl, %object .size p_gc_blk_tbl, 8 p_gc_blk_tbl: .zero 8 .section .bss.p_gc_data_buf,"aw",@nobits .align 3 - .set .LANCHOR64,. + 0 + .set .LANCHOR63,. + 0 .type p_gc_data_buf, %object .size p_gc_data_buf, 8 p_gc_data_buf: .zero 8 .section .bss.p_gc_page_info,"aw",@nobits .align 3 - .set .LANCHOR71,. + 0 + .set .LANCHOR70,. + 0 .type p_gc_page_info, %object .size p_gc_page_info, 8 p_gc_page_info: .zero 8 .section .bss.p_gc_spare_buf,"aw",@nobits .align 3 - .set .LANCHOR65,. + 0 + .set .LANCHOR64,. + 0 .type p_gc_spare_buf, %object .size p_gc_spare_buf, 8 p_gc_spare_buf: .zero 8 .section .bss.p_io_data_buf_0,"aw",@nobits .align 3 - .set .LANCHOR109,. + 0 + .set .LANCHOR108,. + 0 .type p_io_data_buf_0, %object .size p_io_data_buf_0, 8 p_io_data_buf_0: .zero 8 .section .bss.p_io_data_buf_1,"aw",@nobits .align 3 - .set .LANCHOR110,. + 0 + .set .LANCHOR109,. + 0 .type p_io_data_buf_1, %object .size p_io_data_buf_1, 8 p_io_data_buf_1: .zero 8 .section .bss.p_io_spare_buf,"aw",@nobits .align 3 - .set .LANCHOR115,. + 0 + .set .LANCHOR114,. + 0 .type p_io_spare_buf, %object .size p_io_spare_buf, 8 p_io_spare_buf: .zero 8 .section .bss.p_l2p_map_buf,"aw",@nobits .align 3 - .set .LANCHOR126,. + 0 + .set .LANCHOR125,. + 0 .type p_l2p_map_buf, %object .size p_l2p_map_buf, 8 p_l2p_map_buf: .zero 8 .section .bss.p_l2p_ram_map,"aw",@nobits .align 3 - .set .LANCHOR55,. + 0 + .set .LANCHOR54,. + 0 .type p_l2p_ram_map, %object .size p_l2p_ram_map, 8 p_l2p_ram_map: .zero 8 .section .bss.p_map_block_table,"aw",@nobits .align 3 - .set .LANCHOR119,. + 0 + .set .LANCHOR118,. + 0 .type p_map_block_table, %object .size p_map_block_table, 8 p_map_block_table: .zero 8 .section .bss.p_map_block_valid_page_count,"aw",@nobits .align 3 - .set .LANCHOR120,. + 0 + .set .LANCHOR119,. + 0 .type p_map_block_valid_page_count, %object .size p_map_block_valid_page_count, 8 p_map_block_valid_page_count: .zero 8 .section .bss.p_map_block_ver_table,"aw",@nobits .align 3 - .set .LANCHOR125,. + 0 + .set .LANCHOR124,. + 0 .type p_map_block_ver_table, %object .size p_map_block_ver_table, 8 p_map_block_ver_table: .zero 8 .section .bss.p_map_region_ppn_table,"aw",@nobits .align 3 - .set .LANCHOR124,. + 0 + .set .LANCHOR123,. + 0 .type p_map_region_ppn_table, %object .size p_map_region_ppn_table, 8 p_map_region_ppn_table: .zero 8 .section .bss.p_plane_order_table,"aw",@nobits .align 3 - .set .LANCHOR13,. + 0 + .set .LANCHOR12,. + 0 .type p_plane_order_table, %object .size p_plane_order_table, 32 p_plane_order_table: .zero 32 .section .bss.p_swl_mul_table,"aw",@nobits .align 3 - .set .LANCHOR117,. + 0 + .set .LANCHOR116,. + 0 .type p_swl_mul_table, %object .size p_swl_mul_table, 8 p_swl_mul_table: .zero 8 .section .bss.p_sys_data_buf,"aw",@nobits .align 3 - .set .LANCHOR106,. + 0 + .set .LANCHOR105,. + 0 .type p_sys_data_buf, %object .size p_sys_data_buf, 8 p_sys_data_buf: .zero 8 .section .bss.p_sys_data_buf_1,"aw",@nobits .align 3 - .set .LANCHOR107,. + 0 + .set .LANCHOR106,. + 0 .type p_sys_data_buf_1, %object .size p_sys_data_buf_1, 8 p_sys_data_buf_1: .zero 8 .section .bss.p_sys_spare_buf,"aw",@nobits .align 3 - .set .LANCHOR114,. + 0 + .set .LANCHOR113,. + 0 .type p_sys_spare_buf, %object .size p_sys_spare_buf, 8 p_sys_spare_buf: @@ -12744,119 +12661,119 @@ p_valid_page_count_check_table: .zero 8 .section .bss.p_valid_page_count_table,"aw",@nobits .align 3 - .set .LANCHOR42,. + 0 + .set .LANCHOR41,. + 0 .type p_valid_page_count_table, %object .size p_valid_page_count_table, 8 p_valid_page_count_table: .zero 8 .section .bss.p_vendor_block_table,"aw",@nobits .align 3 - .set .LANCHOR36,. + 0 + .set .LANCHOR35,. + 0 .type p_vendor_block_table, %object .size p_vendor_block_table, 8 p_vendor_block_table: .zero 8 .section .bss.p_vendor_block_valid_page_count,"aw",@nobits .align 3 - .set .LANCHOR121,. + 0 + .set .LANCHOR120,. + 0 .type p_vendor_block_valid_page_count, %object .size p_vendor_block_valid_page_count, 8 p_vendor_block_valid_page_count: .zero 8 .section .bss.p_vendor_block_ver_table,"aw",@nobits .align 3 - .set .LANCHOR122,. + 0 + .set .LANCHOR121,. + 0 .type p_vendor_block_ver_table, %object .size p_vendor_block_ver_table, 8 p_vendor_block_ver_table: .zero 8 .section .bss.p_vendor_data_buf,"aw",@nobits .align 3 - .set .LANCHOR108,. + 0 + .set .LANCHOR107,. + 0 .type p_vendor_data_buf, %object .size p_vendor_data_buf, 8 p_vendor_data_buf: .zero 8 .section .bss.p_vendor_region_ppn_table,"aw",@nobits .align 3 - .set .LANCHOR123,. + 0 + .set .LANCHOR122,. + 0 .type p_vendor_region_ppn_table, %object .size p_vendor_region_ppn_table, 8 p_vendor_region_ppn_table: .zero 8 .section .bss.req_erase,"aw",@nobits .align 3 - .set .LANCHOR79,. + 0 + .set .LANCHOR78,. + 0 .type req_erase, %object .size req_erase, 8 req_erase: .zero 8 .section .bss.req_gc,"aw",@nobits .align 3 - .set .LANCHOR66,. + 0 + .set .LANCHOR65,. + 0 .type req_gc, %object .size req_gc, 8 req_gc: .zero 8 .section .bss.req_gc_dst,"aw",@nobits .align 3 - .set .LANCHOR104,. + 0 + .set .LANCHOR103,. + 0 .type req_gc_dst, %object .size req_gc_dst, 8 req_gc_dst: .zero 8 .section .bss.req_prgm,"aw",@nobits .align 3 - .set .LANCHOR105,. + 0 + .set .LANCHOR104,. + 0 .type req_prgm, %object .size req_prgm, 8 req_prgm: .zero 8 .section .bss.req_read,"aw",@nobits .align 3 - .set .LANCHOR103,. + 0 + .set .LANCHOR102,. + 0 .type req_read, %object .size req_read, 8 req_read: .zero 8 .section .bss.req_sys,"aw",@nobits .align 3 - .set .LANCHOR138,. + 0 + .set .LANCHOR137,. + 0 .type req_sys, %object .size req_sys, 32 req_sys: .zero 32 .section .bss.sftl_nand_check_buf,"aw",@nobits .align 3 - .set .LANCHOR111,. + 0 + .set .LANCHOR110,. + 0 .type sftl_nand_check_buf, %object .size sftl_nand_check_buf, 8 sftl_nand_check_buf: .zero 8 .section .bss.sftl_nand_check_spare_buf,"aw",@nobits .align 3 - .set .LANCHOR113,. + 0 + .set .LANCHOR112,. + 0 .type sftl_nand_check_spare_buf, %object .size sftl_nand_check_spare_buf, 8 sftl_nand_check_spare_buf: .zero 8 .section .bss.sftl_temp_buf,"aw",@nobits .align 3 - .set .LANCHOR112,. + 0 + .set .LANCHOR111,. + 0 .type sftl_temp_buf, %object .size sftl_temp_buf, 8 sftl_temp_buf: .zero 8 .section .data.ftl_gc_temp_block_bops_scan_page_addr,"aw",@progbits .align 1 - .set .LANCHOR160,. + 0 + .set .LANCHOR159,. + 0 .type ftl_gc_temp_block_bops_scan_page_addr, %object .size ftl_gc_temp_block_bops_scan_page_addr, 2 ftl_gc_temp_block_bops_scan_page_addr: .hword -1 .section .data.gFtlInitStatus,"aw",@progbits .align 2 - .set .LANCHOR166,. + 0 + .set .LANCHOR165,. + 0 .type gFtlInitStatus, %object .size gFtlInitStatus, 4 gFtlInitStatus: @@ -12947,258 +12864,258 @@ power_up_flag: .string "FtlWrite: lpa error:%x %x\n" .section .rodata.FtlWriteToIDB.str1.1,"aMS",@progbits,1 .LC50: - .string "write_idblock fail! %x %x %x %x\n" + .string "write_idblock %x %x\n" .LC51: - .string "%s idb buffer alloc fail\n" + .string "write_idblock fail! %x %x %x %x\n" .LC52: - .string "%p %x %p %x\n" + .string "%s idb buffer alloc fail\n" .section .rodata.INSERT_DATA_LIST.str1.1,"aMS",@progbits,1 .LC1: .string "\n!!!!! error @ func:%s - line:%d\n" - .section .rodata.__func__.6252,"a",@progbits - .align 3 - .set .LANCHOR169,. + 0 - .type __func__.6252, %object - .size __func__.6252, 13 -__func__.6252: - .string "FtlProgPages" - .section .rodata.__func__.6280,"a",@progbits - .align 3 - .set .LANCHOR177,. + 0 - .type __func__.6280, %object - .size __func__.6280, 9 -__func__.6280: - .string "FtlWrite" - .section .rodata.__func__.6362,"a",@progbits - .align 3 - .set .LANCHOR128,. + 0 - .type __func__.6362, %object - .size __func__.6362, 14 -__func__.6362: - .string "FtlBbt2Bitmap" - .section .rodata.__func__.6397,"a",@progbits - .align 3 - .set .LANCHOR141,. + 0 - .type __func__.6397, %object - .size __func__.6397, 11 -__func__.6397: - .string "FtlLoadBbt" - .section .rodata.__func__.6512,"a",@progbits - .align 3 - .set .LANCHOR49,. + 0 - .type __func__.6512, %object - .size __func__.6512, 17 -__func__.6512: - .string "INSERT_FREE_LIST" - .section .rodata.__func__.6517,"a",@progbits - .align 3 - .set .LANCHOR45,. + 0 - .type __func__.6517, %object - .size __func__.6517, 17 -__func__.6517: - .string "INSERT_DATA_LIST" - .section .rodata.__func__.6548,"a",@progbits - .align 3 - .set .LANCHOR50,. + 0 - .type __func__.6548, %object - .size __func__.6548, 17 -__func__.6548: - .string "List_remove_node" - .section .rodata.__func__.6580,"a",@progbits - .align 3 - .set .LANCHOR54,. + 0 - .type __func__.6580, %object - .size __func__.6580, 22 -__func__.6580: - .string "List_update_data_list" - .section .rodata.__func__.6589,"a",@progbits - .align 3 - .set .LANCHOR150,. + 0 - .type __func__.6589, %object - .size __func__.6589, 16 -__func__.6589: - .string "load_l2p_region" - .section .rodata.__func__.6622,"a",@progbits - .align 3 - .set .LANCHOR81,. + 0 - .type __func__.6622, %object - .size __func__.6622, 26 -__func__.6622: - .string "ftl_map_blk_alloc_new_blk" - .section .rodata.__func__.6633,"a",@progbits - .align 3 - .set .LANCHOR151,. + 0 - .type __func__.6633, %object - .size __func__.6633, 15 -__func__.6633: - .string "ftl_map_blk_gc" - .section .rodata.__func__.6648,"a",@progbits - .align 3 - .set .LANCHOR148,. + 0 - .type __func__.6648, %object - .size __func__.6648, 31 -__func__.6648: - .string "Ftl_write_map_blk_to_last_page" - .section .rodata.__func__.6662,"a",@progbits - .align 3 - .set .LANCHOR149,. + 0 - .type __func__.6662, %object - .size __func__.6662, 16 -__func__.6662: - .string "FtlMapWritePage" - .section .rodata.__func__.6687,"a",@progbits - .align 3 - .set .LANCHOR57,. + 0 - .type __func__.6687, %object - .size __func__.6687, 22 -__func__.6687: - .string "select_l2p_ram_region" - .section .rodata.__func__.6704,"a",@progbits - .align 3 - .set .LANCHOR153,. + 0 - .type __func__.6704, %object - .size __func__.6704, 9 -__func__.6704: - .string "log2phys" - .section .rodata.__func__.6768,"a",@progbits - .align 3 - .set .LANCHOR165,. + 0 - .type __func__.6768, %object - .size __func__.6768, 15 -__func__.6768: - .string "FtlVpcTblFlush" - .section .rodata.__func__.6790,"a",@progbits - .align 3 - .set .LANCHOR140,. + 0 - .type __func__.6790, %object - .size __func__.6790, 14 -__func__.6790: - .string "FtlScanSysBlk" - .section .rodata.__func__.6846,"a",@progbits - .align 3 - .set .LANCHOR178,. + 0 - .type __func__.6846, %object - .size __func__.6846, 15 -__func__.6846: - .string "FtlLoadSysInfo" - .section .rodata.__func__.6868,"a",@progbits - .align 3 - .set .LANCHOR180,. + 0 - .type __func__.6868, %object - .size __func__.6868, 18 -__func__.6868: - .string "FtlMapTblRecovery" - .section .rodata.__func__.6914,"a",@progbits - .align 3 - .set .LANCHOR154,. + 0 - .type __func__.6914, %object - .size __func__.6914, 16 -__func__.6914: - .string "FtlReUsePrevPpa" - .section .rodata.__func__.6948,"a",@progbits - .align 3 - .set .LANCHOR155,. + 0 - .type __func__.6948, %object - .size __func__.6948, 22 -__func__.6948: - .string "FtlRecoverySuperblock" - .section .rodata.__func__.7005,"a",@progbits - .align 3 - .set .LANCHOR60,. + 0 - .type __func__.7005, %object - .size __func__.7005, 16 -__func__.7005: - .string "make_superblock" - .section .rodata.__func__.7026,"a",@progbits - .align 3 - .set .LANCHOR136,. + 0 - .type __func__.7026, %object - .size __func__.7026, 18 -__func__.7026: - .string "SupperBlkListInit" - .section .rodata.__func__.7053,"a",@progbits - .align 3 - .set .LANCHOR159,. + 0 - .type __func__.7053, %object - .size __func__.7053, 14 -__func__.7053: - .string "ftl_check_vpc" - .section .rodata.__func__.7118,"a",@progbits - .align 3 - .set .LANCHOR144,. + 0 - .type __func__.7118, %object - .size __func__.7118, 25 -__func__.7118: - .string "allocate_data_superblock" - .section .rodata.__func__.7139,"a",@progbits + .section .rodata.__func__.6357,"a",@progbits .align 3 .set .LANCHOR168,. + 0 - .type __func__.7139, %object - .size __func__.7139, 29 -__func__.7139: - .string "allocate_new_data_superblock" - .section .rodata.__func__.7146,"a",@progbits + .type __func__.6357, %object + .size __func__.6357, 13 +__func__.6357: + .string "FtlProgPages" + .section .rodata.__func__.6385,"a",@progbits .align 3 - .set .LANCHOR61,. + 0 - .type __func__.7146, %object - .size __func__.7146, 19 -__func__.7146: - .string "get_new_active_ppa" - .section .rodata.__func__.7159,"a",@progbits + .set .LANCHOR176,. + 0 + .type __func__.6385, %object + .size __func__.6385, 9 +__func__.6385: + .string "FtlWrite" + .section .rodata.__func__.6467,"a",@progbits .align 3 - .set .LANCHOR146,. + 0 - .type __func__.7159, %object - .size __func__.7159, 16 -__func__.7159: - .string "update_vpc_list" - .section .rodata.__func__.7166,"a",@progbits + .set .LANCHOR127,. + 0 + .type __func__.6467, %object + .size __func__.6467, 14 +__func__.6467: + .string "FtlBbt2Bitmap" + .section .rodata.__func__.6502,"a",@progbits + .align 3 + .set .LANCHOR140,. + 0 + .type __func__.6502, %object + .size __func__.6502, 11 +__func__.6502: + .string "FtlLoadBbt" + .section .rodata.__func__.6617,"a",@progbits + .align 3 + .set .LANCHOR48,. + 0 + .type __func__.6617, %object + .size __func__.6617, 17 +__func__.6617: + .string "INSERT_FREE_LIST" + .section .rodata.__func__.6622,"a",@progbits + .align 3 + .set .LANCHOR44,. + 0 + .type __func__.6622, %object + .size __func__.6622, 17 +__func__.6622: + .string "INSERT_DATA_LIST" + .section .rodata.__func__.6653,"a",@progbits + .align 3 + .set .LANCHOR49,. + 0 + .type __func__.6653, %object + .size __func__.6653, 17 +__func__.6653: + .string "List_remove_node" + .section .rodata.__func__.6685,"a",@progbits + .align 3 + .set .LANCHOR53,. + 0 + .type __func__.6685, %object + .size __func__.6685, 22 +__func__.6685: + .string "List_update_data_list" + .section .rodata.__func__.6694,"a",@progbits + .align 3 + .set .LANCHOR149,. + 0 + .type __func__.6694, %object + .size __func__.6694, 16 +__func__.6694: + .string "load_l2p_region" + .section .rodata.__func__.6727,"a",@progbits + .align 3 + .set .LANCHOR80,. + 0 + .type __func__.6727, %object + .size __func__.6727, 26 +__func__.6727: + .string "ftl_map_blk_alloc_new_blk" + .section .rodata.__func__.6738,"a",@progbits + .align 3 + .set .LANCHOR150,. + 0 + .type __func__.6738, %object + .size __func__.6738, 15 +__func__.6738: + .string "ftl_map_blk_gc" + .section .rodata.__func__.6753,"a",@progbits .align 3 .set .LANCHOR147,. + 0 - .type __func__.7166, %object - .size __func__.7166, 20 -__func__.7166: + .type __func__.6753, %object + .size __func__.6753, 31 +__func__.6753: + .string "Ftl_write_map_blk_to_last_page" + .section .rodata.__func__.6767,"a",@progbits + .align 3 + .set .LANCHOR148,. + 0 + .type __func__.6767, %object + .size __func__.6767, 16 +__func__.6767: + .string "FtlMapWritePage" + .section .rodata.__func__.6792,"a",@progbits + .align 3 + .set .LANCHOR56,. + 0 + .type __func__.6792, %object + .size __func__.6792, 22 +__func__.6792: + .string "select_l2p_ram_region" + .section .rodata.__func__.6809,"a",@progbits + .align 3 + .set .LANCHOR152,. + 0 + .type __func__.6809, %object + .size __func__.6809, 9 +__func__.6809: + .string "log2phys" + .section .rodata.__func__.6873,"a",@progbits + .align 3 + .set .LANCHOR164,. + 0 + .type __func__.6873, %object + .size __func__.6873, 15 +__func__.6873: + .string "FtlVpcTblFlush" + .section .rodata.__func__.6895,"a",@progbits + .align 3 + .set .LANCHOR139,. + 0 + .type __func__.6895, %object + .size __func__.6895, 14 +__func__.6895: + .string "FtlScanSysBlk" + .section .rodata.__func__.6944,"a",@progbits + .align 3 + .set .LANCHOR177,. + 0 + .type __func__.6944, %object + .size __func__.6944, 15 +__func__.6944: + .string "FtlLoadSysInfo" + .section .rodata.__func__.6966,"a",@progbits + .align 3 + .set .LANCHOR179,. + 0 + .type __func__.6966, %object + .size __func__.6966, 18 +__func__.6966: + .string "FtlMapTblRecovery" + .section .rodata.__func__.7012,"a",@progbits + .align 3 + .set .LANCHOR153,. + 0 + .type __func__.7012, %object + .size __func__.7012, 16 +__func__.7012: + .string "FtlReUsePrevPpa" + .section .rodata.__func__.7046,"a",@progbits + .align 3 + .set .LANCHOR154,. + 0 + .type __func__.7046, %object + .size __func__.7046, 22 +__func__.7046: + .string "FtlRecoverySuperblock" + .section .rodata.__func__.7103,"a",@progbits + .align 3 + .set .LANCHOR59,. + 0 + .type __func__.7103, %object + .size __func__.7103, 16 +__func__.7103: + .string "make_superblock" + .section .rodata.__func__.7124,"a",@progbits + .align 3 + .set .LANCHOR135,. + 0 + .type __func__.7124, %object + .size __func__.7124, 18 +__func__.7124: + .string "SupperBlkListInit" + .section .rodata.__func__.7151,"a",@progbits + .align 3 + .set .LANCHOR158,. + 0 + .type __func__.7151, %object + .size __func__.7151, 14 +__func__.7151: + .string "ftl_check_vpc" + .section .rodata.__func__.7216,"a",@progbits + .align 3 + .set .LANCHOR143,. + 0 + .type __func__.7216, %object + .size __func__.7216, 25 +__func__.7216: + .string "allocate_data_superblock" + .section .rodata.__func__.7237,"a",@progbits + .align 3 + .set .LANCHOR167,. + 0 + .type __func__.7237, %object + .size __func__.7237, 29 +__func__.7237: + .string "allocate_new_data_superblock" + .section .rodata.__func__.7244,"a",@progbits + .align 3 + .set .LANCHOR60,. + 0 + .type __func__.7244, %object + .size __func__.7244, 19 +__func__.7244: + .string "get_new_active_ppa" + .section .rodata.__func__.7257,"a",@progbits + .align 3 + .set .LANCHOR145,. + 0 + .type __func__.7257, %object + .size __func__.7257, 16 +__func__.7257: + .string "update_vpc_list" + .section .rodata.__func__.7264,"a",@progbits + .align 3 + .set .LANCHOR146,. + 0 + .type __func__.7264, %object + .size __func__.7264, 20 +__func__.7264: .string "decrement_vpc_count" - .section .rodata.__func__.7236,"a",@progbits + .section .rodata.__func__.7334,"a",@progbits .align 3 - .set .LANCHOR170,. + 0 - .type __func__.7236, %object - .size __func__.7236, 19 -__func__.7236: + .set .LANCHOR169,. + 0 + .type __func__.7334, %object + .size __func__.7334, 19 +__func__.7334: .string "FtlGcFreeTempBlock" - .section .rodata.__func__.7335,"a",@progbits + .section .rodata.__func__.7433,"a",@progbits .align 3 - .set .LANCHOR175,. + 0 - .type __func__.7335, %object - .size __func__.7335, 23 -__func__.7335: + .set .LANCHOR174,. + 0 + .type __func__.7433, %object + .size __func__.7433, 23 +__func__.7433: .string "rk_ftl_garbage_collect" - .section .rodata.__func__.7607,"a",@progbits + .section .rodata.__func__.7701,"a",@progbits .align 3 - .set .LANCHOR137,. + 0 - .type __func__.7607, %object - .size __func__.7607, 15 -__func__.7607: + .set .LANCHOR136,. + 0 + .type __func__.7701, %object + .size __func__.7701, 15 +__func__.7701: .string "FlashReadPages" - .section .rodata.__func__.7626,"a",@progbits + .section .rodata.__func__.7720,"a",@progbits .align 3 - .set .LANCHOR142,. + 0 - .type __func__.7626, %object - .size __func__.7626, 15 -__func__.7626: + .set .LANCHOR141,. + 0 + .type __func__.7720, %object + .size __func__.7720, 15 +__func__.7720: .string "FlashProgPages" - .section .rodata.__func__.7650,"a",@progbits + .section .rodata.__func__.7744,"a",@progbits .align 3 - .set .LANCHOR77,. + 0 - .type __func__.7650, %object - .size __func__.7650, 17 -__func__.7650: + .set .LANCHOR76,. + 0 + .type __func__.7744, %object + .size __func__.7744, 17 +__func__.7744: .string "FlashEraseBlocks" - .section .rodata.__func__.7765,"a",@progbits + .section .rodata.__func__.7863,"a",@progbits .align 3 - .set .LANCHOR185,. + 0 - .type __func__.7765, %object - .size __func__.7765, 14 -__func__.7765: + .set .LANCHOR184,. + 0 + .type __func__.7863, %object + .size __func__.7863, 14 +__func__.7863: .string "FtlWriteToIDB" .section .rodata.decrement_vpc_count.str1.1,"aMS",@progbits,1 .LC21: @@ -13219,7 +13136,7 @@ __func__.7765: .LC33: .string "scan lpa = %x ppa= %x\n" .LC34: - .string "lba = %x,addr= %x,spare= %x %x %x %x data=%x %x\n" + .string "lpa = %x,addr= %x,spare= %x %x %x %x data=%x %x\n" .section .rodata.load_l2p_region.str1.1,"aMS",@progbits,1 .LC24: .string "region_id = %x phyAddr = %x\n" @@ -13243,5 +13160,5 @@ __func__.7765: .string "\n" .section .rodata.sftl_init.str1.1,"aMS",@progbits,1 .LC49: - .string "SFTL version: 5.0.51 20191028" + .string "SFTL version: 5.0.55 20200925" .hidden free