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net: dwc_eth_qos: Fix the reset for RGMII 

When using rgmii Gigabit mode, the wait_for_bit_le32()
reset method resulting in RX can not receive data, after
this patch, works well.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: Id1d2405397d0c2f59b7bf1e341cdf66b023e4226
This commit is contained in:
David Wu 2020-06-01 17:21:11 +08:00 committed by Joseph Chen
parent 23ca6f743c
commit a494aeaa44
1 changed files with 12 additions and 5 deletions
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17
drivers/net/dwc_eth_qos.c
View File

@ -1114,7 +1114,7 @@ static int eqos_read_rom_hwaddr(struct udevice *dev)
int eqos_init(struct udevice *dev) int eqos_init(struct udevice *dev)
{ {
struct eqos_priv *eqos = dev_get_priv(dev); struct eqos_priv *eqos = dev_get_priv(dev);
int ret; int ret, limit = 10;
ulong rate; ulong rate;
u32 val; u32 val;
@ -1138,10 +1138,17 @@ int eqos_init(struct udevice *dev)
eqos->reg_access_ok = true; eqos->reg_access_ok = true;
ret = wait_for_bit_le32(&eqos->dma_regs->mode, /* DMA SW reset */
EQOS_DMA_MODE_SWR, false, val = readl(&eqos->dma_regs->mode);
eqos->config->swr_wait, false); val |= EQOS_DMA_MODE_SWR;
if (ret) { writel(val, &eqos->dma_regs->mode);
while (limit--) {
if (!(readl(&eqos->dma_regs->mode) & EQOS_DMA_MODE_SWR))
break;
mdelay(10);
}
if (limit < 0) {
pr_err("EQOS_DMA_MODE_SWR stuck"); pr_err("EQOS_DMA_MODE_SWR stuck");
goto err_stop_resets; goto err_stop_resets;
} }