diff --git a/drivers/video/drm/analogix_dp.c b/drivers/video/drm/analogix_dp.c index 1603c2f987..1b32bf3a18 100644 --- a/drivers/video/drm/analogix_dp.c +++ b/drivers/video/drm/analogix_dp.c @@ -84,7 +84,7 @@ static void analogix_dp_training_pattern_dis(struct analogix_dp_device *dp) static int analogix_dp_link_start(struct analogix_dp_device *dp) { u8 buf[4]; - int lane, lane_count, pll_tries, retval; + int lane, lane_count, retval; lane_count = dp->link_train.lane_count; @@ -112,18 +112,6 @@ static int analogix_dp_link_start(struct analogix_dp_device *dp) DP_TRAIN_PRE_EMPH_LEVEL_0; analogix_dp_set_lane_link_training(dp); - /* Wait for PLL lock */ - pll_tries = 0; - while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { - if (pll_tries == DP_TIMEOUT_LOOP_COUNT) { - dev_err(dp->dev, "Wait for PLL lock timed out\n"); - return -ETIMEDOUT; - } - - pll_tries++; - udelay(120); - } - /* Set training pattern 1 */ analogix_dp_set_training_pattern(dp, TRAINING_PTN1); diff --git a/drivers/video/drm/analogix_dp_reg.c b/drivers/video/drm/analogix_dp_reg.c index a3199eabb4..f129a37921 100644 --- a/drivers/video/drm/analogix_dp_reg.c +++ b/drivers/video/drm/analogix_dp_reg.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "rockchip_display.h" #include "rockchip_crtc.h" @@ -357,7 +358,6 @@ void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, void analogix_dp_init_analog_func(struct analogix_dp_device *dp) { u32 reg; - int timeout_loop = 0; analogix_dp_set_analog_power_down(dp, POWER_ALL, 0); @@ -369,19 +369,7 @@ void analogix_dp_init_analog_func(struct analogix_dp_device *dp) analogix_dp_write(dp, ANALOGIX_DP_DEBUG_CTL, reg); /* Power up PLL */ - if (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { - analogix_dp_set_pll_power_down(dp, 0); - - while (analogix_dp_get_pll_lock_status(dp) == PLL_UNLOCKED) { - timeout_loop++; - if (timeout_loop > DP_TIMEOUT_LOOP_COUNT) { - dev_err(dp->dev, - "failed to get pll lock status\n"); - return; - } - udelay(20); - } - } + analogix_dp_set_pll_power_down(dp, 0); /* Enable Serdes FIFO function and Link symbol clock domain module */ reg = analogix_dp_read(dp, ANALOGIX_DP_FUNC_EN_2); @@ -920,11 +908,20 @@ int analogix_dp_read_bytes_from_i2c(struct analogix_dp_device *dp, void analogix_dp_set_link_bandwidth(struct analogix_dp_device *dp, u32 bwtype) { - u32 reg; + u32 reg, status; + int ret; reg = bwtype; if ((bwtype == DP_LINK_BW_2_7) || (bwtype == DP_LINK_BW_1_62)) analogix_dp_write(dp, ANALOGIX_DP_LINK_BW_SET, reg); + + ret = readx_poll_timeout(analogix_dp_get_pll_lock_status, dp, status, + status != PLL_UNLOCKED, + 120 * DP_TIMEOUT_LOOP_COUNT); + if (ret) { + dev_err(dp->dev, "Wait for pll lock failed %d\n", ret); + return; + } } void analogix_dp_get_link_bandwidth(struct analogix_dp_device *dp, u32 *bwtype)