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arm: dts: rockchip: enable quad mode for spi-nor read 

Standard read/write mode:

=> sf test 0x8000 0x200000
SPI flash test:
0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
3 read: 355 ticks, 5769 KiB/s 46.152 Mbps
Test passed
0 erase: 14078 ticks, 145 KiB/s 1.160 Mbps
1 check: 484 ticks, 4231 KiB/s 33.848 Mbps
2 write: 4914 ticks, 416 KiB/s 3.328 Mbps
3 read: 355 ticks, 5769 KiB/s 46.152 Mbps

Quad mode read
Standard mode write:

=> sf test 0x0 0x500000
SPI flash test:
0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
3 read: 231 ticks, 22164 KiB/s 177.312 Mbps
Test passed
0 erase: 35738 ticks, 143 KiB/s 1.144 Mbps
1 check: 555 ticks, 9225 KiB/s 73.800 Mbps
2 write: 12291 ticks, 416 KiB/s 3.328 Mbps
3 read: 231 ticks, 22164 KiB/s 177.312 Mbps

Change-Id: I39e49778dd503de9836099990fd1186771c08546
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
This commit is contained in:
Andy Yan 2018-02-01 10:57:51 +08:00 committed by Kever Yang
parent 30f161d100
commit be63f83e22
1 changed files with 1 additions and 1 deletions
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2
arch/arm/dts/rv1108-evb.dts
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@ -49,7 +49,7 @@
compatible = "gd25q256","spi-flash"; compatible = "gd25q256","spi-flash";
reg = <0>; reg = <0>;
spi-tx-bus-width = <1>; spi-tx-bus-width = <1>;
spi-rx-bus-width = <1>; spi-rx-bus-width = <4>;
spi-max-frequency = <96000000>; spi-max-frequency = <96000000>;
}; };
}; };