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atmel, at91: fix smartweb board 

since commit: f8b7fff1d5 "serial: atmel_usart: Add clk support"

smartweb board comes not up anymore. Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Wenyou Yang <wenyou.yang@microchip.com>
This commit is contained in:
Heiko Schocher 2017-06-23 20:13:59 +02:00 committed by Tom Rini
parent 2fa5130d46
commit be884598da
4 changed files with 8 additions and 9 deletions
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2
arch/arm/dts/at91sam9260-smartweb.dts
View File

@ -18,6 +18,7 @@
compatible = "atmel,at91sam9260", "atmel,at91sam9"; compatible = "atmel,at91sam9260", "atmel,at91sam9";
chosen { chosen {
u-boot,dm-pre-reloc;
stdout-path = &dbgu; stdout-path = &dbgu;
}; };
@ -48,6 +49,7 @@
}; };
dbgu: serial@fffff200 { dbgu: serial@fffff200 {
u-boot,dm-pre-reloc;
status = "okay"; status = "okay";
}; };

9
board/siemens/smartweb/smartweb.c
View File

@ -256,12 +256,3 @@ void mem_init(void)
sdramc_initialize(ATMEL_BASE_CS1, &setting); sdramc_initialize(ATMEL_BASE_CS1, &setting);
} }
#endif #endif
static struct atmel_serial_platdata at91sam9260_serial_plat = {
.base_addr = ATMEL_BASE_DBGU,
};
U_BOOT_DEVICE(at91sam9260_serial) = {
.name = "serial_atmel",
.platdata = &at91sam9260_serial_plat,
};

3
configs/smartweb_defconfig
View File

@ -7,6 +7,7 @@ CONFIG_TARGET_SMARTWEB=y
CONFIG_SPL_GPIO_SUPPORT=y CONFIG_SPL_GPIO_SUPPORT=y
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_SUPPORT=y
CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb"
CONFIG_FIT=y CONFIG_FIT=y
@ -33,6 +34,8 @@ CONFIG_CMD_FAT=y
# CONFIG_DOS_PARTITION is not set # CONFIG_DOS_PARTITION is not set
CONFIG_OF_CONTROL=y CONFIG_OF_CONTROL=y
CONFIG_OF_EMBED=y CONFIG_OF_EMBED=y
CONFIG_CLK=y
CONFIG_CLK_AT91=y
CONFIG_DFU_NAND=y CONFIG_DFU_NAND=y
# CONFIG_MMC is not set # CONFIG_MMC is not set
CONFIG_USB=y CONFIG_USB=y

3
include/configs/smartweb.h
View File

@ -211,6 +211,9 @@
#define CONFIG_SYS_INIT_SP_ADDR 0x301000 #define CONFIG_SYS_INIT_SP_ADDR 0x301000
#define CONFIG_SPL_STACK_R #define CONFIG_SPL_STACK_R
#define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE #define CONFIG_SPL_STACK_R_ADDR CONFIG_SYS_TEXT_BASE
/* we have only 4k sram in SPL, so cut SYS_MALLOC_F_LEN */
#undef CONFIG_SYS_MALLOC_F_LEN
#define CONFIG_SYS_MALLOC_F_LEN 0x400
#else #else
/* /*
* Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM, * Initial stack pointer: 4k - GENERATED_GBL_DATA_SIZE in internal SRAM,