From bf98386f4f2904e95414101bca1c853ee600ee01 Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 23 Jan 2018 16:15:17 +0800 Subject: [PATCH] rockchip: sdram: update dram_init_banksize for secure reserve Reserve memory only when there is reserve mem info at TRUST_PARAMETER_OFFSET, both ARM64 and ARM32 need to do this. Change-Id: I14370b92a4f4446482d5c241b85d1588acea14b5 Signed-off-by: Kever Yang --- arch/arm/mach-rockchip/sdram_common.c | 37 +++++++++------------------ 1 file changed, 12 insertions(+), 25 deletions(-) diff --git a/arch/arm/mach-rockchip/sdram_common.c b/arch/arm/mach-rockchip/sdram_common.c index e9d2404d98..b1528dfd4e 100644 --- a/arch/arm/mach-rockchip/sdram_common.c +++ b/arch/arm/mach-rockchip/sdram_common.c @@ -44,38 +44,25 @@ int dram_init_banksize(void) { size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE), gd->ram_top); - -#ifdef CONFIG_ARM64 - /* Reserve 0x200000 for ATF bl31 */ - gd->bd->bi_dram[0].start = 0x200000; - gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; -#else -#ifdef CONFIG_SPL_OPTEE struct tos_parameter_t *tos_parameter; tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE + TRUST_PARAMETER_OFFSET); - if (tos_parameter->tee_mem.flags == 1) { - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr - - CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + - tos_parameter->tee_mem.size; - gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start - + top - gd->bd->bi_dram[1].start; - } else { - gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; - gd->bd->bi_dram[0].size = 0x8400000; - /* Reserve 32M for OPTEE with TA */ - gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE - + gd->bd->bi_dram[0].size + 0x2000000; - gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start - + top - gd->bd->bi_dram[1].start; - } + +#ifdef CONFIG_ARM64 + /* Reserve 0x200000 for ATF bl31 */ + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000; + gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; #else gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; #endif -#endif + if (tos_parameter->tee_mem.flags == 1) { + gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr + - gd->bd->bi_dram[0].start; + gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + + tos_parameter->tee_mem.size; + gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start; + } return 0; }