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rockchip: sdram: update dram_init_banksize for secure reserve 

Reserve memory only when there is reserve mem info at TRUST_PARAMETER_OFFSET,
both ARM64 and ARM32 need to do this.

Change-Id: I14370b92a4f4446482d5c241b85d1588acea14b5
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2018-01-23 16:15:17 +08:00
parent bb1716ec8e
commit bf98386f4f
1 changed files with 12 additions and 25 deletions
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37
arch/arm/mach-rockchip/sdram_common.c
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@ -44,38 +44,25 @@ int dram_init_banksize(void)
{ {
size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE), size_t top = min((unsigned long)(gd->ram_size + CONFIG_SYS_SDRAM_BASE),
gd->ram_top); gd->ram_top);
#ifdef CONFIG_ARM64
/* Reserve 0x200000 for ATF bl31 */
gd->bd->bi_dram[0].start = 0x200000;
gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
#else
#ifdef CONFIG_SPL_OPTEE
struct tos_parameter_t *tos_parameter; struct tos_parameter_t *tos_parameter;
tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE + tos_parameter = (struct tos_parameter_t *)(CONFIG_SYS_SDRAM_BASE +
TRUST_PARAMETER_OFFSET); TRUST_PARAMETER_OFFSET);
if (tos_parameter->tee_mem.flags == 1) {
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; #ifdef CONFIG_ARM64
gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr /* Reserve 0x200000 for ATF bl31 */
- CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE + 0x200000;
gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr + gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
tos_parameter->tee_mem.size;
gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+ top - gd->bd->bi_dram[1].start;
} else {
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = 0x8400000;
/* Reserve 32M for OPTEE with TA */
gd->bd->bi_dram[1].start = CONFIG_SYS_SDRAM_BASE
+ gd->bd->bi_dram[0].size + 0x2000000;
gd->bd->bi_dram[1].size = gd->bd->bi_dram[0].start
+ top - gd->bd->bi_dram[1].start;
}
#else #else
gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start; gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
#endif #endif
#endif if (tos_parameter->tee_mem.flags == 1) {
gd->bd->bi_dram[0].size = tos_parameter->tee_mem.phy_addr
- gd->bd->bi_dram[0].start;
gd->bd->bi_dram[1].start = tos_parameter->tee_mem.phy_addr +
tos_parameter->tee_mem.size;
gd->bd->bi_dram[1].size = top - gd->bd->bi_dram[1].start;
}
return 0; return 0;
} }