ARM: Introduce function to switch to hypervisor mode
On some of the SoCs one cannot enable hypervisor mode directly from the u-boot because the ROM code puts the chip to supervisor mode after it jumps to boot loader. Hence introduce a weak function which can be overridden based on the SoC type and switch to hypervisor mode in a custom way. Cc: beagleboard-x15@googlegroups.com Signed-off-by: Keerthy <j-keerthy@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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@ -17,6 +17,7 @@
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#include <config.h>
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#include <config.h>
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#include <asm/system.h>
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#include <asm/system.h>
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#include <linux/linkage.h>
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#include <linux/linkage.h>
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#include <asm/armv7.h>
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/*************************************************************************
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/*************************************************************************
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*
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*
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@ -30,11 +31,24 @@
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.globl reset
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.globl reset
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.globl save_boot_params_ret
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.globl save_boot_params_ret
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#ifdef CONFIG_ARMV7_LPAE
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.global switch_to_hypervisor_ret
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#endif
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reset:
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reset:
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/* Allow the board to save important registers */
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/* Allow the board to save important registers */
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b save_boot_params
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b save_boot_params
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save_boot_params_ret:
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save_boot_params_ret:
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#ifdef CONFIG_ARMV7_LPAE
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/*
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* check for Hypervisor support
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*/
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mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
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and r0, r0, #CPUID_ARM_VIRT_MASK @ mask virtualization bits
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cmp r0, #(1 << CPUID_ARM_VIRT_SHIFT)
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beq switch_to_hypervisor
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switch_to_hypervisor_ret:
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#endif
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/*
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/*
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* disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
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* disable interrupts (FIQ and IRQ), also set the cpu to SVC32 mode,
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* except if in HYP mode already
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* except if in HYP mode already
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@ -103,6 +117,13 @@ ENTRY(save_boot_params)
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ENDPROC(save_boot_params)
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ENDPROC(save_boot_params)
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.weak save_boot_params
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.weak save_boot_params
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#ifdef CONFIG_ARMV7_LPAE
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ENTRY(switch_to_hypervisor)
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b switch_to_hypervisor_ret
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ENDPROC(switch_to_hypervisor)
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.weak switch_to_hypervisor
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#endif
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/*************************************************************************
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/*************************************************************************
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*
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*
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* cpu_init_cp15
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* cpu_init_cp15
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@ -223,6 +223,10 @@ void __noreturn psci_system_reset(bool smc);
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*/
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*/
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void save_boot_params_ret(void);
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void save_boot_params_ret(void);
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#ifdef CONFIG_ARMV7_LPAE
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void switch_to_hypervisor_ret(void);
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#endif
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#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
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#define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t");
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#ifdef __ARM_ARCH_7A__
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#ifdef __ARM_ARCH_7A__
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