arm: irq: do not enable irq in SPL/TPL

Change-Id: I6a9b8b883ede2e45e2c5760c633f04bd9ab4fe4e
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2017-11-09 19:34:04 -08:00
parent cd5a540c8a
commit f4fc5f8dd3
7 changed files with 11 additions and 11 deletions

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@ -231,7 +231,7 @@ ENDPROC(apply_core_errata)
WEAK(lowlevel_init) WEAK(lowlevel_init)
mov x29, lr /* Save LR */ mov x29, lr /* Save LR */
#if defined(CONFIG_GICV2) || defined(CONFIG_GICV3) #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
branch_if_slave x0, 1f branch_if_slave x0, 1f
ldr x0, =GICD_BASE ldr x0, =GICD_BASE
bl gic_init_secure bl gic_init_secure
@ -246,7 +246,7 @@ WEAK(lowlevel_init)
#endif #endif
#endif #endif
#if defined(CONFIG_IRQ) #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
/* /*
* Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2 * Setting HCR_EL2.TGE AMO IMO FMO for exception rounting to EL2
*/ */

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@ -108,7 +108,7 @@ ENTRY(gic_init_secure_percpu)
mov w11, #0x1 /* Enable SGI 0 */ mov w11, #0x1 /* Enable SGI 0 */
str w11, [x10, GICR_ISENABLERn] str w11, [x10, GICR_ISENABLERn]
#ifdef CONFIG_IRQ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
/* Rockchip: check elx */ /* Rockchip: check elx */
switch_el x0, el3_sre, el2_sre, el1_sre switch_el x0, el3_sre, el2_sre, el1_sre

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@ -26,7 +26,7 @@
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
#ifndef CONFIG_IRQ #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
int interrupt_init (void) int interrupt_init (void)
{ {
/* /*
@ -156,7 +156,7 @@ void do_fiq (struct pt_regs *pt_regs)
bad_mode (); bad_mode ();
} }
#ifndef CONFIG_IRQ #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
void do_irq (struct pt_regs *pt_regs) void do_irq (struct pt_regs *pt_regs)
{ {
efi_restore_gd(); efi_restore_gd();

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@ -9,7 +9,7 @@
#include <linux/compiler.h> #include <linux/compiler.h>
#include <efi_loader.h> #include <efi_loader.h>
#ifndef CONFIG_IRQ #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
int interrupt_init(void) int interrupt_init(void)
{ {
return 0; return 0;
@ -93,7 +93,7 @@ void do_sync(struct pt_regs *pt_regs, unsigned int esr)
panic("Resetting CPU ...\n"); panic("Resetting CPU ...\n");
} }
#ifndef CONFIG_IRQ #if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_IRQ)
/* /*
* do_irq handles the Irq exception. * do_irq handles the Irq exception.
*/ */

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@ -25,7 +25,7 @@ int arch_reserve_stacks(void)
gd->irq_sp = gd->start_addr_sp; gd->irq_sp = gd->start_addr_sp;
# if !defined(CONFIG_ARM64) # if !defined(CONFIG_ARM64)
#ifdef CONFIG_IRQ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
#ifndef CONFIG_IRQ_STACK_SIZE #ifndef CONFIG_IRQ_STACK_SIZE
#define CONFIG_IRQ_STACK_SIZE 8192 #define CONFIG_IRQ_STACK_SIZE 8192
#endif #endif

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@ -147,7 +147,7 @@ IRQ_STACK_START_IN:
.word 0x0badc0de .word 0x0badc0de
#endif #endif
#ifdef CONFIG_IRQ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
/* IRQ stack memory (calculated at run-time) */ /* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START .globl IRQ_STACK_START
IRQ_STACK_START: IRQ_STACK_START:
@ -280,7 +280,7 @@ not_used:
.align 5 .align 5
irq: irq:
#ifdef CONFIG_IRQ #if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_IRQ)
get_irq_stack get_irq_stack
irq_save_user_regs irq_save_user_regs
bl do_irq bl do_irq

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@ -16,7 +16,7 @@ obj-$(CONFIG_$(SPL_TPL_)SERIAL_SUPPORT) += serial/
obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPORT) += mtd/spi/
obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/ obj-$(CONFIG_$(SPL_TPL_)SPI_SUPPORT) += spi/
obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/ obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
obj-$(CONFIG_IRQ) += irq/ obj-$(CONFIG_$(SPL_TPL_)IRQ) += irq/
ifndef CONFIG_TPL_BUILD ifndef CONFIG_TPL_BUILD
ifdef CONFIG_SPL_BUILD ifdef CONFIG_SPL_BUILD