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rockchip: rk3288: no need to check PLL setting. 

Remove assert to make DEBUG work.

Change-Id: Idd41066f98c759b4fefe25c8715138c1c54df418
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This commit is contained in:
Kever Yang 2019-11-19 15:16:48 +08:00
parent ef473e3642
commit f546c94580
1 changed files with 0 additions and 3 deletions
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3
drivers/clk/rockchip/clk_rk3288.c
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@ -183,9 +183,6 @@ static int rkclk_set_pll(struct rk3288_cru *cru, enum rk_clk_id clk_id,
debug("PLL at %x: nf=%d, nr=%d, no=%d, vco=%u Hz, output=%u Hz\n",
(uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz);
assert(vco_hz >= VCO_MIN_HZ && vco_hz <= VCO_MAX_HZ &&
output_hz >= OUTPUT_MIN_HZ && output_hz <= OUTPUT_MAX_HZ &&
(div->no == 1 || !(div->no % 2)));
/* enter reset */
rk_setreg(&pll->con3, 1 << PLL_RESET_SHIFT);