From f54f4b43d9a358593f28a638c2e782b08a2d9ff7 Mon Sep 17 00:00:00 2001
From: Lin Jinhan <troy.lin@rock-chips.com>
Date: Fri, 29 Jan 2021 16:56:47 +0800
Subject: [PATCH] rockchip: dts: rv1126: modify rng & crypto node

The RNG driver is separate from the Crypto driver.

Change-Id: I51b39e337106988d5444246a53e46c27644effb0
Signed-off-by: Lin Jinhan <troy.lin@rock-chips.com>
---
 arch/arm/dts/rv1126-u-boot.dtsi | 13 +++++--------
 arch/arm/dts/rv1126.dtsi        | 21 +++++++++------------
 2 files changed, 14 insertions(+), 20 deletions(-)

diff --git a/arch/arm/dts/rv1126-u-boot.dtsi b/arch/arm/dts/rv1126-u-boot.dtsi
index 53df9e2ff3..c49fe2a010 100644
--- a/arch/arm/dts/rv1126-u-boot.dtsi
+++ b/arch/arm/dts/rv1126-u-boot.dtsi
@@ -15,14 +15,6 @@
 		u-boot,spl-boot-order = &sdmmc, &spi_nand, &spi_nor, &nandc, &emmc;
 	};
 
-	crypto: crypto@ff500000 {
-		compatible = "rockchip,rv1126-crypto";
-		reg = <0xff500000 0x10000>;
-		clock-names = "sclk_crypto", "sclk_crypto_apk";
-		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
-		clock-frequency = <200000000>, <300000000>;
-	};
-
 	secure_otp: secure_otp@0xff5d0000 {
 		compatible = "rockchip,rv1126-secure-otp";
 		reg = <0xff5d0000 0x4000>;
@@ -275,6 +267,11 @@
 	status = "okay";
 };
 
+&rng {
+	u-boot,dm-spl;
+	status = "okay";
+};
+
 &clk_out_ethernetm1_pins{
 	u-boot,dm-pre-reloc;
 	status = "okay";
diff --git a/arch/arm/dts/rv1126.dtsi b/arch/arm/dts/rv1126.dtsi
index 85cce78727..30995ddc81 100644
--- a/arch/arm/dts/rv1126.dtsi
+++ b/arch/arm/dts/rv1126.dtsi
@@ -995,20 +995,17 @@
 		status = "disabled";
 	};
 
+	crypto: crypto@ff500000 {
+		compatible = "rockchip,rv1126-crypto";
+		reg = <0xff500000 0x10000>;
+		clock-names = "sclk_crypto", "sclk_crypto_apk";
+		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>;
+		clock-frequency = <200000000>, <300000000>;
+	};
+
 	rng: rng@ff500000 {
 		compatible = "rockchip,cryptov2-rng";
-		reg = <0xff500000 0x4000>;
-		clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>,
-			<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
-		clock-names = "clk_crypto", "clk_crypto_apk",
-				"aclk_crypto", "hclk_crypto";
-		assigned-clocks = <&cru CLK_CRYPTO_CORE>, <&cru CLK_CRYPTO_PKA>,
-					<&cru ACLK_CRYPTO>, <&cru HCLK_CRYPTO>;
-		assigned-clock-rates = <150000000>, <150000000>,
-					<200000000>, <100000000>;
-		power-domains = <&power RV1126_PD_CRYPTO>;
-		resets = <&cru SRST_CRYPTO_CORE>;
-		reset-names = "reset";
+		reg = <0xff500000 0x2000>;
 		status = "disabled";
 	};