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spi: spi-mem: Support dma transfer skip waiting idle 

Change-Id: Iabe9260f4c6c7edcb885f9f9a6aa55650fdfc932
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin 2020-06-30 14:12:21 +08:00 committed by Jianhong Chen
parent fa413375b7
commit f5a32af5a3
2 changed files with 7 additions and 1 deletions
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6
drivers/spi/spi-mem.c
View File

@ -374,8 +374,12 @@ int spi_mem_exec_op(struct spi_slave *slave, const struct spi_mem_op *op)
/* 2nd transfer: rx or tx data path */ /* 2nd transfer: rx or tx data path */
if (tx_buf || rx_buf) { if (tx_buf || rx_buf) {
flag = SPI_XFER_END;
if (slave->mode & SPI_DMA_PREPARE)
flag |= SPI_XFER_PREPARE;
ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf, ret = spi_xfer(slave, op->data.nbytes * 8, tx_buf,
rx_buf, SPI_XFER_END); rx_buf, flag);
if (ret) if (ret)
return ret; return ret;
} }

2
include/spi.h
View File

@ -31,6 +31,7 @@
#define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */ #define SPI_RX_SLOW BIT(11) /* receive with 1 wire slow */
#define SPI_RX_DUAL BIT(12) /* receive with 2 wires */ #define SPI_RX_DUAL BIT(12) /* receive with 2 wires */
#define SPI_RX_QUAD BIT(13) /* receive with 4 wires */ #define SPI_RX_QUAD BIT(13) /* receive with 4 wires */
#define SPI_DMA_PREPARE BIT(24) /* dma transfer skip waiting idle */
/* Header byte that marks the start of the message */ /* Header byte that marks the start of the message */
#define SPI_PREAMBLE_END_BYTE 0xec #define SPI_PREAMBLE_END_BYTE 0xec
@ -117,6 +118,7 @@ struct spi_slave {
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END) #define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
#define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */ #define SPI_XFER_MMAP BIT(2) /* Memory Mapped start */
#define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */ #define SPI_XFER_MMAP_END BIT(3) /* Memory Mapped End */
#define SPI_XFER_PREPARE BIT(7) /* Transfer skip waiting idle */
}; };
/** /**