rockchip: rk3568: Enable FSPI secure
Change-Id: Id46debc74bfac7060244079582b06b35817b51cd Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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@ -35,6 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
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#define CRU_SOFTRST_CON26 0x468
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#define CRU_SOFTRST_CON28 0x470
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#define SGRF_BASE 0xFDD18000
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#define SGRF_SOC_CON3 0xC
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#define SGRF_SOC_CON4 0x10
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#define PMUGRF_SOC_CON15 0xfdc20100
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#define CPU_GRF_BASE 0xfdc30000
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@ -814,6 +815,11 @@ int arch_cpu_init(void)
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writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_2);
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writel(0x3f3f0707, GRF_BASE + GRF_GPIO1C_DS_3);
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#if defined(CONFIG_ROCKCHIP_SFC)
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/* Set the fspi to secure */
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writel(((0x1 << 14) << 16) | (0x0 << 14), SGRF_BASE + SGRF_SOC_CON3);
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#endif
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#ifndef CONFIG_TPL_BUILD
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/* set the fspi d0 cs0 to level 1 */
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if (get_bootdev_by_brom_bootsource() == BOOT_TYPE_SPI_NOR ||
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