From 9371a438f4be7dfddd6136e58bec2a34c531ba5a Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Wed, 22 Apr 2020 09:26:50 +0800 Subject: [PATCH 1/4] rkflash: support SNOR reinit from snor flash packet That snor_info_packet is SPI Nor information placed in IDB header area, each progress can parse it to get flash information. Change-Id: I63621a5b92c2fb85b588365d9415fbb40eece8a3 Signed-off-by: Jon Lin --- drivers/rkflash/flash_com.h | 4 +- drivers/rkflash/sfc.h | 15 +++++++ drivers/rkflash/sfc_nor.c | 90 ++++++++++++++++++++++++++++--------- drivers/rkflash/sfc_nor.h | 27 ++++++++++- 4 files changed, 113 insertions(+), 23 deletions(-) diff --git a/drivers/rkflash/flash_com.h b/drivers/rkflash/flash_com.h index b60875d382..8c23d1fd2b 100644 --- a/drivers/rkflash/flash_com.h +++ b/drivers/rkflash/flash_com.h @@ -19,8 +19,8 @@ #define NAND_IDB_START 64 /* 32 KB*/ #define NAND_IDB_SIZE 512 /* 256 KB*/ -#define NAND_IDB_END NAND_IDB_START + NAND_IDB_SIZE - 1 -#define DEFAULT_IDB_RESERVED_BLOCK 16 +#define NAND_IDB_END (NAND_IDB_START + NAND_IDB_SIZE - 1) +#define DEFAULT_IDB_RESERVED_BLOCK 8 #define FULL_SLC 0 #define SLC 1 diff --git a/drivers/rkflash/sfc.h b/drivers/rkflash/sfc.h index bcbbcc3a9f..a5c6b10c51 100644 --- a/drivers/rkflash/sfc.h +++ b/drivers/rkflash/sfc.h @@ -189,6 +189,21 @@ struct rk_sfc_op { union SFCCTRL_DATA sfctrl; }; +#define IDB_BLOCK_TAG_ID 0xFCDC8C3B + +struct id_block_tag { + u32 id; + u32 version; + u32 flags; + u16 boot_img_offset; + u8 reserved1[10]; + u32 dev_param[8]; + u8 reserved2[506 - 56]; + u16 data_img_len; + u16 boot_img_len; + u8 reserved3[512 - 510]; +} __packed; + int sfc_init(void __iomem *reg_addr); int sfc_request(struct rk_sfc_op *op, u32 addr, void *data, u32 size); u16 sfc_get_version(void); diff --git a/drivers/rkflash/sfc_nor.c b/drivers/rkflash/sfc_nor.c index d55d891212..2014fed23f 100644 --- a/drivers/rkflash/sfc_nor.c +++ b/drivers/rkflash/sfc_nor.c @@ -578,30 +578,16 @@ static void *snor_flash_info_adjust(struct flash_info *spi_flash_info) return 0; } -int snor_init(struct SFNOR_DEV *p_dev) +static int snor_parse_flash_table(struct SFNOR_DEV *p_dev, + struct flash_info *g_spi_flash_info) { - struct flash_info *g_spi_flash_info; - u32 i, ret; - u8 id_byte[5]; + int i, ret; - if (!p_dev) - return SFC_PARAM_ERR; - - memset((void *)p_dev, 0, sizeof(struct SFNOR_DEV)); - p_dev->max_iosize = sfc_get_max_iosize(); - snor_read_id(id_byte); - rkflash_print_error("sfc nor id: %x %x %x\n", - id_byte[0], id_byte[1], id_byte[2]); - if (0xFF == id_byte[0] || 0x00 == id_byte[0]) - return SFC_ERROR; - - p_dev->manufacturer = id_byte[0]; - p_dev->mem_type = id_byte[1]; - - g_spi_flash_info = snor_get_flash_info(id_byte); if (g_spi_flash_info) { snor_flash_info_adjust(g_spi_flash_info); - p_dev->capacity = 1 << g_spi_flash_info->density; + p_dev->manufacturer = (g_spi_flash_info->id >> 16) & 0xFF; + p_dev->mem_type = (g_spi_flash_info->id >> 8) & 0xFF; + p_dev->capacity = 1 << ((g_spi_flash_info->id & 0xFF) - 9); p_dev->blk_size = g_spi_flash_info->block_size; p_dev->page_size = NOR_SECS_PAGE; p_dev->read_cmd = g_spi_flash_info->read_cmd; @@ -620,6 +606,7 @@ int snor_init(struct SFNOR_DEV *p_dev) p_dev->write_status = snor_write_status1; else if (i == 2) p_dev->write_status = snor_write_status2; + if (g_spi_flash_info->feature & FEA_4BIT_READ) { ret = SFC_OK; if (g_spi_flash_info->QE_bits) @@ -640,7 +627,34 @@ int snor_init(struct SFNOR_DEV *p_dev) if ((g_spi_flash_info->feature & FEA_4BYTE_ADDR_MODE)) snor_enter_4byte_mode(); + } + + return SFC_OK; +} + +int snor_init(struct SFNOR_DEV *p_dev) +{ + struct flash_info *g_spi_flash_info; + u8 id_byte[5]; + + if (!p_dev) + return SFC_PARAM_ERR; + + memset((void *)p_dev, 0, sizeof(struct SFNOR_DEV)); + p_dev->max_iosize = sfc_get_max_iosize(); + + snor_read_id(id_byte); + rkflash_print_error("sfc nor id: %x %x %x\n", + id_byte[0], id_byte[1], id_byte[2]); + if (0xFF == id_byte[0] || 0x00 == id_byte[0]) + return SFC_ERROR; + + g_spi_flash_info = snor_get_flash_info(id_byte); + if (g_spi_flash_info) { + snor_parse_flash_table(p_dev, g_spi_flash_info); } else { + p_dev->manufacturer = id_byte[0]; + p_dev->mem_type = id_byte[1]; p_dev->capacity = 1 << (id_byte[2] - 9); p_dev->QE_bits = 0; p_dev->blk_size = NOR_SECS_BLK; @@ -652,6 +666,7 @@ int snor_init(struct SFNOR_DEV *p_dev) p_dev->prog_lines = DATA_LINES_X1; p_dev->read_lines = DATA_LINES_X1; p_dev->write_status = snor_write_status; + snor_reset_device(); } rkflash_print_info("addr_mode: %x\n", p_dev->addr_mode); @@ -661,7 +676,42 @@ int snor_init(struct SFNOR_DEV *p_dev) rkflash_print_info("prog_cmd: %x\n", p_dev->prog_cmd); rkflash_print_info("blk_erase_cmd: %x\n", p_dev->blk_erase_cmd); rkflash_print_info("sec_erase_cmd: %x\n", p_dev->sec_erase_cmd); + rkflash_print_info("capacity: %x\n", p_dev->capacity); return SFC_OK; } +int snor_reinit_from_table_packet(struct SFNOR_DEV *p_dev, + struct snor_info_packet *packet) +{ + struct flash_info g_spi_flash_info; + u8 id_byte[5]; + int ret; + + if (!p_dev || packet->id != SNOR_INFO_PACKET_ID) + return SFC_PARAM_ERR; + + snor_read_id(id_byte); + if (0xFF == id_byte[0] || 0x00 == id_byte[0]) + return SFC_ERROR; + + g_spi_flash_info.id = id_byte[0] << 16 | id_byte[1] << 8 | id_byte[2]; + g_spi_flash_info.block_size = NOR_SECS_BLK; + g_spi_flash_info.sector_size = NOR_SECS_PAGE; + g_spi_flash_info.read_cmd = packet->read_cmd; + g_spi_flash_info.prog_cmd = packet->prog_cmd; + g_spi_flash_info.read_cmd_4 = packet->read_cmd_4; + g_spi_flash_info.prog_cmd_4 = packet->prog_cmd_4; + if (id_byte[2] >= 0x19) + g_spi_flash_info.read_cmd_4 = CMD_FAST_4READ_X4; + g_spi_flash_info.sector_erase_cmd = packet->sector_erase_cmd; + g_spi_flash_info.block_erase_cmd = packet->block_erase_cmd; + g_spi_flash_info.feature = packet->feature; + g_spi_flash_info.density = id_byte[2] - 9; + g_spi_flash_info.QE_bits = packet->QE_bits; + + ret = snor_parse_flash_table(p_dev, &g_spi_flash_info); + + return ret; +} + diff --git a/drivers/rkflash/sfc_nor.h b/drivers/rkflash/sfc_nor.h index 6c91bb2eaf..e564b8ed1a 100644 --- a/drivers/rkflash/sfc_nor.h +++ b/drivers/rkflash/sfc_nor.h @@ -134,6 +134,30 @@ struct flash_info { u8 reserved2; }; +/* flash table packet for easy boot */ +#define SNOR_INFO_PACKET_ID 0x464E494E +#define SNOR_INFO_PACKET_HEAD_LEN 14 + +#define SNOR_INFO_PACKET_SPI_MODE_RATE_SHIFT 25 + +struct snor_info_packet { + u32 id; + u32 head_hash; /*hash for head, check by bootrom.*/ + u16 head_len; /*320 - 16 bytes*/ + u16 version; + u8 read_cmd; + u8 prog_cmd; + u8 read_cmd_4; + u8 prog_cmd_4; + + u8 sector_erase_cmd; + u8 block_erase_cmd; + u8 feature; + u8 QE_bits; + + u32 spi_mode; +}; + int snor_init(struct SFNOR_DEV *p_dev); u32 snor_get_capacity(struct SFNOR_DEV *p_dev); int snor_read(struct SFNOR_DEV *p_dev, u32 sec, u32 n_sec, void *p_data); @@ -146,5 +170,6 @@ int snor_prog_page(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size); int snor_read_data(struct SFNOR_DEV *p_dev, u32 addr, void *p_data, u32 size); int snor_reset_device(void); int snor_disable_QE(struct SFNOR_DEV *p_dev); - +int snor_reinit_from_table_packet(struct SFNOR_DEV *p_dev, + struct snor_info_packet *packet); #endif From f3a2c32e2d6d794daa75ce7fe560db6ccd943f45 Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Wed, 22 Apr 2020 09:55:34 +0800 Subject: [PATCH 2/4] rkflash: enable reinit SNOR from snor flash packet Change-Id: I21fa94d1ded675323a02c8a8d7073b31290bc7c7 Signed-off-by: Jon Lin --- drivers/rkflash/rkflash_api.c | 67 ++++++++++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 1 deletion(-) diff --git a/drivers/rkflash/rkflash_api.c b/drivers/rkflash/rkflash_api.c index 797b676fd4..88e1f1e8ce 100644 --- a/drivers/rkflash/rkflash_api.c +++ b/drivers/rkflash/rkflash_api.c @@ -9,14 +9,79 @@ #include "rkflash_api.h" #include "rkflash_blk.h" +#include "rkflash_debug.h" #ifdef CONFIG_RKSFC_NOR + +#define IDB_ALIGN_64 128 /* 64 KB */ +#define IDB_ALIGN_32 64 /* 32 KB */ + +static void P_RC4(u8 *buf, u16 len) +{ + u8 S[256], K[256], temp; + u16 i, j, t, x; + u8 key[16] = {124, 78, 3, 4, 85, 5, 9, 7, + 45, 44, 123, 56, 23, 13, 23, 17}; + + j = 0; + for (i = 0; i < 256; i++) { + S[i] = (u8)i; + j &= 0x0f; + K[i] = key[j]; + j++; + } + + j = 0; + for (i = 0; i < 256; i++) { + j = (j + S[i] + K[i]) % 256; + temp = S[i]; + S[i] = S[j]; + S[j] = temp; + } + + i = 0; + j = 0; + for (x = 0; x < len; x++) { + i = (i + 1) % 256; + j = (j + S[i]) % 256; + temp = S[i]; + S[i] = S[j]; + S[j] = temp; + t = (S[i] + (S[j] % 256)) % 256; + buf[x] = buf[x] ^ S[t]; + } +} + int rksfc_nor_init(struct udevice *udev) { struct rkflash_info *priv = dev_get_priv(udev); struct SFNOR_DEV *p_dev = (struct SFNOR_DEV *)&priv->flash_dev_info; + struct snor_info_packet *packet; + struct id_block_tag *idb_tag; + int ret; - return snor_init(p_dev); + ret = snor_init(p_dev); + if (ret == SFC_OK && p_dev->read_lines == DATA_LINES_X1) { + idb_tag = kzalloc(NOR_SECS_PAGE * 512, GFP_KERNEL); + if (!idb_tag) + return SFC_OK; + + if (sfc_get_version() >= SFC_VER_4) + snor_read(p_dev, IDB_ALIGN_32, NOR_SECS_PAGE, + idb_tag); + else + snor_read(p_dev, IDB_ALIGN_64, NOR_SECS_PAGE, + idb_tag); + packet = (struct snor_info_packet *)&idb_tag->dev_param[0]; + if (idb_tag->id == IDB_BLOCK_TAG_ID) { + P_RC4((u8 *)idb_tag, sizeof(struct id_block_tag)); + snor_reinit_from_table_packet(p_dev, packet); + rkflash_print_error("snor reinit, ret= %d\n", ret); + } + kfree(idb_tag); + } + + return ret; } u32 rksfc_nor_get_capacity(struct udevice *udev) From f21c060e4b287d9f35a704307e55cfa61c7ce855 Mon Sep 17 00:00:00 2001 From: Lei Chen Date: Wed, 1 Apr 2020 14:08:30 +0800 Subject: [PATCH 3/4] driver: input: update RK remote control driver This patch updates the RC driver to accommodate the new framework Signed-off-by: Lei Chen Change-Id: I3ff2b5844ce5f1776ac2f94b3cbd42eb5d73cc41 --- drivers/input/rc-uclass.c | 2 +- drivers/input/rockchip_ir.c | 71 ++++++++++++++++++++----------------- include/linux/input.h | 1 + 3 files changed, 40 insertions(+), 34 deletions(-) diff --git a/drivers/input/rc-uclass.c b/drivers/input/rc-uclass.c index 3504e48cf4..c1517a1e9e 100644 --- a/drivers/input/rc-uclass.c +++ b/drivers/input/rc-uclass.c @@ -27,7 +27,7 @@ int rc_get_repeat(struct udevice *dev) return ops->get_repeat(dev); } -UCLASS_DRIVER(key) = { +UCLASS_DRIVER(rc) = { .id = UCLASS_RC, .name = "rc", }; diff --git a/drivers/input/rockchip_ir.c b/drivers/input/rockchip_ir.c index 6579284b9e..511ecf800b 100644 --- a/drivers/input/rockchip_ir.c +++ b/drivers/input/rockchip_ir.c @@ -1,11 +1,11 @@ /* * (C) Copyright 2017 Rockchip Electronics Co., Ltd * - * SPDX-License-Identifier: GPL-2.0+ + * SPDX-License-Identifier: GPL-2.0+ */ -#include #include +#include #include #include #include @@ -19,7 +19,7 @@ #include #include - +#include DECLARE_GLOBAL_DATA_PTR; static struct nec_dec nec; @@ -71,26 +71,29 @@ static int ir_parse_keys(struct udevice *dev) int i, j; int len; int ret; - int subnode; - int node = dev_of_offset(dev); - const void *blob = gd->fdt_blob; + u32 val; + ofnode node; i = 0; - fdt_for_each_subnode(subnode, blob, node) { - rc_map[i].usercode = fdtdec_get_uint(blob, subnode, - "rockchip,usercode", - 1234u); - if (rc_map[i].usercode == 1234u) { + dev_for_each_subnode(node, dev) { + ret = ofnode_read_u32(node, "rockchip,usercode", &val); + if (ret) { + debug("unable to get usercode\n"); + return -1; + } + rc_map[i].usercode = val; + if (rc_map[i].usercode == 0) { debug("missing usercode property in the dts\n"); return -1; } debug("add new usercode:0x%x\n", rc_map[i].usercode); - fdt_get_property(blob, subnode, "rockchip,key_table", &len); + len = ofnode_read_size(node, "rockchip,key_table"); len /= sizeof(u32); debug("len:%d\n", len); rc_map[i].nbuttons = len / 2; - ret = fdtdec_get_int_array(blob, subnode, "rockchip,key_table", - (u32 *)rc_map[i].scan, len); + + ret = ofnode_read_u32_array(node, "rockchip,key_table", + (u32 *)rc_map[i].scan, len); if (ret) { debug("missing key_table property in the dts\n"); return -1; @@ -120,9 +123,6 @@ static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev) u8 __maybe_unused address, not_address, command, not_command; struct nec_dec *data = &nec; - debug("NEC decode started at state %d (%uus %s)\n", - data->state, TO_US(ev->duration), TO_STR(ev->pulse)); - switch (data->state) { case STATE_INACTIVE: if (!ev->pulse) @@ -161,11 +161,12 @@ static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev) break; data->bits <<= 1; - if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2)) + if (eq_margin(ev->duration, NEC_BIT_1_SPACE, NEC_UNIT / 2)) { data->bits |= 1; - else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE, - NEC_UNIT / 2)) + } else if (!eq_margin(ev->duration, NEC_BIT_0_SPACE, + NEC_UNIT / 2)) { break; + } data->count++; if (data->count == NEC_NBITS) { @@ -180,11 +181,12 @@ static int ir_nec_decode(struct rockchip_ir_priv *priv, struct ir_raw_event *ev) } usercode = address << 8 | not_address; scancode = command << 8 | not_command; - debug("raw usercode 0x%04x scancode 0x%04x\n", - usercode, scancode); + /* change to dts format */ usercode = bitrev16(usercode); scancode = (bitrev16(scancode) >> 8) & 0xFF; + debug("usercode 0x%04x scancode 0x%04x\n", + usercode, scancode); data->state = STATE_INACTIVE; ret = ir_lookup_by_scancode(priv, usercode, scancode); @@ -226,6 +228,7 @@ static void rockchip_ir_irq(int irq, void *data) } writel(PWM_CH_INT(priv->id), priv->base + PWM_STA_REG(priv->id)); + ev.duration = cycle * priv->period; ir_nec_decode(priv, &ev); } @@ -253,16 +256,25 @@ static void rockchip_ir_hw_init(struct udevice *dev) static int rockchip_ir_ofdata_to_platdata(struct udevice *dev) { - int node = dev_of_offset(dev); - const void *blob = gd->fdt_blob; + ofnode node; + int ret; + int subnode_num = 0; + u32 val; struct rockchip_ir_priv *priv = dev_get_priv(dev); - priv->num = fdtdec_get_child_count(blob, node); + dev_for_each_subnode(node, dev) { + ret = ofnode_read_u32(node, "rockchip,usercode", &val); + if (!ret) + subnode_num++; + } + + priv->num = subnode_num; + if (priv->num == 0) { debug("no ir map in dts\n"); return -1; } - priv->base = devfdt_get_addr(dev); + priv->base = dev_read_addr(dev); priv->id = (priv->base >> 4) & 0xF; return 0; @@ -286,7 +298,6 @@ static int rockchip_ir_probe(struct udevice *dev) debug("%s: failed to parse keys\n", __func__); return -EINVAL; } - /* * The PWM does not have decicated interrupt number in dts and can * not get periph_id by pinctrl framework, so let's init then here. @@ -297,12 +308,6 @@ static int rockchip_ir_probe(struct udevice *dev) return -EINVAL; } - ret = pinctrl_request_noflags(pinctrl, PERIPH_ID_PWM0 + priv->id); - if (ret) { - debug("%s pwm%d pinctrl init fail\n", __func__, priv->id); - return -EINVAL; - } - ret = clk_get_by_index(dev, 0, &clk); if (ret) { debug("%s get clock fail!\n", __func__); diff --git a/include/linux/input.h b/include/linux/input.h index 3662c9f0a7..804d5f0971 100644 --- a/include/linux/input.h +++ b/include/linux/input.h @@ -149,5 +149,6 @@ #define KEY_RIGHTMETA 126 #define KEY_COMPOSE 127 #define KEY_FN 0x1d0 +#define KEY_REPLY 232 /* AC Reply */ #endif From 14be0258b50b8ea42e3c6d32115fd2b203bfcb4a Mon Sep 17 00:00:00 2001 From: Jason Zhu Date: Wed, 22 Apr 2020 15:46:35 +0800 Subject: [PATCH 4/4] rockchip: spl-boot-order: adjust nand flash dectecting strategy Now the nand device is attached to mtd block, so change its dectecting strategy. Signed-off-by: Jason Zhu Change-Id: I7b5063ad1d1ba2d8305c84e4d67e09932b30574b --- arch/arm/mach-rockchip/spl-boot-order.c | 32 +++++++++++++++++++------ 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-rockchip/spl-boot-order.c b/arch/arm/mach-rockchip/spl-boot-order.c index 81a03c580e..5894255a52 100644 --- a/arch/arm/mach-rockchip/spl-boot-order.c +++ b/arch/arm/mach-rockchip/spl-boot-order.c @@ -29,7 +29,6 @@ * -1, for unspecified failures * a positive integer (from the BOOT_DEVICE_... family) on succes. */ - static int spl_node_to_boot_device(int node) { struct udevice *parent; @@ -76,13 +75,32 @@ static int spl_node_to_boot_device(int node) return BOOT_DEVICE_SPI; #else return BOOT_DEVICE_MTD_BLK_SPI_NOR; - if (!uclass_get_device_by_of_offset(UCLASS_MTD, node, &parent)) - return BOOT_DEVICE_MTD_BLK_SPI_NAND; -#endif -#ifdef CONFIG_SPL_NAND_SUPPORT - if (!rk_nand_init()) - return BOOT_DEVICE_NAND; + if (!uclass_get_device_by_of_offset(UCLASS_MTD, node, &parent)) { + struct udevice *dev; + struct blk_desc *desc = NULL; + + for (device_find_first_child(parent, &dev); + dev; + device_find_next_child(&dev)) { + if (device_get_uclass_id(dev) == UCLASS_BLK) { + desc = dev_get_uclass_platdata(dev); + break; + } + } + + if (!desc) + return -ENOENT; + + switch (desc->devnum) { + case 0: + return BOOT_DEVICE_MTD_BLK_NAND; + case 1: + return BOOT_DEVICE_MTD_BLK_SPI_NAND; + default: + return -ENOSYS; + } + } #endif return -1;