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net: Add rk1808 gmac support 

Change-Id: Iba89fc63dce6553beb266106f5f6287a2779032f
Signed-off-by: David Wu <david.wu@rock-chips.com>
This commit is contained in:
David Wu 2019-04-10 09:30:55 +08:00 committed by Jianhong Chen
parent 5055cc911c
commit ff86648dc8
1 changed files with 82 additions and 0 deletions
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82
drivers/net/gmac_rockchip.c
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@ -16,6 +16,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/hardware.h>
#include <asm/arch/grf_px30.h>
#include <asm/arch/grf_rk1808.h>
#include <asm/arch/grf_rk322x.h>
#include <asm/arch/grf_rk3288.h>
#include <asm/arch/grf_rk3308.h>
@ -124,6 +125,40 @@ static int px30_gmac_fix_mac_speed(struct dw_eth_dev *priv)
return 0;
}
static int rk1808_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
struct clk clk_speed;
int ret;
ret = clk_get_by_name(priv->phydev->dev, "clk_mac_speed",
&clk_speed);
if (ret)
return ret;
switch (priv->phydev->speed) {
case 10:
ret = clk_set_rate(&clk_speed, 2500000);
if (ret)
return ret;
break;
case 100:
ret = clk_set_rate(&clk_speed, 25000000);
if (ret)
return ret;
break;
case 1000:
ret = clk_set_rate(&clk_speed, 125000000);
if (ret)
return ret;
break;
default:
debug("Unknown phy speed: %d\n", priv->phydev->speed);
return -EINVAL;
}
return 0;
}
static int rk3228_gmac_fix_mac_speed(struct dw_eth_dev *priv)
{
struct rk322x_grf *grf;
@ -366,6 +401,46 @@ static void px30_gmac_set_to_rmii(struct gmac_rockchip_platdata *pdata)
px30_GMAC_PHY_INTF_SEL_RMII);
}
static void rk1808_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
{
struct rk1808_grf *grf;
enum {
RK1808_GMAC_PHY_INTF_SEL_SHIFT = 4,
RK1808_GMAC_PHY_INTF_SEL_MASK = GENMASK(6, 4),
RK1808_GMAC_PHY_INTF_SEL_RGMII = BIT(4),
RK1808_RXCLK_DLY_ENA_GMAC_MASK = BIT(1),
RK1808_RXCLK_DLY_ENA_GMAC_DISABLE = 0,
RK1808_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(1),
RK1808_TXCLK_DLY_ENA_GMAC_MASK = BIT(0),
RK1808_TXCLK_DLY_ENA_GMAC_DISABLE = 0,
RK1808_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(0),
};
enum {
RK1808_CLK_RX_DL_CFG_GMAC_SHIFT = 0x8,
RK1808_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(15, 7),
RK1808_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,
RK1808_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(7, 0),
};
grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
rk_clrsetreg(&grf->mac_con1,
RK1808_GMAC_PHY_INTF_SEL_MASK |
RK1808_RXCLK_DLY_ENA_GMAC_MASK |
RK1808_TXCLK_DLY_ENA_GMAC_MASK,
RK1808_GMAC_PHY_INTF_SEL_RGMII |
RK1808_RXCLK_DLY_ENA_GMAC_ENABLE |
RK1808_TXCLK_DLY_ENA_GMAC_ENABLE);
rk_clrsetreg(&grf->mac_con0,
RK1808_CLK_RX_DL_CFG_GMAC_MASK |
RK1808_CLK_TX_DL_CFG_GMAC_MASK,
pdata->rx_delay << RK1808_CLK_RX_DL_CFG_GMAC_SHIFT |
pdata->tx_delay << RK1808_CLK_TX_DL_CFG_GMAC_SHIFT);
}
static void rk3228_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)
{
struct rk322x_grf *grf;
@ -663,6 +738,11 @@ const struct rk_gmac_ops px30_gmac_ops = {
.set_to_rmii = px30_gmac_set_to_rmii,
};
const struct rk_gmac_ops rk1808_gmac_ops = {
.fix_mac_speed = rk1808_gmac_fix_mac_speed,
.set_to_rgmii = rk1808_gmac_set_to_rgmii,
};
const struct rk_gmac_ops rk3228_gmac_ops = {
.fix_mac_speed = rk3228_gmac_fix_mac_speed,
.set_to_rgmii = rk3228_gmac_set_to_rgmii,
@ -701,6 +781,8 @@ const struct rk_gmac_ops rv1108_gmac_ops = {
static const struct udevice_id rockchip_gmac_ids[] = {
{ .compatible = "rockchip,px30-gmac",
.data = (ulong)&px30_gmac_ops },
{ .compatible = "rockchip,rk1808-gmac",
.data = (ulong)&rk1808_gmac_ops },
{ .compatible = "rockchip,rk3228-gmac",
.data = (ulong)&rk3228_gmac_ops },
{ .compatible = "rockchip,rk3288-gmac",